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Fast motion estimation with size-based predictors selection hexagon search in H.264/AVC encoding 12

Fast motion estimation with size-based predictors selection ...

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12th European Signal Processing Conference, EUSIPCO 2004

作者： De Pascalis, Paolo Pezzoni, Luca Mian, Gian Antonio Bagni, Daniele Department of Information Engineering University of Padova Italy Advanced System Technology Labs STMicroelectronics Agrate Brianza Italy

ISBN: (纸本)9783200001657

In this paper we present a new fast motion estimation algorithm suitable for H.264/AVC encoding systems. It applies a hexagon-based zonal search, thresholding criteria and improved predictors selection based on the size of the block under processing. The proposed method achieves almost the same visual quality of a Full Search block matcher with a dramatically reduced amount of computation. © 2004 EUSIPCO.

关键词： Signal encoding

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Constant Bit-Rate control efficiency with fast motion estimation in H.264/AVC video coding standard 12

Constant Bit-Rate control efficiency with fast motion estima...

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12th European Signal Processing Conference, EUSIPCO 2004

作者： Alfonso, Daniele Bagni, Daniele Celetto, Luca Milani, Simone Advanced System Technology Labs STMicroelectronics Agrate Brianza Italy Department of Information Engineering University of Padova Italy

ISBN: (纸本)9783200001657

The emerging H.264/AVC video coding standard provides significant enhancements in compression efficiency with respect to its ancestors in the MPEG and H.26× families. In this paper, we analyse the performance of two different Constant Bit-Rate control methods, suitable for H.264/AVC encoding at SD-TV resolution, where the motion estimation is performed by a fast proprietary predictive algorithm. © 2004 EUSIPCO.

关键词： Motion estimation

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Transaction-level prototyping of a UMTS outer-modem for system-on-chip validation and architecture exploration

Transaction-level prototyping of a UMTS outer-modem for syst...

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Proceedings - 15th IEEE International Workshop on Rapid systems Prototyping

作者： Martinelli, Paolo Wellig, Armin Zory, Julien Advanced System Technology STMicroelectronics N.V. 39 Chemin du Champ des filles 1228 Geneva Switzerland

ISBN: (纸本)0769521592

Growing demand for mobility and multimedia capacity in handheld devices translates into very complex systems where time-to-market development is critical. High data rates and improved system capacity for IP-based services increase controlling and dynamic scheduling of already complex modem technologies. This paper describes the prototyping of a UMTS terminal subsystem, which deals with several physical layer tasks such as channel multiplexing or interleaving. Our modeling strategy relies on a transaction-level platform methodology built on top of the systemC language. The system-on-chip dynamics is modeled with behavioral modules, generic bus transactions and memory accesses. Several examples demonstrate that such a prototyping makes it possible to validate highly dynamic systems;this reduces system-on-chip development costs as it is recognized that about 70% of it lies today into verification. This prototyping also offers a large potential for fast architecture exploration with the capacity to dimension the memory components or evaluate the bus contention.

关键词： Rapid prototyping

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Batch scheduling algorithm for SUCCESS WDM-PON

Batch scheduling algorithm for SUCCESS WDM-PON

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GLOBECOM'04 - IEEE Global Telecommunications Conference

作者： Kim, Kyeong Soo Gutierrez, David An, Fu-Tai Kazovsky, Leonid G. Photonics and Networking Res. Lab. Stanford University Stanford CA 94305-9515 United States Advanced System Technology STMicroelectronics

In this paper we study the problem of scheduling variable-length frames in WDM-PON under Stanford University aCCESS (SUCCESS), a next-generation hybrid WDM/TDM optical access network architecture. The SUCCESS WDM-PON architecture has unique features that have direct impact on the design of scheduling algorithms: First, tunable transmitters and receivers at OLT are shared by ONUs to reduce transceiver counts;Second, the tunable transmitters not only generate downstream data traffic but also provide ONUs with optical Continuous Wave (CW) bursts for upstream transmissions. To provide efficient bidirectional transmissions between OLT and ONUs, we propose a batch scheduling algorithm based on the sequential scheduling algorithm previously studied. The key idea is to provide room for optimization and priority queueing by scheduling over more than one frame. In the batch scheduling, frames arrived at OLT during a batch period are stored in Virtual Output Queues (VOQs) and scheduled at the end of the batch period. Through simulation with various configurations, we demonstrate that the proposed batch scheduling algorithm, compared to the original sequential scheduling algorithm, provides higher throughput, especially when the system load is high, and better fairness between up- and downstream transmissions.

关键词： Wavelength division multiplexing

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Predictive differential modulation for CFA compression

Predictive differential modulation for CFA compression

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Proceedings of the Nordic Signal Processing Symposium (NORSIG)

作者： A. Bruna F. Vella A. Buemi S. Curti Advanced System Technology STMicroelectronics Catania Italy

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Two-stage interleaving network analysis to design area- and energy-efficient 3GPP-compliant receiver architectures

Two-stage interleaving network analysis to design area- and ...

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IEEE Workshop on Signal Processing systems (SIPS)

作者： A. Wellig STMicroelectronics Advanced System Technology Geneva Switzerland

Interleaving is a key component of many digital communication systems where the encoded data is reshuffled prior to transmission to protect against burst errors. Coupled with multiplexing schemes such multi-stage subsystems achieve the necessary quality and flexibility to support a variety of different services. In 3GPP, a 2-stage multiplexing channel interleaver network is adopted. Its state-of-the-art implementation is both memory- and control-intensive, since the deinterleaving is done explicitly implying dedicated storage and processing units at each stage. In this paper, we show that the C-fold decimation property which characterizes typical block interleavers is preserved in 2-stage interleaving networks. Thus, the underlying architecture not only results in significant memory size and access rate reductions but also greatly simplifies control processing. A decline in memory size of up to 31% and in access energy of up to 54% has been observed for stmicroelectronics' 0.13 /spl mu/m CMOS technology for various 3GPP capability classes.

关键词： Interleaved codes Energy efficiency Digital communication Forward error correction Routing Chemical technology Protection Couplings Size control Process control

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Fully-integrated WCDMA direct conversion SiGeC BiCMOS receiver

Fully-integrated WCDMA direct conversion SiGeC BiCMOS receiv...

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Proceedings of the 2004 IEEE Bipolar/BiCMOS Circuits and technology Meeting

作者： Garcia, Patrice Pellat, Bruno Blanc, Jean-Pierre Persechini, Pascal Knopik, Vincent Baud, Laurent Goussin, Franck Thevenet, Davy Majcherczak, Sandrine Reaute, Fabien Richard, Oliver Conti, Patrick Szelag, Bertrand Belot, Didier STMicroelectronics Analog RF Design Group CR and D 850 Rue Jean Monnet 38926 Crolles France STMicroelectronics Advanced System Technology 39 Ch. du champs des filles CH-1228 Geneve Switzerland

This paper describes a WCDMA direct conversion receiver which has been integrated in a BiCMOS SiGe-Carbon process featuring 0.25um/fT=60GHz bipolar transistor. This receiver includes integrated RF-Front-End with local oscillator quadrature generator, 5th order Butterworth analog baseband lowpass filter (LPF) and variable gain amplifier (VGA), cut-off frequency calibrator, DAC for DC-offset calibration, serial bus interface and voltage and current reference generators. In the high/low gain modes this device consumes 25mA and 20mA respectively with 2.7V power supply. The die is wire bounded directly on the validation board. Within the receive band, the measurements show 51dB of overall gain, NF=5dB, IIP3=-9dBm, ICP1=-15dBm. ©2004 IEEE.

关键词： Code division multiple access

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Segment-based stereo matching using graph cuts

Segment-based stereo matching using graph cuts

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Conference on Computer Vision and Pattern Recognition (CVPR)

作者： Li Hong G. Chen Advanced System Technology San Diego Laboratory STMicroelectronics Inc. Italy

In this paper we present a new segment-based stereo matching algorithm using graph cuts. In our approach, the reference image is divided into non-overlapping homogeneous segments and the scene structure is represented as a set of planes in the disparity space. The stereo matching problem is formulated as an energy minimization problem in the segment domain instead of the traditional pixel domain. Graph cuts technique is used to fast approximate the optimal solution, which assigns the corresponding disparity plane to each segment. Experiments demonstrate that the performance of our algorithm is comparable to the state-of-the-art stereo algorithms on various data sets. Furthermore, strong performance is achieved in the conventionally difficult areas such as: textureless regions, disparity discontinuous boundaries and occluded portions.

关键词： Stereo vision Image segmentation Space technology Layout Computer vision Rendering (computer graphics) Energy measurement Application software Minimization methods Costs

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system level power modeling and simulation of high-end industrial network-on-chip 04

System level power modeling and simulation of high-end indus...

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Design, Automation and Test in Europe Conference and Exhibition

作者： A. Bona V. Zaccaria R. Zafalon Advanced System Technology-R&I STMicroelectronics Agrate-Brianza Italy

ISBN: (纸本)9780769520858

Today's system on chip (SoC) technology can achieve unprecedented computing speed that is shifting the IC design bottleneck from computation capacity to communication bandwidth and flexibility. This paper presents an innovative methodology for automatically generating the energy models of a versatile and parametric on-chip communication IP (STBus). Eventually, those models are linked to a standard systemC simulator, running at BCA and TLM abstraction level. To make the system power simulation fast and effective, we enhanced the STBus class library with a new set of power profiling features ("Power API"), allowing to perform power analysis either statically (i.e.: total avg. power) or at simulation runtime (i.e.: dynamic profiling). In addition to random patterns, our methodology has been extensively benchmarked with the high-level systemC simulation of a real world multi-processor platform (MP-ARM). It consists of four ARM7TDMI processors accessing a number of peripheral targets (including several banks of SRAMs, Interrupt's slaves and ROMs) through the STBus communication infrastructure. A remarkable amount of SW layers are executed on top of MP-ARM platform, including a distributed real-time operating system (RTEMS) and a set of multi-tasking DSP applications. The power analysis of the benchmark platform proves to be effective and highly correlated, with an average error of 9% and a RMS of 0.015 mW vs. the reference (i.e. gate level) power figures.

关键词： Power system modeling Network-on-a-chip Computational modeling Analytical models system-on-a-chip Bandwidth Discrete event simulation Libraries Performance analysis Runtime

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Block-based illumination compensation and search techniques for multiview video coding

Block-based illumination compensation and search techniques ...

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Picture Coding Symposium 2004

作者： López, Joaquin Kim, Jae Hoon Ortega, Antonio Chen, George Sign. and Image Processing Institute Department of Electrical Engineering University of Southern California Los Angeles CA 90089-2564 Advanced System Technology STMicroelectronics 4690 Executive Dr San Diego CA 92121

We consider block-based interview coding techniques for multiview video sequences that are robust to illumination variations across views. We consider both global illumination differences which could be due to lack of camera calibration or heterogeneity, as well as local ilumination changes caused by lack of camera aligment We propose a two-parameter model for illumination compensation (IC) that is used at the block matching search step and can be adaptively applied by taking into account the rate-distortion characteristics of each block. We also present a modified search (MS) method for block-based interview disparity estimation that makes use of feature points in each frame in order to provide a good prediction of likely disparity vectors. We present coding experiments on different multiview sequences based on the H.264/AVC reference codec. The proposed techniques show significant coding gains for interview coded frames, as compared to methods that do not employ IC and MS.

关键词： Image coding

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