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Compiler orchestrated prefetching via speculation and predication

Compiler orchestrated prefetching via speculation and predic...

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11th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS XI

作者： Rabbah, Rodric M. Sandanagobalane, Hariharan Ekpanyapong, Mongkol Wong, Weng-Fai Comp. Sci. and Artif. Intell. Lab. Massachusetts Inst. of Technology United States Department of Computer Science National University of Singapore Singapore Sch. of Elec. and Comp. Engineering Georgia Institute of Technology United States

ISBN: (纸本)1581138040

This paper introduces a compiler-orchestrated prefetching system as a unified framework geared toward ameliorating the gap between processing speeds and memory access latencies. We focus the scope of the optimization on specific subsets of the program dependence graph that succinctly characterize the memory access pattern of both regular array-based applications and irregular pointer-intensive programs. We illustrate how program embedded precomputation via speculative execution can accurately predict and effectively prefetch future memory references with negligible overhead. The proposed techniques reduce the total running time of seven SPEC benchmarks and two OLDEN benchmarks by 27% on an Itanium 2 processor. The improvements are in addition to several state-of-the-art optimizations including software pipelining and data prefetching. In addition, we use cycle-accurate simulations to identify important and lightweight architectural innovations that further mitigate the memory system bottleneck. In particular, we focus on the notoriously challenging class of pointer-chasing applications, and demonstrate how they may benefit from a novel sch.me of sentineled prefetching. Our results for twelve SPEC benchmarks demonstrate that 45% of the processor stalls that are caused by the memory system are avoidable. The techniques in this paper can effectively mask long memory latencies with little instruction overhead, and can readily contribute to the performance of processors today.

关键词： Program compilers

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Testing embedded cores-based system-on-a-chip (SoC) - Test architecture and implementation

Testing embedded cores-based system-on-a-chip (SoC) - Test a...

引用

Proceedings of the 23rd IASTED International Conference on Modelling, Identification, and Control

作者： Das, Sunil R. Assaf, Mansour H. Petriu, Emil M. Jin, Liwu Jin, Chuan Biswas, Dhruv Sahinoglu, Mehmet Sch. of Info. Technol. and Eng. Faculty of Engineering University of Ottawa Ottawa Ont. K1N 6N5 Canada Department of Computer Science Troy State University Montgomery Montgomery AL 36103 United States

To implement fault testing environment for embedded cores-based system-on-a-chip (SoC) is a challenging task. This paper proposes digital design verification and test architecture based on relevant hardware and software components. There exist methods to ensure correct SoC functionality in both hardware and software, but one of the most reliable ways to realize this is through the use of design for testability approaches. In particular, applications of built-in self-test (BIST) methodology for testing embedded cores are considered in the paper, with specific implementations being targeted towards ISCAS 85 combinational benchmark circuits.

关键词： Built-in self test

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Hardware and software co-design in space compaction of cores-based digital circuits

Hardware and software co-design in space compaction of cores...

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Proceedings of the 21st IEEE Instrumentation and Measurement Technology Conference, IMTC/04

作者： Assaf, Mansour H. Das, Sunil R. Petriu, Emil M. Jin, Liwu Jin, Chuan Biswas, Dhruv Groza, Voicu Sahinoglu, Mehmet Sch. of Info. Technol. and Eng. Faculty of Engineering University of Ottawa Ottawa Ont. K1N 6N5 Canada Department of Computer Science Troy State University Montgomery Montgomery AL 36103 United States

Implementation of fault testing environment for embedded cores-based digital circuits is a challenging endeavor. The subject paper aims developing techniques in design verification and test architecture utilizing well-known concepts of hardware and software co-design. There are available methods to ensure correct functionality, in both hardware and software, for embedded cores-based systems but one of the most used and acceptable approaches to realize this is through the use of design for testability. Specifically, applications of built-in self-test (BIST) methodology in testing embedded cores are considered in the paper, with specific implementations being targeted towards ISCAS 85 combinational benchmark circuits.

关键词： Digital circuits

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WordNet ontology based model for information retrieval

WordNet ontology based model for information retrieval

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Proceedings of the International Conference on Communications in Computing, CIC'04

作者： Moravec, Pavel Snášel, Václav Smid, Jan Obitko, Marek Department of Computer Science VSB - Tech. University of Ostrava 17. listopadu 15 708 33 Ostrava-Poruba Czech Republic Department of Computer Science Sch. of Comp. Math. and Nat. Sci. Morgan State University Cold Spring Lane Baltimore MD 21251-0002 Department of Cybernetics Faculty of Electrical Engineering Czech Technical University Technicka 2 166 27 Prague 6 Czech Republic

ISBN: (纸本)193241536X

In the area of information retrieval, the dimension of document vectors plays an important role. Firstly, with higher index dimensions the indexing structures suffer from the "curse of dimensionality" and their efficiency rapidly decreases. Secondly, we may not use exact words when looking for a document, thus we miss some relevant documents. LSI (Latent Semantic Indexing) is a numerical method, which discovers latent semantic in documents by creating concepts from existing terms. In this article we present a basic method of mapping LSI concepts on given ontology (WordNet), used both for retrieval recall improvement and dimension reduction. We offer experimental results for this method on a subset of TREC collection, consisting of Los Angeles Times articles.

关键词： Information retrieval

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Optimization methods for minimum power bidirectional topology construction in wireless networks with sectored antennas

Optimization methods for minimum power bidirectional topolog...

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GLOBECOM'04 - IEEE Global Telecommunications Conference

作者： Das, Arindam K. Marks, Robert J. El-Sharkawi, Mohamed Arabshahi, Payman Gray, Andrew Department of Electrical Engineering University of Washington Box 352500 Seattle WA 98195 Sch. of Eng. and Computer Science Baylor University 1311 S. 5th Street Waco TX 76798-7356 Jet Propulsion Laboratory MS 238-343 4800 Oak Grove Drive Pasadena CA 91109

We consider the problem of minimum power bidirectional topology optimization in wireless networks with sectored antennas. We first develop a mixed integer linear programming model for optimal solution of the problem with sectored antennas. Subsequently, we discuss a centralized heuristic algorithm which is based on Kruskal's algorithm for the minimum spanning tree problem. However, unlike Kruskal's algorithm which chooses minimum cost edges from a set of edge weights, our algorithm uses an incremental cost mechanism to select edges. This incremental cost mechanism is motivated by the inherently broadcast nature of the wireless medium. We also discuss a simple branch exchange heuristic which can be used to improve the topology generated by the Kruskal-like algorithm. Simulation results indicate that reasonably good solutions can be obtained using the proposed heuristic algorithms. © 2004 IEEE.

关键词： Wireless telecommunication systems

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Automating business transaction and negotiation in supply chains using Web service composition

Automating business transaction and negotiation in supply ch...

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International Conference on computer and Information Technology (CIT)

作者： Incheon Paik S. Hossain T. Hossain School of Computer of Computer Science & Engineering University of Aizuwakamatsu Fukushima Japan School of Computer Science & Engineering The University of Aizu Aizu Wakamatsu City Fukushima Japan Aizu Daigaku Aizuwakamatsu Fukushima JP Sch. of Comput. Sci. & Eng. Aizu Univ. Wakamatsu Japan

In this article, we propose an efficient Web service solution for automated business transaction and negotiation in supply chain management (SCM) process in order to optimize the efficiency of SCM. Using Web service composition and execution, the research focuses on the automation of transaction after initial plan and design of the product is done in the automating SCM process, which triggers the need of effective procurement of the design components from a set of supplier model of business transaction with negotiation. Designing of this model with Web service composition in BPEL4WS on the existing WEB service environment of two partners and simple prototype written in BPEL4WS is shown.

关键词： Supply chains Web services Business computer science Cities and towns Postal services Supply chain management Prototypes Companies Manufacturing processes

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A MFoM learning approach to robust multiclass multi-label text categorization

A MFoM learning approach to robust multiclass multi-label te...

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Proceedings, Twenty-First International Conference on Machine Learning, ICML 2004

作者： Gao, Sheng Wu, Wen Lee, Chin-Hui Chua, Tat-Seng Institute for Infocomm Research 21 Heng Mui Keng Terrace Singapore 119613 Language Technologies Institute School of Computer Science Carnegie Mellon University Pittsburgh PA 15213 United States Sch. of Elec. and Comp. Engineering Georgia Institute of Technology Atlanta GA 30332 United States School of Computing National University of Singapore 3 Science Drive 2 Singapore 117543

ISBN: (纸本)1581138385

We propose a multiclass (MC) classification approach to text categorization (TC). To fully take advantage of both positive and negative training examples, a maximal figure-of-merit (MFoM) learning algorithm is introduced to train high performance MC classifiers. In contrast to conventional binary classification, the proposed MC sch.me assigns a uniform score function to each category for each given test sample, and thus the classical Bayes decision rules can now be applied. Since all the MC MFoM classifiers are simultaneously trained, we expect them to be more robust and work better than the binary MFoM classifiers, which are trained separately and are known to give the best TC performance. Experimental results on the Reuters-21578 TC task indicate that the MC MFoM classifiers achieve a micro-averaging F1 value of 0.377, which is significantly better than 0.138, obtained with the binary MFoM classifiers, for the categories with less than 4 training samples. Furthermore, for all 90 categories, most with large training sizes, the MC MFoM classifiers give a micro-averaging F1 value of 0.888, better than 0.884, obtained with the binary MFoM classifiers.

关键词： Learning systems

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Variable heavy tails in Internet traffic

Variable heavy tails in Internet traffic

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作者： Hernández-Campos, Félix Marron, J.S. Samorodnitsky, Gennady Smith, F.D. Department of Computer Science University of North Carolina Chapel Hill NC 27599-3175 United States Department of Statistics University of North Carolina Chapel Hill NC 27599-3260 United States Department of Statistical Science Cornell University Ithaca NY 14853 United States Sch. Oper. Res./Indust. Engineering Cornell University Ithaca NY 14853 United States

This paper studies tails of the size distribution of Internet data flows and their "heaviness". Data analysis motivates the concepts of moderate, far and extreme tails for understanding the richness of information available in the data. The data analysis also motivates a notion of "variable tail index", which leads to a generalization of existing theory for heavy-tail durations leading to long-range dependence. © 2004 Elsevier B.V. All rights reserved.

关键词： Telecommunication traffic

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A note on fuzzy granular reasoning

A note on fuzzy granular reasoning

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2004 IEEE International Conference on Fuzzy Systems - Proceedings

作者： Murai, Tetsuya Kudo, Yasuo Van Huynh, Nam Tanaka, Akira Kudo, Mineichi Division of Computer Science Grad. Sch. Info. Sci. and Technol. Hokkaido University Sapporo 060-0814 Japan Dept. of Comp. Sci. and Engineering Muroran Institute of Technology Muroran 050-8585 Japan Department of Knowledge Science Japan Adv. Inst. Sci. and Technol. Tatsunokuchi Ishikawa 923-1292 Japan

ISBN: (纸本)0780383532

In this paper, firstly, processes of classical inference are reviewed as granular reasoning from a point of view of reconstructing Kripke-style models with granularity. The essential point of the reconstruction is that some possible worlds are amalgamated to generate granules of worlds and vice versa. It is also called zoom reasoning systems. Then, the idea is applied for fuzzy reasoning processes by considering fuzzily granularized possible worlds. There linguistic truth values with linguistic hedges can be naturally introduced.

关键词： Fuzzy sets

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Development of a micro gyroscope using epitaxial polysilicon and its performance test

Development of a micro gyroscope using epitaxial polysilicon...

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Advances in Fracture and Failure Prevention: Proceedings of the Fifth International Conference on Fracture and Strength of Solids (FEOFS2003): Second International Conference on Physics and Chemistry of Fracture and Failure Prevention (2nd ICPCF)

作者： Sung, Woon Tahk Lim, Hyung-Taek Kang, Taesam Lee, Jang Gyu Lee, Young Jae Sch. of Elec. Eng./Computer Science Seoul National University Shilim 9-dong Kwanak-gu Seoul Korea Republic of MEMS Lab. Samsung Adv. Institute of Technology P.O. Box 111 Suwon Korea Republic of Department of Aerospace Engineering Konkuk University Kwangjin-gu Seoul Korea Republic of

This paper presents a design and performance tests of in-plane gimbal-structured Z-axis gyroscope. The device is manufactured by conventional surface micro machining process using 15μm-thickness epitaxially grown polysilicon. The total size of the device is 4.8mm × 4.8mm in area including 1mm × 1mm core gyro structure and pads for wire bonding. It is designed as two-gimbaled structure which separates inner and outer gimbals. This leads two nearly identical modes of gyroscope, i.e. driving and sensing mode, to mechanically decoupled ones, resulting in enhanced performance. Experiments are accomplished through frequency analysis and dynamic tests using a detection circuit, a vacuum chamber and a rate table. Through experiments, it is confirmed that the designed gyroscope has 0.003 deg/sec resolution, 0.00095 deg/sec/√Hz noise equivalent density, 0.57% FSO nonlinearity error and 0.02 deg/sec bias stability.

关键词： Polysilicon

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