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检索条件"机构=Sch. of Elec. Engineering and Computer Science"

共 863 条记录，以下是181-190 订阅

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Corresponding-color reproduction model according to surround viewing conditions

Corresponding-color reproduction model according to surround...

引用

作者： Kim, Eun-Su Jang, Soo-Wook Kwon, Yong-Dae Han, Chan-Ho Sohng, Kyu-Ik Sch. of Elec. Eng./Computer Science Kyungpook National University 1370 Sankyuk-dong Buk-gu Daegu 702-701 Korea Republic of Korea Credit Guarantee Fund Korea Republic of

In this paper, a simple and practical corresponding-color reproduction model based on the chromatic adaptation of the human visual system (HVS), named a modified von Kries chromatic-adaptation model, is proposed for TV and PC monitors under a variety of viewing conditions. We derived the proposed corresponding-color reproduction model based on Breneman's corresponding-color data. The proposed model has a 1-2% less error than Fairchild's and Breneman's model, 11.5% less error than von Kries' model and 60% less error than CIECAM97s' model in terms of color reproduction errors, (ΔE*uv) ′. Also, these tendency is similar in color reproduction errors, ΔE*ab. We implemented a corresponding-color reproduction system using the proposed model under a variety of viewing conditions. For the determination of viewing conditions, illuminant correlated color temperatures (CCTs) are measured by yellow/cyan sensors. These measured surround illuminant CCTs can estimate an adaptated neutral point of the HVS in TV viewing conditions, Experiments were carried out to assess the proposed model performance in terms of color fidelity by comparing complex images on a LCD monitor under illuminants from 2500 K to 7500 K. We confirmed that the implemented system using the proposed model can predict corresponding-color data very well under a variety of viewing conditions. Therefore, by applying the proposed model and system to the LCD, the reproduction colors viewed in real surrounding viewing conditions on the LCD could appear the same as the original object colors under standard viewing conditions. Furthermore, they could be applied to any other color display device such as a CRT, a PDF, and a DLP in order to get better reproduction colors.

关键词： Color vision

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A highly-parallel VLSI architecture for a list sphere detector

A highly-parallel VLSI architecture for a list sphere detect...

引用

IEEE International Conference on Communications (ICC 2004)

作者： Widdup, B Woodward, G Knagge, G Wireless Networks Group Lucent Technologies North Ryde NSW Australia Bell Laboratories Research Lucent Technologies North Ryde NSW Australia Sch. of Elec. Eng./Computer Science University of Newcastle Callaghan NSW Australia

ISBN: (纸本)0780385330

Finding the nearest point in a lattice is an NP-hard problem for which we desire a simplified architecture. Furthermore, output of confidence measures or soft information is desirable for decoding/detection problems, yet generating such information further complicates the task. This paper presents an efficient and highly parallelisable architecture for a list sphere detector that is particularly suited to ASIC implementation. Various degrees of parallelism are explored and compared. This architecture finds application in multiuser and MIMO detectors, providing soft estimates of the transmitted symbols.

关键词： multiuser detection (MUD) parallel computing lattice decoding closest point search MIMO

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Content-aware load balancing using direct routing for VOD streaming service

Content-aware load balancing using direct routing for VOD st...

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Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA'04

作者： Woo, Young-Hwan Chung, Jin-Wook Kim, Seok-Soo Dept. of Computer System Geo-chang Provincial College Korea Republic of Sch. of Elec. and Comp. Engineering Sung-kyun-kwan University Korea Republic of School of Computer and Multimedia Hannam University Korea Republic of

ISBN: (纸本)1932415262

The number of internet users rapidly increases as the business relies more on the internet and intranet. Accordingly, the traffic on the Internet is increasing dramatically. The workload on the servers is also increasing rapidly so that servers will be easily overloaded for a short time. To overcome the overloading problem of the servers, it is necessary to increase system performance and availability. In the web server cluster environment, it is necessary to implement router that performs routing using TCP information and requested content information, in order to process client's requests in connection with multiple servers. In this paper, designs a load balancer via direct routing that share a virtual service on a single IP address in the Linux system and suggests an efficient load balancing method to improve transmission speed in the web server cluster environment. It will increase performance and scalability with fast packet transfer and removing bottleneck problem by using TCP Splicing and Content-Aware Balancer method.

关键词： Internet

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High-aspect-ratio tapered structures using an integrated lens technique

High-aspect-ratio tapered structures using an integrated len...

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17th IEEE International Conference on Micro elec.ro Mechanical Systems (MEMS): Maastricht MEMS 2004 Technical Digest

作者： Park, Jung-Hwan Yoon, Yong-Kyu Prausnitz, Mark R. Allen, Mark G. Schools of Biomedical Engineering Georgia Institute of Technology Atlanta GA 30332 United States Sch. of Elec./Computer Engineering Georgia Institute of Technology Atlanta GA 30332 United States Sch. of Chem./Biomol. Engineering Georgia Institute of Technology Atlanta GA 30332 United States

In this work, a fabrication approach for tapered column structures with high aspect ratio is presented, and its application to microneedle fabrication is discussed. Microlenses were fabricated on a glass substrate by chromium-masked isotropic wet etching. This substrate was subsequently coated with SU-8 negative epoxy resist and exposed from the back. The chromium acted in a self-aligned fashion to block light from the non-lens portion of the substrate, and the lenses acted to shape the beam through the epoxy to produce sharply-tapered structures. An extension of the technique allows for subsequent repetition of the structure through micromolding;solid biodegradable microneedles with a cone shape were fabricated in this manner. The microneedles have sharply tapered tips and are 1.5 mm in height. These needles were inserted into human skin and were demonstrated to be suitable for blood extraction.

关键词： Microlenses

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Tight integration of timing-driven synthesis and placement of parallel multiplier circuits

Tight integration of timing-driven synthesis and placement o...

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作者： Shin, Keoncheol Kim, Taewhan Department of Electrical Engineering Korea Adv. Inst. of Sci./Technology Daejon 305-701 Korea Republic of Sch. of Elec. Eng./Computer Science Seoul National University Seoul 151-744 Korea Republic of

In deep submicrometer (DSM) design, the interconnect delay becomes equally as or more important than that of logic gates. In particular, to achieve timing closure in DSM design, it is essential to consider the interconnect delay at an early stage of the synthesis process. Unfortunately, few successes of achieving a tight link of front-end synthesis to back-end layout have been reported, from a practical point of view, mainly due to the inaccuracy of predicting the layout effects during the synthesis. In this brief, we address a new approach to the problem of synthesis of parallel multiplier circuits combined with the consideration of layout effects. The approach is intended to overcome some of the limitations of the previous works, in which the effects of layout on the synthesis have either not been taken into account or considered only in local and limited ways, or the computation time is extremely large. The proposed approach refines the structure and placement of the circuit by iteratively performing two tasks. Task 1: timing-driven relocation. For a parallel multiplier circuit that was restructured at the prior iteration, we attempt to replace the modules in the structure while retaining the interconnects to find a placement with shorter timing. Task 2: timing-driven resynthesis. We attempt to restructure the interconnect topology of the placement obtained from Task 1 to further reduce the circuit timing, employing two heuristics: a modified version of timing-optimal FA-tree allocation by Stelling et al. (1996), considering interconnect delay, and a critical path-based local interconnect refinement. The iterative mechanism of the two tasks practically tightly integrates the synthesis and placement tasks so that both of the effects of placement on the results of synthesis and the effects of synthesis on the results of placement are taken into account. From experiments using a set of benchmark designs, it is shown that the approach is quite effective and efficient

关键词： Multiplying circuits

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X-GTRBAC admin: A decentralized administration model for enterprise wide access control

X-GTRBAC admin: A decentralized administration model for ent...

引用

Proceedings on the Ninth ACM Symposium on Access Control Models and Technologies, SACMAT 2004

作者： Bhatti, Rafae Joshi, James B.D. Bertino, Elisa Ghafoor, Arif Sch. of Elec./Computer Engineering Purdue University West Lafayette IN United States School of Information Sciences University of Pittsburgh Pittsburgh PA United States Department of Computer Sciences CERIAS Purdue University West Lafayette IN United States

Access control in enterprises is a key research area in the realm of computer Security because of the unique needs of the target enterprise. As the enterprise typically has large user and resource pools, administering the access control based on any framework could in itself be a daunting task. This work presents X-GTRBAC Admin, an administration model that aims at enabling policy administration within a large enterprise. In particular, it simplifies the process of user-to-role and permission-to-role assignments, and thus allows decentralization of the policy administration tasks. Secondly, it also allows for specifying the domain of authority of the system administrators, and hence provides mechanism to distribute the administrative authority over multiple domains within the enterprise. The paper also illustrates the applicability of the administrative concepts presented in our framework for enterprise-wide access control.

关键词： Security of data

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VLaTTe: A java just-in-time compiler for VLIW with fast sch.duling and register allocation

VLaTTe: A java just-in-time compiler for VLIW with fast sche...

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作者： Kim, Suhyun Moon, Soo-Mook Ebcioǧlu, Kemal Altman, Erik Sch. of Elec. Eng./Computer Science Seoul National University Seoul Korea Republic of IBM T. J. Watson Research Center Yorktown Heights NY 10598 United States

For network computing on desktop machines, fast execution of Java bytecode programs is essential because these machines are expected to run substantial application programs written in Java. We believe higher Java performance can be achieved by exploiting instruction-level parallelism (ILP) in the context of Java JIT compilation. This paper introduces VLaTTe, a Java JIT compiler for VLIW machines that performs efficient sch.duling while doing fast register allocation. It is an extended version of our previous JIT compiler for RISC machines called LaTTe [1] whose translation overhead is low (i.e., consistently taking one or two seconds for SPECJVM98 benchmarks) due to its fast register allocation. VLaTTe adds the sch.duling capability onto the same framework of register allocation, with a constraint for precise in-order exception handling which guarantees the same Java exception behavior with the original byte-code program. Our experimental results on the SPECJVM98 benchmarks show that VLaTTe achieves a geometric mean of useful IPC 1.7 (2-ALU), 2.1 (4-ALU), and 2.3 (8-ALU), while the sch.duling/allocation overhead is 3.6 times longer than LaTTe's on average, which appears to be reasonable.

关键词： Program compilers

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Isotropic/anisotropic growth behavior and faceting morphology of Si epitaxial layer selec.ively grown by cold wall ultrahigh vacuum chemical vapor deposition

Isotropic/anisotropic growth behavior and faceting morpholog...

引用

作者： Lim, Seung-Hyun Song, Sukchan Yoon, Euijoon Lee, Jong-Ho Sch. of Mat. Science and Engineering Inter-Univ. Semiconduct. Res. Center Seoul National University Seoul 151-742 Korea Republic of Sch. of Electron./Elec. Engineering Kyungpook National University Taegu 702-701 Korea Republic of

The isotropic/anisotropic selec.ive epitaxial growth (SEG) behavior and the faceting morphology change in Si epitaxial layers were studied. The cold wall ultrahigh vacuum chemical vapor deposition (UHV-CVD) was used to grow the Si layers. The scanning elec.ron microscopy (SEM), transmission elec.ron microscopy (TEM), scanning transmission elec.ron microscopy (STEM) and high-resolution transmission elec.ron microscopy (HRTEM) techniques were applied to study the growth behavior and faceting morphology. It was observed that the lateral overgrowth of Si was suppressed as the growth temperature increased and the Si2H6 flow rate decreased, which subsequently enhanced the anisotropic SEG of Si.

关键词： Silicon

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Implementation of Walsh function generator of order 64 using LUT cascades

Implementation of Walsh function generator of order 64 using...

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The 2004 47th Midwest Symposium on Circuits and Systems - Conference Proceedings

作者： Falkowski, Bogdan J. Sasao, Tsutomu Sch. of Elec. and Electron. Eng. Nanyang Technological University Block SI 50 Nanyang Avenue Singapore 639798 Department of Computer Science Kyushu Institute of Technology Iizuka 820-8502 Japan

This paper introduces an application of lookup table (LUT) cascades to a design of a Walsh function generator for 64 outputs. By using LUT cascades, the Walsh functions of order 64 can be easily generated. Such functi... 详细信息

关键词： elec.ric generators

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Don't Care Identification and Statistical Encoding for Test Data Compression

Don't Care Identification and Statistical Encoding for Test ...

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作者： Kajihara, Seiji Taniguchi, Kenjiro Miyase, Kohei Pomeranz, Irith Reddy, Sudhakar M. Department of Computer Science Kyushu Institute of Technology Iizuka-shi 820-8502 Japan Center for Microelectronics Systems Kyushu Institute of Technology Iizuka-shi 820-8502 Japan Sch. of Elec./Computer Engineering Purdue University United States Electrical Engineering Department University of Iowa United States

This paper describes a method of test data compression for a given test set using statistical encoding. In order to maximize the effectiveness of statistical encoding, the method first converts some specified input values in the test set to unspecified ones without losing fault coverage, and then reassigns appropriate logic values to the unspecified inputs. Experimental results for ISCAS-89 benchmark circuits show that the proposed method can on the average reduce the test data volume to less than 25% of that required for the original test set.

关键词： Data compression

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