In ad hoc networks, each node utilizes its limited resources to carry out the collective operation of the network. It is not always in the best interests of the network's nodes to demand the continuous participati...
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In ad hoc networks, each node utilizes its limited resources to carry out the collective operation of the network. It is not always in the best interests of the network's nodes to demand the continuous participation of all nodes in the network operations. In this work, we propose an Energy Dependent Participation (EDP) sch.me, where a node periodically re-evaluates its participation in the network based on the residual energy in its battery. More importantly, a node gives special consideration to supporting the communication needs of its active network applications and preventing further network partitioning. EDP's localized partition checking algorithm is particularly well suited for the Zone Routing Protocol, where the link-state information is proactively maintained within each node's local zone and routes to faraway nodes are reactively obtained via global queries. Through simulations, we evaluate the impact of our proposed sch.me on battery life and network connectivity. Our results suggest that the EDP sch.me can increase the usable lifetime of a battery-constraint ad hoc network by over 50%.
We developed the remote boiler control system based on internet to enhance the flexibility with minimum change of the structure of the conventional boiler system. Hello Device 1300 is applied to the system as a web se...
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We developed the remote boiler control system based on internet to enhance the flexibility with minimum change of the structure of the conventional boiler system. Hello Device 1300 is applied to the system as a web server between ethernet and the boiler system manufactured by Kiturami Boiler Co., which is accessible from the HD 1300 via RS0232 serial terminal. The developed control system is operated on client program based on Java Applet independently from OS. Some experimental result shows the reliability and flexibility of the proposed system.
A current challenge in augmented reality applications is the accurate superimposition of synthetic objects on real objects within the environment. This challenge is heightened when the real objects are in motion and/o...
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In this paper, we investigate the performance of reservation mechanisms for optical burst switching (OBS) in multiple hop network environments. We first review current research on wavelength reservation sch.mes for OB...
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In this paper, we investigate the performance of reservation mechanisms for optical burst switching (OBS) in multiple hop network environments. We first review current research on wavelength reservation sch.mes for OBS, and investigate the path length priority effect of existing just-enough-time (JET) sch.me. And then, we propose a novel hop-by-hop priority increasing (HPI) sch.me. The simulation results showed that the proposed sch.me could avoid the path length priority effect and enhance the end-to-end throughput in multiple hop network environments.
Microwave noise technique is applied to study energy dissipation in an AlN/GaN heterostructure containing a two-dimensional elec.ron gas channel. Measurements of the dissipated power and the noise temperature are perf...
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Microwave noise technique is applied to study energy dissipation in an AlN/GaN heterostructure containing a two-dimensional elec.ron gas channel. Measurements of the dissipated power and the noise temperature are performed at 80 K lattice temperature in the elec.ric field range up to 40 kV/cm. The energy relaxation time is found to decrease from 40 ps to 0.55 ps when the bias is increased. The experimental data are discussed in the elec.ron temperature approximation assuming elec.ron energy dissipation on optical phonons and hot-phonon effects. Dependencies of the hot-phonon number and the hot-phonon temperature on the hot-elec.ron temperature are deduced. The frequency cutoff imposed by the limited energy dissipation through optical phonons is estimated.
MEMS switches based on a dual actuation sch.me that simultaneously allows for large standoff heights and low clamping voltages have been fabricated. The switches consist of a magnetically-driven component and an elec....
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ISBN:
(纸本)0791835553
MEMS switches based on a dual actuation sch.me that simultaneously allows for large standoff heights and low clamping voltages have been fabricated. The switches consist of a magnetically-driven component and an elec.rostatically-driven component. These devices are based on the use of a transient external magnetic field to bring the actuating portion of the switch (made of elec.roplated NiFe) close to a dielec.ric-coated clamping elec.rode, followed by application of an elec.rostatic clamping voltage to keep the switch closed. Since the clamping voltage is applied when the switch is closed, this voltage can be relatively small. This approach is particularly attractive for reconfigurable arrays of switches. Arrays of switches are simultaneously closed by the magnetic field generated by an off-substrate magnetic source. Selec.ed switches are clamped by elec.rostatic force using low voltages to maintain the ON state. With this sch.me, reconfigurable patterns on an array of switches are possible. These switches possess a large open state air gap (25-35 μm), and are able to pass high currents in excess of 1 A. The large OFF state impedance, then, allows for their usage in switching applications in reconfigurable aperture antennas.
Wafer Level Packaging (WLP) of microelec.ronic circuitry, in which critical package elements are formed on the silicon wafer prior to dicing, has several advantages over conventional packaging techniques, such as one-...
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ISBN:
(纸本)0791835553
Wafer Level Packaging (WLP) of microelec.ronic circuitry, in which critical package elements are formed on the silicon wafer prior to dicing, has several advantages over conventional packaging techniques, such as one-step testability of multiple chips on a silicon wafer prior to dicing, and the possibility of high input-output (I/O) density. One of the critical elements of WLP is the interconnect. Freely movable interconnects, which act like springs when thermally and mechanically loaded, can be used to relieve thermal and bonding-generated stresses, potentially resulting in improved testablility and reliability in WLP. In this work, flexible free-standing and no-underfill inteconnects were fabricated in a CMOS-compatible surface micromachining technology directly on a silicon wafer. The compliance of these interconnects up to 50 microns in the direction normal to the wafer was measured. Deflections and thermal expansions under mechanical-thermal stress were also simulated using finite element methods. Good agreement was achieved between the measured compliance and that predicted by the finite element analysis.
Reported here is the vertical integration of submicron P-MOSFETs in two separate layers of SOI device islands fabricated using the selec.ive epitaxial growth and epitaxial lateral overgrowth of silicon (SEG/ELO). The ...
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ISBN:
(纸本)9781581133516
Reported here is the vertical integration of submicron P-MOSFETs in two separate layers of SOI device islands fabricated using the selec.ive epitaxial growth and epitaxial lateral overgrowth of silicon (SEG/ELO). The fabrication technique has the potential for three-dimensional device integration. Underlying P-MOSFETs in the first SOI device layer experienced all the process steps required to fabricate devices on the second layer SOI islands. The fully-depleted first layer SOI P-MOSFET device (Leff= 0.6 μm) characteristics showed normal MOSFET behavior, low off-state leakage currents below 0.2 pA/μm with a subthreshold slope as low as 65 mV/dec. The P-MOSFETs in the second SOI layer (Leff= 0.4 μm) showed normal device characteristics similar to those fabricated in the first SOI layer without second level devices.
This paper presents the design, fabrication, and characterization of a one-dimensional microscale heater array testbed that allows assessment of the spatial variation of temperature. Each pixel of the array acts as bo...
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ISBN:
(纸本)0791835553
This paper presents the design, fabrication, and characterization of a one-dimensional microscale heater array testbed that allows assessment of the spatial variation of temperature. Each pixel of the array acts as both a heater and a resistive temperature sensor simultaneously. The heater/sensor array is designed to mimic heat generation by line arrays of vertical-cavity surface emitting lasers (VCSELs), in order to assess microfluidic cooling sch.mes for these laser arrays. The array discussed in this paper is a linear micro array consisting of 100 heater elements, each of which has a 75μm pitch, and a nominal 20μm×20μm resistive heating area. Platinum is used for the heater as well as the resistive thermal sensor, since the resistance of platinum as a function of temperature shows extremely good linearity. A total of 101 probe pads are placed between the pixels to apply current for the heater function or to determine temperature for the sensor function. The array is fabricated on a silicon substrate and is diced to a size of 1.2mm × 8mm to match a typical VCSEL array size. Local heating and local cooling experiments (i.e., individual heater pixel or pixel groups) have been performed and demonstrate the versatility of the fabricated thermal testbed.
This paper proposes a modified jointly-blue noise mask (MJBNM) method using an S-CIELAB color measure. For color image halftoning, the jointly-blue noise mask (JBNM) method provides a visually pleasing pattern for sin...
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This paper proposes a modified jointly-blue noise mask (MJBNM) method using an S-CIELAB color measure. For color image halftoning, the jointly-blue noise mask (JBNM) method provides a visually pleasing pattern for single and multiple color planes. However, the halftone outputs of a JBNM mask show a higher chrominance error. The SCIELAB metric, a modified color metric from CIELAB, includes the spatial-color sensitivity of the human eye in the metric to account for how spatial patterns influence color appearance and color discrimination. To reduce the chrominance error, the low-pass filtered error and SCIELAB chrominance error are both considered during the mask generation procedure and calculated for single and combined patterns. Based on the calculated low-pass filtered error, the patterns are then updated by either adding or removing dots from the multiple binary patterns. Finally, the pattern that shows the lower S-CIELAB chrominance error is selec.ed. The proposed algorithm can produce a visually pleasing halftoned image with a lower chrominance error than the JBNM method.
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