This paper describes the architecture and implementation of Tianwang QA system2006, which works for the TREC QA Main task this year. The main improvement is: 1. add one well founded knowledge source from Web - Wikiped...
详细信息
This paper describes the architecture and implementation of Tianwang QA system2006, which works for the TREC QA Main task this year. The main improvement is: 1. add one well founded knowledge source from Web - Wikipedia, and employ some natural language processing technologies to extract high quality answers;2. design and implement a new translation algorithm in query generation. The results show that fine organized knowledge source is effective in answering all three types of questions. And such query generation algorithm can be benefit from both Frequent Asked Questions on Web and past TREC QA data.
An embedded system is called a multi-mode embedded system if it performs multiple applications by dynamically reconfiguring the system functionality. Further, the embedded system is called a multi-mode multi-task embe...
详细信息
An embedded system is called a multi-mode embedded system if it performs multiple applications by dynamically reconfiguring the system functionality. Further, the embedded system is called a multi-mode multi-task embedded system if it additionally supports multiple tasks to be executed in a mode. In this paper, we address an important HW/SW partitioning problem, that is, HW/SW partitioning of multi-mode multi-task embedded applications with timing constraints of tasks. The objective of the optimization problem is to find a minimal total system cost of allocation/mapping of processing resources to functional modules in tasks together with a schedule that satisfies the timing constraints. The key success of solving the problem is closely related to the degree of the amount of utilization of the potential parallelism among the executions of modules. However, due to an inherently excessively large search space of the parallelism, and to make the task of schedulability analysis easy, the prior HW/SW partitioning methods have not been able to fully exploit the potential parallel execution of modules. To overcome the limitation, we propose a set of comprehensive HW/SW partitioning techniques which solve the three subproblems of the partitioning problem simultaneously: (1) allocation of processing resources, (2) mapping the processing resources to the modules in tasks, and (3) determining an execution schedule of modules. Specifically, based on a precise measurement on the parallel execution and schedulability of modules, we develop a stepwise refinement partitioning technique for single-mode multi-task applications, which aims to solve the subproblems 1, 2 and 3 effectively in an integrated fashion. The proposed techniques is then extended to solve the HW/SW partitioning problem of multi-mode multi-task applications (i.e., to find a globally optimized allocation/mapping of processing resources with feasible execution schedule of modules). From experiments with a set of rea
In deep-submicron designs, the interconnects are equally as or more important than the logic gates. In particular, to achieve timing closure, it is necessary and critical to consider the interconnect delay at an early...
详细信息
We have developed scanning laser range sensor called "SOKUIKI" sensor which is ultra-small scanning laser range sensor adopted for various types of mobile robots as we have already published. As a sensor for...
详细信息
In this paper, we present the architecture of the interactive T-DMB system using the CDMA network for the new interactive broadcasting services. We also propose the structure of the new platform based on WIPI to link ...
详细信息
This paper presents a new topological localization system for mobile robot navigation based on salient visual regions. These salient regions are obtained by computing the opponencies of color and texture among multi-s...
详细信息
Energy efficiency of cache memories is crucial in designing embedded processors. Reducing energy consumption in the instruction cache is especially important, since the instruction cache consumes a significant portion...
详细信息
One vision of dynamic hardware reconfiguration is to deliver virtually unlimited hardware resources to a set of hardware tasks implementing arbitrary functions. By using partial reconfiguration, these tasks can be all...
详细信息
ISBN:
(纸本)1595933026
One vision of dynamic hardware reconfiguration is to deliver virtually unlimited hardware resources to a set of hardware tasks implementing arbitrary functions. By using partial reconfiguration, these tasks can be allocated and de-allocated on the reconfigurable architecture while others continue to operate. However, the exact placement of each task can only be determined during runtime according to the current resource allocation. This requires relocating each task from its original position after place and route to an area of available resources. The process of relocating tasks can result in a major time overhead. In order to solve this problem we have developed the REPLICA2Pro (Relocation per online Configuration Alteration in Virtex-2/-Pro) filter, which is capable of performing task relocations by manipulating the task's bitstream during the regular allocation process without any extra time overhead. The filter architecture, our reconfigurable system approach as well as our design flow and an experimental system setup are presented in this paper. Copyright 2006 ACM.
In relation to the accidents due to bird nests in contact with overhead distribution lines, the authors investigated on deterioration of covered conductor by corona discharge. To simulate the situation where conductiv...
详细信息
In relation to the accidents due to bird nests in contact with overhead distribution lines, the authors investigated on deterioration of covered conductor by corona discharge. To simulate the situation where conductive nest material such as wire is in contact with both of an arm and a covered conductor, a copper wire was wound around the covered conductor and was grounded through a resistor which is used to observe corona discharge current waveform. The state of normal operation of 6.6 kV distribution line was considered and A.C. 3.8 kV was applied between the conductor and the ground. Weak corona discharge was observed. In order to carry out the acceleration test, A.C. 6.6 kV was applied. The insulation was punctured after 3760 hours. From the observation of cumulative charge by corona discharge the acceleration factor was estimated about 4. From the acceleration factor estimated, the life of conductor cover will be 627 days.
In this study, we use the strip-bending test to measure the residual stress of a thin film structure. The principle of the strip bending test and the test procedures are described and the analysis of the strip deforma...
详细信息
In this study, we use the strip-bending test to measure the residual stress of a thin film structure. The principle of the strip bending test and the test procedures are described and the analysis of the strip deformation is presented. The explicit formula for estimating the residual stress is given, which requires the initial stress as an input. As an example, the E-beam evaporated Au thin film is chosen, and the residual stress is measured by the present method. The Au thin film structure has a tensile or compressive residual stress depending on the film thickness. The tensile and the compressive residual stresses of Au thin film are successfully measured by the present method.
暂无评论