Secure Aggregation (SA), in the Federated Learning (FL) setting, enables distributed clients to collaboratively learn a shared global model while keeping their raw data and local gradients private. However, when SA is...
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Deep learning methods have played a prominent role in the development of computer visualization in recent years. Hyperspectral imaging (HSI) is a popular analytical technique based on spectroscopy and visible imaging ...
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Multilabel adversarial examples have become a threat to deep neural network models (DNNs). Most of the current work on multilabel adversarial examples are focused on white-box environments. In this article, we fo...
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Understanding and predicting air quality is pivotal for public health and environmental management, especially in urban areas like Delhi. This study utilizes a comprehensive dataset from the Central Pollution Control ...
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This article designs a 14-bit successive approximation register analog-to-digital converter(SAR ADC).A novel digital bubble sorting calibration method is proposed and applied to eliminate the effect of capacitor mis...
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This article designs a 14-bit successive approximation register analog-to-digital converter(SAR ADC).A novel digital bubble sorting calibration method is proposed and applied to eliminate the effect of capacitor mismatch on the linearity of the SAR ADC. To reduce the number of capacitors, a hybrid architecture of a high 8-bit binary-weighted capacitor array and a low 6-bit resistor array is adopted by the digital-to-analog(DAC). The common-mode voltage VCM-based switching scheme is chosen to reduce the switching energy and area of the DAC. The time-domain comparator is employed to obtain lower power consumption. Sampling is performed through a gate voltage bootstrapped switch to reduce the nonlinear errors introduced when sampling the input signal. Moreover, the SAR logic and the whole calibration is totally implemented on-chip through digital integrated circuit(IC) tools such as design compiler, IC compiler, etc. Finally, a prototype is designed and implemented using 0.18 μm bipolar-complementary metal oxide semiconductor(CMOS)-double-diffused MOS 1.8 V CMOS technology. The measurement results show that the SAR ADC with on-chip bubble sorting calibration method achieves the signal-to-noise-and-distortion ratio of 69.75 dB and the spurious-free dynamic range of 83.77 dB.
Infrared and visible image fusion (IVIF) aims to generate fused images with prominent targets and rich scene information. However, in low-light conditions, visible images lose accurate texture and color, reducing thei...
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The operating comfort of biological microscopes is directly related to the operators’ health and the accuracy of observation results. In this paper, the neck and arm comfort of biological microscope operators was res...
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The Internet of Things (IoT) environment contains many different types of devices, each with different functionalities, communication protocols, and security capabilities, which makes the IoT a complex challenge for s...
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Digital signatures, essential for establishing trust in the digital realm, have evolved in their application and importance alongside emerging technologies such as the Internet of Things (IoT), Blockchain, and cryptoc...
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This paper introduces LLDif, a novel diffusion-based facial expression recognition (FER) framework tailored for extremely low-light (LL) environments. Images captured under such conditions often suffer from low bright...
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