Temporal knowledge graph(TKG) reasoning, has seen widespread use for modeling real-world events, particularly in extrapolation settings. Nevertheless, most previous studies are embedded models, which require both enti...
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Temporal knowledge graph(TKG) reasoning, has seen widespread use for modeling real-world events, particularly in extrapolation settings. Nevertheless, most previous studies are embedded models, which require both entity and relation embedding to make predictions, ignoring the semantic correlations among different entities and relations within the same timestamp. This can lead to random and nonsensical predictions when unseen entities or relations occur. Furthermore, many existing models exhibit limitations in handling highly correlated historical facts with extensive temporal depth. They often either overlook such facts or overly accentuate the relationships between recurring past occurrences and their current counterparts. Due to the dynamic nature of TKG, effectively capturing the evolving semantics between different timestamps can be *** address these shortcomings, we propose the recurrent semantic evidenceaware graph neural network(RE-SEGNN), a novel graph neural network that can learn the semantics of entities and relations simultaneously. For the former challenge, our model can predict a possible answer to missing quadruples based on semantics when facing unseen entities or relations. For the latter problem, based on an obvious established force, both the recency and frequency of semantic history tend to confer a higher reference value for the current. We use the Hawkes process to compute the semantic trend, which allows the semantics of recent facts to gain more attention than those of distant facts. Experimental results show that RE-SEGNN outperforms all SOTA models in entity prediction on 6 widely used datasets, and 5 datasets in relation prediction. Furthermore, the case study shows how our model can deal with unseen entities and relations.
Data race is one of the most important concurrent anomalies in multi-threaded *** con-straint-based techniques are leveraged into race detection,which is able to find all the races that can be found by any oth-er soun...
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Data race is one of the most important concurrent anomalies in multi-threaded *** con-straint-based techniques are leveraged into race detection,which is able to find all the races that can be found by any oth-er sound race ***,this constraint-based approach has serious limitations on helping programmers analyze and understand data ***,it may report a large number of false positives due to the unrecognized dataflow propa-gation of the ***,it recommends a wide range of thread context switches to schedule the reported race(in-cluding the false one)whenever this race is exposed during the constraint-solving *** ad hoc recommendation imposes too many context switches,which complicates the data race *** address these two limitations in the state-of-the-art constraint-based race detection,this paper proposes DFTracker,an improved constraint-based race detec-tor to recommend each data race with minimal thread context ***,we reduce the false positives by ana-lyzing and tracking the dataflow in the *** this means,DFTracker thus reduces the unnecessary analysis of false race *** further propose a novel algorithm to recommend an effective race schedule with minimal thread con-text switches for each data *** experimental results on the real applications demonstrate that 1)without removing any true data race,DFTracker effectively prunes false positives by 68%in comparison with the state-of-the-art constraint-based race detector;2)DFTracker recommends as low as 2.6-8.3(4.7 on average)thread context switches per data race in the real world,which is 81.6%fewer context switches per data race than the state-of-the-art constraint based race ***,DFTracker can be used as an effective tool to understand the data race for programmers.
Graph processing has been widely used in many scenarios,from scientific computing to artificial *** processing exhibits irregular computational parallelism and random memory accesses,unlike traditional ***,running gra...
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Graph processing has been widely used in many scenarios,from scientific computing to artificial *** processing exhibits irregular computational parallelism and random memory accesses,unlike traditional ***,running graph processing workloads on conventional architectures(e.g.,CPUs and GPUs)often shows a significantly low compute-memory ratio with few performance benefits,which can be,in many cases,even slower than a specialized single-thread graph *** domain-specific hardware designs are essential for graph processing,it is still challenging to transform the hardware capability to performance boost without coupled software *** article presents a graph processing ecosystem from hardware to *** start by introducing a series of hardware accelerators as the foundation of this ***,the codesigned parallel graph systems and their distributed techniques are presented to support graph ***,we introduce our efforts on novel graph applications and hardware *** results show that various graph applications can be efficiently accelerated in this graph processing ecosystem.
Container-based virtualization isbecoming increasingly popular in cloud computing due to its efficiency and *** isolation is a fundamental property of *** works have indicated weak resource isolation could cause signi...
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Container-based virtualization isbecoming increasingly popular in cloud computing due to its efficiency and *** isolation is a fundamental property of *** works have indicated weak resource isolation could cause significant performance degradation for containerized applications and enhanced resource ***,current studies have almost not discussed the isolation problems of page cache which is a key resource for *** leverage memory cgroup to control page cache ***,existing policy introduces two major problems in a container-based ***,containers can utilize more memory than limited by their cgroup,effectively breaking memory ***,the Os kernel has to evict page cache to make space for newly-arrived memory requests,slowing down containerized *** paper performs an empirical study of these problems and demonstrates the performance impacts on containerized *** we propose pCache(precise control of page cache)to address the problems by dividing page cache into private and shared and controlling both kinds of page cache separately and *** do so,pCache leverages two new technologies:fair account(f-account)and evict on demand(EoD).F-account splits the shared page cache charging based on per-container share to prevent containers from using memory for free,enhancing memory *** EoD reduces unnecessary page cache evictions to avoid the performance *** evaluation results demonstrate that our system can effectively enhance memory isolation for containers and achieve substantial performance improvement over the original page cache management policy.
Hybrid memory systems composed of dynamic random access memory(DRAM)and Non-volatile memory(NVM)often exploit page migration technologies to fully take the advantages of different memory *** previous proposals usually...
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Hybrid memory systems composed of dynamic random access memory(DRAM)and Non-volatile memory(NVM)often exploit page migration technologies to fully take the advantages of different memory *** previous proposals usually migrate data at a granularity of 4 KB pages,and thus waste memory bandwidth and DRAM *** this paper,we propose Mocha,a non-hierarchical architecture that organizes DRAM and NVM in a flat address space physically,but manages them in a cache/memory *** the commercial NVM device-Intel Optane DC Persistent Memory Modules(DCPMM)actually access the physical media at a granularity of 256 bytes(an Optane block),we manage the DRAM cache at the 256-byte size to adapt to this feature of *** design not only enables fine-grained data migration and management for the DRAM cache,but also avoids write amplification for Intel Optane *** also create an Indirect Address Cache(IAC)in Hybrid Memory Controller(HMC)and propose a reverse address mapping table in the DRAM to speed up address translation and cache ***,we exploit a utility-based caching mechanism to filter cold blocks in the NVM,and further improve the efficiency of the DRAM *** implement Mocha in an architectural *** results show that Mocha can improve application performance by 8.2%on average(up to 24.6%),reduce 6.9%energy consumption and 25.9%data migration traffic on average,compared with a typical hybrid memory architecture-HSCC.
Reachability query plays a vital role in many graph analysis *** researches proposed many methods to efficiently answer reachability queries between vertex *** many real graphs are labeled graph,it highly demands Labe...
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Reachability query plays a vital role in many graph analysis *** researches proposed many methods to efficiently answer reachability queries between vertex *** many real graphs are labeled graph,it highly demands Label-Constrained Reachability(LCR)query inwhich constraint includes a set of labels besides vertex *** researches proposed several methods for answering some LCR queries which require appearance of some labels specified in constraints in the *** that constraint may be a label set,query constraint may be ordered labels,namely OLCR(Ordered-Label-Constrained Reachability)queries which retrieve paths matching a sequence of ***,no solutions are available for ***,we propose DHL,a novel bloom filter based indexing technique for answering OLCR *** can be used to check reachability between vertex *** the answers are not no,then constrained DFS is ***,we employ DHL followed by performing constrained DFS to answer OLCR *** show that DHL has a bounded false positive rate,and it's powerful in saving indexing time and *** experiments on 10 real-life graphs and 12 synthetic graphs demonstrate that DHL achieves about 4.8-22.5 times smaller index space and 4.6-114 times less index construction time than two state-of-art techniques for LCR queries,while achieving comparable query response *** results also show that our algorithm can answer OLCR queries effectively.
Mobile crowdsensing is a popular platform that takes advantage of the onboard sensors and resources on mobile nodes. The crowdsensing platform chooses to assign several sensing tasks each day, whose utility is based o...
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Mobile crowdsensing is a popular platform that takes advantage of the onboard sensors and resources on mobile nodes. The crowdsensing platform chooses to assign several sensing tasks each day, whose utility is based on the quality of harvested sensing data, the payment of transmitting data, and the recruitment of mobile nodes. An Internet serviceprovider (ISP) selects a portion of access points (APs) to power on for uploading data, whose utility depends on threeparts: the traffic income of transmitting sensing data, the energy cost of operating APs, and the energy cost of data transmissions by APs. The interaction between the crowdsensing platform and ISP is formulated as an iterated game, with social welfare defined as the sum of their expected utilities. In this paper, our objective is to unilaterally control social welfare without considering the opponent’s strategy, with the aim of achieving stable and maximized social welfare. Toachieve this goal, we leverage the concept of a zero-determinant strategy in the game theory. We introduce a zero-determinant strategy for the vehicular crowdsensing platform (ZD-VCS) and analyze it in discrete and continuous models in thevehicular crowdsensing scenario. Furthermore, we analyze an extortion strategy between the platform and ISP. Experimental results demonstrate that the ZD-VCS strategy enables unilateral control of social welfare, leading to a high andstable value.
Software-defined networks(SDNs) present a novel network architecture that is widely used in various datacenters. However, SDNs also suffer from many types of security threats, among which a distributed denial of servi...
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Software-defined networks(SDNs) present a novel network architecture that is widely used in various datacenters. However, SDNs also suffer from many types of security threats, among which a distributed denial of service(DDoS) attack, which aims to drain the resources of SDN switches and controllers,is one of the most common. Once the switch or controller is damaged, the network services can be *** defense schemes against DDoS attacks have been proposed from the perspective of attack detection;however, such defense schemes are known to suffer from a time consuming and unpromising accuracy, which could result in an unavailable network service before specific countermeasures are taken. To address this issue through a systematic investigation, we propose an elaborate resource-management mechanism against DDoS attacks in an SDN. Specifically, by considering the SDN topology, we leverage the M/M/c queuing model to measure the resistance of an SDN to DDoS attacks. Network administrators can therefore invest a reasonable number of resources into SDN switches and SDN controllers to defend against DDoS attacks while guaranteeing the quality of service(QoS). Comprehensive analyses and empirical data-based experiments demonstrate the effectiveness of the proposed approach.
Modern recommendation systems are widely used in modern data *** random and sparse embedding lookup operations are the main performance bottleneck for processing recommendation systems on traditional platforms as they...
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Modern recommendation systems are widely used in modern data *** random and sparse embedding lookup operations are the main performance bottleneck for processing recommendation systems on traditional platforms as they induce abundant data movements between computing units and ***-based processing-in-memory(PIM)can resolve this problem by processing embedding vectors where they are ***,the embedding table can easily exceed the capacity limit of a monolithic ReRAM-based PIM chip,which induces off-chip accesses that may offset the PIM ***,we deploy the decomposed model on-chip and leverage the high computing efficiency of ReRAM to compensate for the decompression performance *** this paper,we propose ARCHER,a ReRAM-based PIM architecture that implements fully yon-chip recommendations under resource ***,we make a full analysis of the computation pattern and access pattern on the decomposed *** on the computation pattern,we unify the operations of each layer of the decomposed model in multiply-and-accumulate *** on the access observation,we propose a hierarchical mapping schema and a specialized hardware design to maximize resource *** the unified computation and mapping strategy,we can coordinatethe inter-processing elements *** evaluation shows that ARCHER outperforms the state-of-the-art GPU-based DLRM system,the state-of-the-art near-memory processing recommendation system RecNMP,and the ReRAM-based recommendation accelerator REREC by 15.79×,2.21×,and 1.21× in terms of performance and 56.06×,6.45×,and 1.71× in terms of energy savings,respectively.
Graphs that are used to model real-world entities with vertices and relationships among entities with edges,have proven to be a powerful tool for describing real-world problems in *** most real-world scenarios,entitie...
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Graphs that are used to model real-world entities with vertices and relationships among entities with edges,have proven to be a powerful tool for describing real-world problems in *** most real-world scenarios,entities and their relationships are subject to constant *** that record such changes are called dynamic *** recent years,the widespread application scenarios of dynamic graphs have stimulated extensive research on dynamic graph processing systems that continuously ingest graph updates and produce up-to-date graph analytics *** the scale of dynamic graphs becomes larger,higher performance requirements are demanded to dynamic graph processing *** the massive parallel processing power and high memory bandwidth,GPUs become mainstream vehicles to accelerate dynamic graph processing ***-based dynamic graph processing systems mainly address two challenges:maintaining the graph data when updates occur(i.e.,graph updating)and producing analytics results in time(i.e.,graph computing).In this paper,we survey GPU-based dynamic graph processing systems and review their methods on addressing both graph updating and graph *** comprehensively discuss existing dynamic graph processing systems on GPUs,we first introduce the terminologies of dynamic graph processing and then develop a taxonomy to describe the methods employed for graph updating and graph *** addition,we discuss the challenges and future research directions of dynamic graph processing on GPUs.
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