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Asilomar Conference on Signals, systems & computers

作者： W.Y. Kan J.V. Krogmeier School of Electrical and Computer Engineering Purdue University West Lafayette IN USA Purdue University System West Lafayette IN US

A suboptimal algorithm is proposed for target tracking in clutter. The exact posterior density of a target state conditioned on the past observation history is a Gaussian mixture with the number of terms equal to the number of possible ways to associate observations and targets. In order to avoid an exponentially growing complexity, the algorithm performs an approximation by naturally partitioning and grouping the target state estimates into a set of approximate sufficient statistics. A new criterion function is introduced in this approximation process. The well-known probabilistic data association (PDA) filter is a special case of the algorithm.

关键词： Target tracking Clustering algorithms Sea measurements Filters Personal digital assistants Noise measurement Density measurement Bayesian methods Partitioning algorithms State estimation

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Design of an ultrafast optical processing chip

Design of an ultrafast optical processing chip

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IEEE International Symposium on Circuits and systems (ISCAS)

作者： L. Chiou K.M. Mahoney K.T. Kornegay A.M. Weiner School of Electrical and Computer Engineering Purdue University West Lafayette IN USA Purdue University System West Lafayette IN US

This paper describes the design of an ultrafast optical processing (UOP) chip that will be used in a pulse shaping and holographic processing optical system. The UOP chip uses a new technology that combines the performance advantage of GaAs devices with the density advantage of conventional CMOS. Testing features of the UOP chip will also be presented.

关键词： Optical design Ultrafast optics Optical modulation Circuit testing Holographic optical components Optical pulse shaping High speed optical techniques Holography Pulse modulation Optical transmitters

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A Bayesian approach to error concealment in encoded video streams

A Bayesian approach to error concealment in encoded video st...

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IEEE International Conference on Image Processing

作者： P. Salama N. Shroff E.J. Delp Computer Vision and Image Processing Laboratory Purdue Multimedia Testbed Laboratory School of Electrical Engineering Purdue University West Lafayette IN USA Purdue University System West Lafayette IN US

In ATM networks cell loss causes data to be dropped in the channel. When digital video is transmitted over these networks one must be able to reconstruct the missing data so that the impact of these errors is minimized. In this paper we describe a Bayesian approach to conceal these errors. Assuming that the digital video has been encoded using the MPEG1 or MPEG2 compression scheme, each frame is modeled as a Markov random field. A maximum a posteriori estimate of the missing macroblocks and motion vectors is described based on the model.

关键词： Bayesian methods Streaming media Intelligent networks Laboratories Markov random fields Video sequences Interpolation Image reconstruction Motion estimation computer errors

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Exploiting instruction level parallelism with the DS architecture

Exploiting instruction level parallelism with the DS archite...

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International Conference on Parallel Processing (ICPP)

作者： Yinong Zhang G.B. Adam School of Electrical and Computer Engineering Purdue University West Lafayette IN USA Purdue University System West Lafayette IN US Sch. of Electr. Eng. Purdue Univ. West Lafayette IN USA

A new architecture, DS, for exploiting instruction level parallelism is proposed in this paper. DS splits the program into two instruction substreams with the dominant one navigating the control flow and the subsidiary one carrying out the rest of the computational task. Compiler techniques associated with the DS architecture are discussed, with the goal of minimizing communication and balancing computation. Performance is compared with an aggressive 8-way superscalar processor. In general, DS can deliver the same IPC as the superscalar. This is achieved with less complex hardware and better potential for fast clock rates.

关键词： computer architecture Parallel processing computer aided instruction Clocks Concurrent computing Hardware Delay Runtime Registers Navigation

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Development of transient stability controller system (TSC) based on on-line stability calculation

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electrical engineering IN JAPAN 1996年第4期117卷 61-79页

作者： Ota, H Inoue, T Ito, H Fukushima, N Omata, K Morita, K Kokai, Y Chubu Electric Power Co. Graduated in 1955 from the Department of Electrical Engineering of the Faculty of Engineering University of Tokyo and joined Chubu Electric Power Co. in the same year. He is engaged mainly in developing technology for construction planning as well as protection stabilization and automatic control of power systems. He is currently a Director and Vice President of the company. He received an OHM Technology Award in 1971 and an Achievement Award from the I.E.E. Japan in 1992. Graduated in 1962 from the Department of Electrical Engineering Shibaura Institute of Technology and joined Chubu Electric Power Co. in the same year. He is engaged in the development of technology for large-scale centralized control of power systems as well as the networking of control computers. He is currently a System Analysis Group Chief in the System Operation Division of the company. Graduated in 1985 from the Department of Electronics and Electrical Engineering of the Faculty of Engineering Tokyo Institute of Technology and joined Chubu Electric Power Co. in the same year. He is engaged mainly in the development of technology for power system protection and stabilization. He is currently working in the System Analysis Group of the System Operation Division of the company. Toshiba Corporation Graduated in 1967 from the Department of Electrical Engineering University of Tokyo and joined Toshiba Corporation in the same year and engaged in development of power system control systems in Japan and abroad. He is currently a Chief of System Technology in the Power System Technology Division of the company. He is a member of the Theses Subcommittee of the 1995 World Energy Conference. He is an Assistant Secretary of the Japanese Committee of CIGRE and a member of the Japanese Subcommittee of CIGRE SC35 and 39. He is a member of IEEE. Completed his Master's course at the Science and Engineering Research Division of the Graduate School Waseda University in 1980 and joined Toshiba Corporation in the same year. H

A new transient stability controller system (TSC) based on on-line transient stability calculation has been developed. The TSC system prevents the power system from wide-area blackout by shedding generators optimally when a serious fault occurs. This system consists of a central processing unit (TSC-P), and four local units for fault detection (TSC-C), and seventeen units for generator shedding(TSC-T). The TSC-P selects optimal generators to be shed for stabilization based on on-line transient stability calculation for contingencies at 500 kV lines and buses every five minutes. The results are transmitted to the TSC-Cs periodically. Should any fault occur, only one TSC-C will detect the fault occurrence and send control signals to the TSC-Ts which actually generate shedding signals. To realize the TSC system, essential are fast stability evaluation methods for a large number of contingencies and effective selection methods of optimal generators to be shed for stabilization. This paper presents total algorithms applied in the TSC-P, the results of algorithm verification tests using a prototype system combined with a large-scale analog simulator, and the characteristics of the actual system.

关键词： power system stabilization generation shedding on-line stability calculation screening parallel calculation

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Reliability evaluation of highly reliable computer control systems for energy generation, transmission and distribution

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EUROPEAN TRANSACTIONS ON electrical POWER 1996年第2期6卷 111-118页

作者： Kochs, HD Dieterle, W Dittmar, E Prof. Dr.-Ing. Hans-Dieter Kochs (1943) VDE is head of the Department of Computer Science and Information Processing Systems at the Gerhard Mercator-University of Duisburgl Germany. He received the Dip1.-Ing. degree in Electrical Engineering and the Dr.-Ing. degree from the RWTH Aached Germany in 1972 and 1976 respectively. From 1979 to 1991 he was system engineer and division leader in the areas of R & D of highly-reliable large-scale control and information systems (AEGIDaimler FAG-Kugelfischer). Since 199 1 he has been Professor at the University of Duisburg. His current R & D areas are reliability safety and fault tolerance of technical systems especially automation systems and hybridknowledge based systems including fuzzy-logic and neural networks. (Gerhard-Menxitor-University-GH Duisburg FB 71FG 10 Lotharstr. 1 D-47048 Duisburg T +49203/379-2204 Fax +49203I379-2205) Dipl.-Ing. Werner Dieterle (1966). VDE received his degree in Electrical Engineering (Dip1.-Ing.) from the Technical University of Karlsruhd Germany in 1991. After having finished his studies he joined the scientific staff of the department of Computer Science and Information Processing Systems at the Gerhard-Mercator-University of Duisburgg Germany. His research interests include design of highly-reliable distributed computer control systems with particular focus on system communication. (Gerhard-Mercator-University -GH Duisburg FB 7/FG 10 Lothantr. 1 D-47048 Duisburg T +49203/3793483 Fax +49203/379-2205) Ing. (grad.) Ewald Dittmar (1943) received his degree in Electrical Engineering from the school of engineering in Mannheim/Germany. Since then he worked for different industrial companies and utilities. Since 1988 he has been with ABB/Germany where he cumntly is head of the strategy department of ABB Network Control and Rotection. He investigates new development strategies for modern control systems hardware and software architecture in the area of energy transmission and distribution. (ABB Netzleittechnik GmbH. Wallstadter S

The paper presents the results of an application-based reliability study of distributed computer control systems with very high reliability demand, e.g. for supervision and control of power plants and energy distribution systems. A reliability classification scheme is presented and typical redundant control system structures are evaluated and classified due to their system reliability Special focus is placed on assessing the influence of the communication system on total system reliability.

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Neural network applications

Neural network applications

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Electronic Technology Directions to the Year 2000

作者： E. Vonk L.C. Jain L.P.J. Veelenturf Control Systems and Computer Engineering Group BSC Laboratory for Network Theory Department of Electrical Engineering University of Twente Enschede Netherlands Knowledge-based Engineering System Group School of Electronic Engineering University of South Australia Adelaide Australia

Artificial neural networks, also called neural networks, have been used successfully in many fields including engineering, science and business. This paper presents the implementation of several neural network simulat... 详细信息

关键词： Neural networks Neurons Artificial neural networks systems engineering and theory Hopfield neural networks Process control Knowledge engineering Supervised learning Clustering algorithms Application software

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Automatic generation of a neural network architecture using evolutionary computation

Automatic generation of a neural network architecture using ...

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Electronic Technology Directions to the Year 2000

作者： E. Vonk L.C. Jain L.P.J. Veelenturf R. Johnson Control Systems and Computer Engineering Group BSC Laboratory for Network Theory Department of Electrical Engineering University of Twente Enschede Netherlands Knowledge-based Engineering System Group School of Electronic Engineering University of South Australia Adelaide Australia Weapons Systems Division Defence Science and Technology Organisation Salisbury SA Australia

This paper reports the application of evolutionary computation in the automatic generation of a neural network architecture. It is a usual practice to use trial and error to find a suitable neural network architecture. This is not only time consuming but may not generate an optimal solution for a given problem. The use of evolutionary computation is a step towards automation in architecture generation. In this paper a brief introduction to the field is given as well as an implementation of automatic neural network generation using genetic programming.< >

关键词： Neural networks computer architecture Evolutionary computation Genetic programming Network topology Genetic algorithms Biological cells systems engineering and theory Knowledge engineering Australia

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Windows computer laboratory as a tutorial for undergraduate electromagnetics

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computer Applications in engineering Education 1995年第3期3卷 183-183页

作者： McCulloch, J. Keddy, W.A. Stuchly, M.A. University of Victoria Department of Electrical and Computer Engineering University of Victoria Victoria British Columbia Canada Janet McCulloch:is a native of Toronto Canada where she briefly attended both York University and the University of Toronto before she set off on a year-long adventure through the Middle East and North Africa. When she returned to Canada she relocated to California. She spent a number of years living both in Los Angeles and coastal Northern California interspersed with several extended trips through the United States Mexico and Central America. Ms. McCulloch moved to Victoria British Columbia in 1989 and a year later registered in the cooperative education program in Electrical Engineering at the University of Victoria. She is presently in the fifth and final year of the program and has her sights set on graduate school. Besides the work described in this article she has been very much involved in the use of technology to assist in the delivery of curriculum at the senior secondary level. She lives on a country property a half-hour from the University with her husband her horse and three cats. W. Alfred Keddy:is an applications programmer/analyst for the Department of Electrical and Computer Engineering at the University of Victoria. He received a BEng (1988) in Electrical Engineering and an MASc (1994) from the University of Victoria. His research interests include distributed systems image processing local area networks VLSI and DSP system design for computation and communication and human–computer interface design. Maria A. Stuchly:received an MSc in Electrical Engineering in 1962 from Warsaw Technical University and a PhD in Electrical Engineering from the Polish Academy of Sciences in 1970. Between the years of 1962 and 1970 she was with the Warsaw Technical University an Institute of the Polish Academy of Sciences. After immigrating to Canada during 1970 her first position was with the University of Manitoba. In 1976 she became employed by the Bureau of Radi

Contents and implementation of a computer laboratory for undergraduate electromagnetics are described. The laboratory consists of four 3-hour sessions covering vector calculus, Maxwell's equations (integral and differential forms), wave propagation in materials, and wave behavior at planar interfaces. Each session contains theory (in the Help file), animations (where relevant) and a quiz. The program runs on IBM compatible 486-based PCs in a Windows environment and uses the Borland C ++ 4.0 compiler.

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New error probability upper bound on maximum likelihood sequence estimation for intersymbol interference channels 13th

New error probability upper bound on maximum likelihood sequ...

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13th International Zurich Seminar on Digital Communications, 1994

作者： Nogami, Hiroshi Stüber, Gordon L. Image & Media System Laboratory Hitachi Ltd. Yokohama244 Japan School of Electrical and Computer Engineering Georgia Institute of Technology AtlantaGA30332-0250 United States

ISBN: (纸本)9783540578567

A new upper bound on the error probability for maximum likelihood sequence estimation of digital signaling on intersymbol interference channels with additive white Gaussian noise is presented. Our approach is to exclude some overlapping error events from the union bound. The new upper bound can be efficiently computed by using an error-state diagram and a stack algorithm. An example is presented that compares the new upper bound with previously reported results in the literature. © Springer-Verlag Berlin Heidelberg 1994.

关键词： White noise

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