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Intrinsic excitonic emission and valley Zeeman splitting in epitaxial MS2(M=Mo and W)monolayers on hexagonal boron nitride

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Nano Research 2018年第12期11卷 6227-6236页

作者： Chunxiao Cong Chenji Zou Bingchen Cao Lishu Wu Jingzhi Shahg Haomin Wang Zhijun Qiu Laigui Hu Pengfei Tian Ran Liu Ting Yu State Key Laboratory of ASIC and System School of Information Science and TechnologyFudan UniversityShanghai 200433China Division of Physics and Applied Physics School of Physical and Mathematical SciencesNanyang Technological UniversitySingapore 637371Singapore State Key Laboratory of Functional Materials for Informatics Shanghai Institute of Microsystem and Information TechnologyChinese Academy of Sciences865Changning RoadShanghai200050China

Two-dimensional (2D) semiconductors, represented by 2D transition metal dichalcogenides (TMDs), exhibit rich valley physics due to strong spin-orbit/spin-valley coupling. The most common way to probe such 2D systems is to utilize optical methods, which can monitor light emissions from various excitonic states and further help in understanding the physics behind such phenomena. Therefore, 2D TMDs with good optical quality are in great demand. Here, we report a method to directly grow epitaxial WS₂ and MoS₂ monolayers on hexagonal boron nitride (hBN) flakes with a high yield and high optical quality; these monolayers show better intrinsic light emission features than exfoliated monolayers from natural crystals. For the first time, the valley Zeeman splitting of WS₂ and MoS₂ monolayers on hBN has been visualized and systematically investigated. This study paves a new way to produce high optical quality WS₂ and MoS₂ monolayers and to exploit their intrinsic properties in a multitude of applications.

关键词： transition metal dichalcogenides intrinsic excitonic emission valley Zeeman splitting hexagonal boron nitride chemical vapor deposition

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A High Performance DRAM Design Using U-FinFET as Access Transistor

A High Performance DRAM Design Using U-FinFET as Access Tran...

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International Conference on Solid-state and Integrated Circuit Technology

作者： Meng-Qi Wen Zhi-Yuan Ye Yue Li Zheng-Yuan Su Yao Yao Lei Liu Peng-Fei Wang State Key Laboratory of ASIC and System School of Microelectronics Fudan University Shanghai China

A DRAM based on U-shape Fin Field-Effect Transistor (U-FinFET) is investigated in this paper. Compared with the Recess-Channel-Array-Transistor (RCAT), this structure shows relatively high I on /I off ratio and excellent short channel behavior, such as low sub-threshold swing (SS) and suppressed drain induced barrier lowering (DIBL) effect. Furthermore, by Sentaurus TCAD simulation, DRAM cell based on U-FinFET shows high operation speed with writing time as short as 0.5 ns.

关键词： Random access memory Logic gates FinFETs Silicon Leakage currents Capacitors Performance evaluation

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A 1.0-to-2.4GHz Wideband VCO with Uniform Sub-band Interval and Constant Tuning Gain 12

A 1.0-to-2.4GHz Wideband VCO with Uniform Sub-band Interval ...

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2017 IEEE 12th International Conference on asic

作者： Chenyang Kong Xiaodong Liu Weigang Xu Zhangwen Tang ASIC & System State Key Laboratory School of MicroelectronicsFudan University

ISBN: (纸本)9781509066261;9781509066254

This paper presents a 1.0-to-2.4 GHz wideband voltage controlled oscillator(VCO) designed in TSMC 0.18μm CMOS technology process,which uses complementary *** its LC tank consists of a differential inductor,a main varactor pair,a varactor array and a capacitor array,those components realize 256 *** optimizing the array,the sub-band interval is kept 5.45 MHz,the tuning gain at the center of sub-band is kept 10.5 MHz/*** single side phase noise of the center frequency is-103.4 d Bc/Hz at 100 k Hz offset and-129.1 d Bc/Hz at 1 MHz *** whole circuit consumes 14.8 m A from 1.8 V supply voltage at the center frequency.

关键词： VCO A 1.0-to-2.4GHz Wideband VCO with Uniform Sub-band Interval and Constant Tuning Gain

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A convolutional neural network-based low complexity filter

arXiv

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arXiv 2020年

作者： Liu, Chao Sun, Heming Katto, Jiro Zeng, Xiaoyang Fan, Yibo State Key Laboratory of ASIC and System Fudan University Shanghai200433 China Waseda Research Institute for Science and Engineering Tokyo169-8555 Japan JST PRESTO 4-1-8 Honcho Kawaguchi Saitama332-0012 Japan Graduate School of Fundamental Science and Engineering Waseda University Tokyo169-8555 Japan

Convolutional Neural Network (CNN)-based filters have achieved significant performance in video artifacts reduction. However, the high complexity of existing methods makes it difficult to be applied in real usage. In this paper, a CNN-based low complexity filter is proposed. We utilize depth separable convolution (DSC) merged with the batch normalization (BN) as the backbone of our proposed CNN-based network. Besides, a weight initialization method is proposed to enhance the training performance. To solve the well known over smoothing problem for the inter frames, a frame-level residual mapping (RM) is presented. We analyze some of the mainstream methods like frame-level and block-level based filters quantitatively and build our CNN-based filter with frame-level control to avoid the extra complexity and artificial boundaries caused by block-level control. In addition, a novel module called RM is designed to restore the distortion from the learned residuals. As a result, we can effectively improve the generalization ability of the learning-based filter and reach an adaptive filtering effect. Moreover, this module is flexible and can be combined with other learning-based filters. The experimental results show that our proposed method achieves significant BD-rate reduction than H.265/HEVC. It achieves about 1.2% BD-rate reduction and 79.1% decrease in FLOPs than VR-CNN. Finally, the measurement on H.266/VVC and ablation studies are also conducted to ensure the effectiveness of the proposed method. Copyright © 2020, The Authors. All rights reserved.

关键词： Convolution

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Crystallization Process of Superlattice-Like Sb/SiO_2 Thin Films for Phase Change Memory Application

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Chinese Physics Letters 2018年第5期35卷 99-103页

作者： Xiao-Qin Zhu Rui Zhang Yi-Feng Hu Tian-Shu Lai Jian-Hao Zhang Hua Zou Zhi-Tang Song School of Mathematics and Physics Jiangsu University of TechnologyChangzhou 213001 State Key Laboratory of Optoelectronic Materials and Technologies School of PhysicsSun Yat-Sen UniversityCuangzhou 510275 State Key Laboratory of Silicon Materials Zhejiang UniversityHangzhou 310027 Key Laboratory of Microelectronic Devices ＆ Integrated Technology Institute of MicroelectronicsChinese Academy of SciencesBeijing 100029 State Key Laboratory of Fhnctional Materials for informatics Shanghai Institute of Micro-System and Information TechnologyChinese Academy of SciencesShanghai 200050

After compositing with SiO_2 layers, it is shown that superlattice-like Sb/SiO_2 thin films have higher crystallization temperature（~240°C）, larger crystallization activation energy（6.22 e V）, and better data retention ability（189°C for 10 y）. The crystallization of Sb in superlattice-like Sb/SiO_2 thin films is restrained by the multilayer interfaces. The reversible resistance transition can be achieved by an electric pulse as short as 8 ns for the Sb（3 nm）/SiO_2（7 nm）-based phase change memory cell. A lower operation power consumption of 0.09 m W and a good endurance of 3.0 × 10~6 cycles are achieved. In addition, the superlattice-like Sb（3 nm）/SiO_2（7 nm） thin film shows a low thermal conductivity of 0.13 W/（m·K）.

关键词： Sb Crystallization Process of Superlattice-Like Sb/SiO2 Thin Films for Phase Change Memory Application SiO

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A 18 mW 12 bit 50 MS/s SHA-less Pipelined ADC 12

A 18 mW 12 bit 50 MS/s SHA-less Pipelined ADC

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2017 IEEE 12th International Conference on asic

作者： Weigang Xu Yifan Gao Xiaodong Liu Zhangwen Tang ASIC & System State-Key Laboratory School of MicroelectronicsFudan University

ISBN: (纸本)9781509066261;9781509066254

A 12 bit 50 MS/s pipelined analog-to-digital converter(ADC) without sample-and-hold amplifier(SHA) is achieved with 18 m W power consumption and a differential input voltage of 1.2 *** the front-end stage,the structure and time constant of sampling network in multiplying D/A converter(MDAC) and sub-ADC are designed similar to minimize aperture ***-embedded dual-input opamps are used to avoid memory effect in opamp-sharing *** a 0.18 um 1.8 V TSMC CMOS process,this work achieves over 68.9 d B SNDR at a 5 MHz input and a 50 MHz sampling frequency as temperature sweeps from-55 ℃ to 125 ℃.

关键词： A 18 mW 12 bit 50 MS/s SHA-less Pipelined ADC SHA

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A Broadband Power Detector with Temperature and Process compensation 12

A Broadband Power Detector with Temperature and Process comp...

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2017 IEEE 12th International Conference on asic

作者： Yifan Gao Weigang Xu Chenyang Kong Zhangwen Tang ASIC & System State-Key Laboratory School of MicroelectronicsFudan University

ISBN: (纸本)9781509066261;9781509066254

A wideband radio-frequency(RF) power detection system is *** detection system occupies 0.18 μm CMOS process,consumes 7 m W and works at frequency ranging from 70 MHz to 1 *** compensation techniques are used in this paper to control the fluctuation of the *** output response is process and temperature independent,varying by less than 0.9 d Bm as temperature sweeps from-55℃ to 125℃ and process covers all extreme *** system achieves 15 d Bm of dynamic range with less than 0.2 d Bm of error as frequency is swept across the working spectrum.

关键词： PGA A Broadband Power Detector with Temperature and Process compensation

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Atomic Layer Deposited Hf0.5Zr0.5O2-based Flexible RRAM 12

Atomic Layer Deposited Hf0.5Zr0.5O2-based Flexible RRAM

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2017 IEEE 12th International Conference on asic

作者： Tian-Yu Wang Lin-Jie Yu Lin Chen Hao Liu Hao Zhu Qing-Qing Sun Shi-Jin Ding Peng Zhou David Wei Zhang State Key Laboratory of ASIC and System School of MicroelectronicsFudan University

ISBN: (纸本)9781509066261;9781509066254

HfZrO（HZO）-based flexible RRAM was fabricated by low-temperature atomic layer deposition（ALD） *** resistive switching（RS） characteristics were improved by the stacked structure（Ag/HZO/AlO/ITO/PET）.ON/OFF ratio was increased from 10～2 to 10～6 and the values of the set voltage（from 0.5～2.5 V to 0.1～1 V） and reset voltage（from-0.82 V to-0.10.8 V） were reduced and more uniform,which should be linked to the regulation of added AlO *** study provides a promising candidate for flexible memory devices and wearable electronics.

关键词： O2-based Flexible RRAM Atomic Layer Deposited Hf

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Vertical Power Diodes based on Bulk GaN Substrates 12

Vertical Power Diodes based on Bulk GaN Substrates

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2017 IEEE 12th International Conference on asic

作者： Liang Zheng Lin-Jie Yu Lin Chen Qing-Qing Sun Wei Huang Hao Zhu David Wei Zhang State Key Laboratory of ASIC and System School of MicroelectronicsFudan University

ISBN: (纸本)9781509066261;9781509066254

In this work,study on electrical properties of vertical Ga N power diodes,including schottky barrier diodes（SBD） and p-n diodes,are *** devices with various drift layer thickness and net carrier electron concentration were simulated using the Silvaco ATLAS TCAD software ***'s more,an optimum design of vertical Ga N devices with drift layer thickness 10μm and net carrier doping concentration 1 x 1016 cm were *** devices,including Schottky barrier diodes with a breakdown voltage of 2250 V and specific on-resistance of 0.9 mΩ·cm,and p-n diode with a breakdown voltage of 2400 V and specific on-resistance of 0.85 mΩ·cm,exhibited excellent electric properties.

关键词： Silvaco ATLAS Vertical Power Diodes based on Bulk GaN Substrates GaN

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HRAE: Hardware-assisted Randomization against Adversarial Example Attacks

HRAE: Hardware-assisted Randomization against Adversarial Ex...

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Asian Test Symposium (ATS)

作者： Jiliang Zhang Shuang Peng Yupeng Hu Fei Peng Wei Hu Jinmei Lai Jing Ye Xiangqi Wang College of Computer Science and Electronic Engineering Hunan University Cyberspace Security Research Center Peng Cheng Lab Shenzheng China School of Cybersecurity Northwestern Polytechnical University State Key Laboratory of ASIC and System Fudan University SKL of CA ICT CAS UCAS Mathematics and Computational Science Hunan First Normal University

ISBN: (数字)9781728174679

ISBN: (纸本)9781728174686

With the rapid advancements of the artificial intelligence, machine learning, especially neural networks, have shown huge superiority over humans in image recognition, autonomous vehicles and medical diagnosis. However, its opacity and inexplicability provide many chances for malicious attackers. Recent researches have shown that neural networks are vulnerable to adversarial example (AE) attacks. In the testing stage, it fools the model by adding subtle perturbations to the original sample to misclassify the input, which poses a serious threat to safety-critical areas such as autonomous driving. In order to mitigate this threat, this paper proposes a hardware-assisted randomization method against AEs, where an approximate computing technique in hardware, voltage over-scaling (VOS), is used to randomize the training set of the model, then the processed data are used to generate multiple neural network models, finally multiple redundant models are used for the integrated classification and detection of the AEs. Various AE attacks on the proposed defense are evaluated to prove its effectiveness.

关键词： Training Perturbation methods Neural networks Data models Computational modeling Delays Robustness

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