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Electronics based on two-dimensional materials:Status and outlook

Nano Research 2021年第6期14卷 1752-1767页

作者： Senfeng Zeng Zhaowu Tang Chunsen Liu Peng Zhou State Key Laboratory of ASIC and System School of MicroelectronicsFudan UniversityShanghai200433China School of Computer Science Fudan UniversityShanghai200433China

Since Moore’s law in the traditional semiconductor industry is facing shocks,More Moore and More than Moore are proposed as two paths to maintain the development of the semiconductor industry by adopting new architectures or new materials,in which the former is committed to the continued scaling of transistors for performance enhancement,and the latter pursues the realization of functional diversification of electronic ***-dimensional(2D)materials are supposed to play an important role in these two *** More Moore,the ultimate thin thickness and the dangling-bond-free surface of 2D channels offer excellent gate electrostatics while avoiding the degradation of carrier mobility at the same time,so that the transistors can be further scaled down for higher *** More than Moore,devices based on 2D materials can well meet the requirements of electronic systems for functional diversity,like that they can operate at high frequency,exhibit excellent sensitivity to the changes in the surroundings at room temperature,have good mechanical flexibility,and so *** this review,we present the application of 2D materials in More Moore and More than Moore domains of electronics,outlining their potential as a technological option for logic electronics,memory electronics,radio-frequency electronics,sensing electronics,and flexible electronics.

关键词： More Moore More Than Moore two-dimensional materials transition metal dichalcogenides(TMDs)

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A 1GS/s Highly Linear Voltage-to-Time Converter with Rail-to-Rail Input Range for Time Domain ADCs 16

A 1GS/s Highly Linear Voltage-to-Time Converter with Rail-to...

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16th IEEE International Conference on Solid-state and Integrated Circuit Technology, ICSICT 2022

作者： Zhao, Yutong Ye, Fan Ren, Junyan Fudan University State Key Laboratory of Asic and System Department of Microelectronics Shanghai201203 China

ISBN: (数字)9781665469067

ISBN: (纸本)9781665469067

This paper presents a highly linear voltage-to-time converter (VTC) with a bottom-plate sampling and voltage-boost scheme to obtain a rail-to-rail input range. A cascode current mirror and a dynamic threshold crossing detector (TCD) are also added to improve the linearity during the discharging process. Simulated in TSMC 28nm CMOS process, the proposed VTC achieves a 63.6-dB SFDR and an 8.4-bit ENOB for a Nyquist input at 1-GHz sampling frequency while consuming 1.5 mW. The input range is +/-900mV and the output range is +/-662ps. © 2022 IEEE.

关键词： Integrated circuit technology Current mirrors Linearity Detectors CMOS process Time-domain analysis

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OrderMap: A CGRA Mapping Algorithm based on DFG Analysis and Graph Homomorphism 16

OrderMap: A CGRA Mapping Algorithm based on DFG Analysis and...

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16th IEEE International Conference on Solid-state and Integrated Circuit Technology, ICSICT 2022

作者： Li, Jiangnan Zheng, Su Wang, Lingli Yin, Wenbo Fudan University State Key Laboratory of Asic and System Department of Microelectronics Shanghai200433 China

ISBN: (数字)9781665469067

ISBN: (纸本)9781665469067

Coarse-grained reconfigurable architecture (CGRA) accelerator is a promising solution in fields such as deep learning and edge computing. One of the difficult problems to design the accelerator is to map the data flow graph (DFG) to the architecture efficiently. The previous mapping algorithms based on graph structure mainly focus on optimization during the placement and routing stage, which may fall into a local minimum and lead to an increase in initiation interval (II). We propose a CGRA mapping algorithm, OrderMap, based on DFG analysis and graph homomorphism. It analyzes the DFG structure information to decide the node mapping order, followed by placement, and routing. Experimental results show that our algorithm is faster than CGRA-ME with smaller IIs. Compared with FastCGRA based on the depth-first order, OrderMap is 22.3 × faster with the same mapping results. © 2022 IEEE.

关键词： Deep learning

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Polarization-induced photocurrent switching effect in heterojunction photodiodes

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Nano Research 2023年第4期16卷 5503-5510页

作者： Dingbo Chen Yu-Chang Chen Guang Zeng Yu-Chun Li Xiao-Xi Li Dong Li Chao Shen Nan Chi Boon S.Ooi David Wei Zhang Hong-Liang Lu State Key Laboratory of ASIC and System Shanghai Institute of Intelligent Electronics&SystemsSchool of MicroelectronicsFudan UniversityShanghai 200433China Key Laboratory for Information Science of Electromagnetic Waves Department of Communication Science and EngineeringFudan UniversityShanghai 200433China Photonics Laboratory Division of ComputerElectricaland Mathematical Sciences and EngineeringKing Abdullah University of Science and Technology(KAUST)Thuwal 23955-6900Kingdom of Saudi Arabia

The unipolar photocurrent in conventional photodiodes(PDs)based on photovoltaic effect limits the output modes and potential versatility of these devices in *** photodiodes with photocurrent switching are emerging as a promising solution for obtaining photoelectric devices with unique and attractive functions,such as optical logic ***,we design an all-solid-state chip-scale ultraviolet(UV)PD based on a hybrid GaN heterojunction with engineered bipolar polarized electric *** introducing the polarization-induced photocurrent switching effect,the photocurrent direction can be switched in response to the wavelength of incident light at 0 V *** particular,the photocurrent direction exhibits negative when the irradiation wavelength is less than 315 nm,but positive when the wavelength is longer than 315 *** device shows a responsivity of up to−6.7 mA/W at 300 nm and 5.3 mA/W at 340 nm,*** particular,three special logic gates in response to different dual UV light inputs are demonstrated via a single bipolar PD,which may be beneficial for future multifunctional UV photonic integrated devices and systems.

关键词： GaN heterostructure ultraviolet(UV)photodiodes bipolar photocurrent optical logic device

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A 12-Bit 250-MS/s Voltage-Time Domain Hybrid ADC 16

A 12-Bit 250-MS/s Voltage-Time Domain Hybrid ADC

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16th IEEE International Conference on Solid-state and Integrated Circuit Technology, ICSICT 2022

作者： Zhao, Yutong Ye, Fan Ren, Junyan Fudan University State Key Laboratory of Asic and System Department of Microelectronics Shanghai201203 China

ISBN: (数字)9781665469067

ISBN: (纸本)9781665469067

This article presents a 12-bit 250-MS/s voltage-time domain hybrid analog-to-digital converter (ADC). In the proposed ADC, the first stage is a binary-weighted SAR ADC, and the second stage is a coarse-fine time-to-digital converter (TDC), connected with a highly linear dynamic voltage-to-time converter (VTC). Using the combination of voltage and time domain quantization, this hybrid architecture is power efficient and can benefit from technology scaling. The time domain folding of the ring oscillator leads to an inherently linear operation. The prototype ADC is simulated in TSMC 28nm CMOS process with a 0.9V power supply, achieving a 55.62-dB SNDR and a 67.16-dB SFDR at Nyquist input. The power consumption is 1.36 mW, obtaining a Walden figure of merit (FoM) of 11.07 fJ/conv.- step. © 2022 IEEE.

关键词： Frequency converters

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Experimental demonstration of D-band signals wireless transmission over 30 km

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Science China(Technological Sciences) 2025年第2期68卷 318-320页

作者： Yi WEI Xiongwei YANG Jianjun YU Xianming ZHAO Mingxu WANG Jingwen TAN Weiping LI Feng ZHAO Chengzhen BIAN Hansong MA Qinyi ZHANG Qiutong ZHANG Bing Zhang Wen ZHOU Kaihui WANG Sicong XU Jianguo YU State Key Laboratory of ASIC and System Key Laboratory for Information Science of Electromagnetic Waves(MoE)and School of Information Science and TechnologyFudan UniversityShanghai 200433China Harbin Institute of Technology Harbin 150001China School of Automation Xi’an University of Posts and TelecommunicationsXi’an 710121China School of Electronic Engineering Beijing University of Posts and TelecommunicationsBeijing 100876China

Due to the rise of innovative technologies like artificial intelligence(AI),the Internet of Things(IoT),and telemedicine,the demand for internet traffic is rapidly *** order to achieve ultra-high-speed wireless communication,many researchers are directing their efforts towards the *** D-band,spanning the frequency band 110-170 GHz,has abundant spectrum resources and license-free characteristics[1,2].

关键词： IoT wireless band

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The development of transfer technologies for advanced 2D circuits integration

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Information & Functional Materials 2024年第3期1卷 304-322页

作者： Zhenggang Cai Liwei Liu Peng Zhou State Key Laboratory of ASIC and System School of MicroelectronicsFudan UniversityShanghaiChina Frontier Institute of Chip and System Fudan UniversityShanghaiChina

In the light of the scaling limitations of conventional CMOS technology,twodimensional(2D)materials offer a transformative avenue for advancing Moore's law in the post‐Moore *** technology for transferring 2D materials serves as a crucial link between their synthesis and device *** review provides a comprehensive assessment of advancements in the transfer technologies and integration of 2D materials,which are essential for next‐generation ***,state‐of‐the‐art methodologies for highquality,wafer‐scale transfer of 2D materials,including both wet and dry transfer methods are thoroughly *** the requirements for massive transfer of 2D materials compatible with silicon line while preserving their intrinsic properties are ***,we focus on 2D integration techniques,paying special attention to the construction of van der Waals contacts at the 2D material/dielectric interface and 2D material/metal electrode ***,the potential for layer‐by‐layer or tier‐by‐tier transfer 2D devices for monolithic 3D integration was also *** review concludes by highlighting the significant challenges that remain in leveraging the potential of 2D materials at the circuit and system levels,proposing forward‐looking development in transfer strategies.

关键词： monolithic 3D integration transfer of 2D materials transfer of gate dielectrics transfer of metal electrodes

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HierSyn: Fast Synthesis for Large Hierarchical Designs 15

HierSyn: Fast Synthesis for Large Hierarchical Designs

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15th IEEE International Conference on asic, asicON 2023

作者： Zhang, Yishan Zhang, Zhiyong Wu, Chang Fudan University State-Key Lab of ASIC and System School of Microelectronics Shanghai200433 China Shanghai Fudan Microelectronics Group Co. Ltd Shanghai200433 China

ISBN: (纸本)9798350312980

As design goes into multi-billion transistors, the synthesis runtime becomes an important issue, particularly for design verification and prototyping, as one may run the synthesis many times with design change. Module-by-module synthesis with multi-threading is a natural solution for fast synthesis, however, at the cost of quality of results (QoR) degradation. Besides, multi-thread speedup may not be so good due to very uneven sizes of the modules. In this paper, we propose a design hierarchy restructuring based multi-thread synthesis algorithm for large-scale designs. Small module flattening and large module partitioning are used to create moderate size design modules. Our experimental results show that our algorithm can produce results within 3% area increase and 21.3x speedup over the flat synthesis flow. © 2023 IEEE.

关键词： Logic Optimization Logic Synthesis Multi-thread

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A General-Purpose Compiler Design for Instruction-Based AI Accelerator Implementation 15

A General-Purpose Compiler Design for Instruction-Based AI A...

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15th IEEE International Conference on asic, asicON 2023

作者： Wang, Mengxuan Linghu, Yuan Wu, Chang Fudan University State Key Laboratory of ASIC and System Shanghai China Shanghai Fudan Microelectronics Group Co. Ltd. Shanghai China

ISBN: (纸本)9798350312980

With the rapid advancement of deep neural networks, the automatic generation of accelerator design is a very important problem for the deployment of AI applications, especially for edge computation. In this paper, we propose a general purpose compiler design for instruction-based CNN accelerator design. Our compiler incorporates network pruning and quantization capabilities for better performance. CDFG-based layer fusion and scheduling are used for heterogeneous computing with consideration of data transformation and synchronization between CPU and accelerator. A device file is used to define the instruction set and data space so that our compiler supports various accelerator designs uniformly. We used our compiler to implement VGG16 and yolo2 in FPGAs and achieved better performance than existing designs. © 2023 IEEE.

关键词： Accelerator Compiler Instruction Scheduling

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Integration Technology of Micro-LED for Next-Generation Display

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Research 2023年第2期2023卷 389-413页

作者： Dingbo Chen Yu-Chang Chen Guang Zeng David WeiZhang Hong-Liang Lu State Key Laboratory of ASIC and System Shanghai lnstitute of Inteligent Electronics&SystemsSchoolof MicroelectronicsFudan UniversityShanghai 200433China Jia Shan Fudan Institute jaxingZhejang Province 314100China Key Laboratory of Specialty Fiber Optics and Optical Access Networks Shanghai Institute Communication and Data ScienceShanghai UniversityShanghai 200444China

Inorganic micro light-emitting diodes(micro-LEDs)based on II-V compound semiconductors have been widely studied for self-emissive *** chips to applications,integration technology plays an indispensable role in micro-L... 详细信息

关键词： LED diodes LEDs

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