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第八届中国功能材料及其应用学术会议

作者： Hong-Liang Lu Yang Geng David Wei Zhang State Key Laboratory of ASIC and System School of MicroelectronicsFudan University

A major obstacle facing the development of metal-oxide-semiconductor field transistors with GaAs channels is the poor interface between gate dielectric and Ⅲ-Ⅴ *** this work,chemical composition and the interfacial properties of TiAlO thin films grown by atomic layer deposition on S-passivated GaAs were studied in *** free of interfacial layer for the S-passivated TiAlO/GaAs sample was revealed by transmission electron microscopy and xray photoelectron *** electrical properties such as the C-V and I-V characteristics were also *** is shown that the sulfur treatment can significantly improve the interface properties through suppressing the formation of interfacial layers.

关键词： ALD TiAlO,GaAs

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Abnormal behaviors of Goos–Hänchenshift in hyperbolic metamaterials madeof aluminum zinc oxide materials

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Photonics Research 2013年第4期1卷 160-163页

作者： Jing Zhao Hao Zhang Xiangchao Zhang Dahai Li Hongliang Lu Min Xu Shanghai Ultra-precision Optical Manufacturing Engineering Center Department of Optical Science and EngineeringFudan UniversityShanghai 200433China State Key Laboratory of ASIC and System Department of MicroelectronicsFudan UniversityShanghai 200433China

In this paper,the Goos–Hänchen shift(GHS)at the interface between air and the aluminum zinc oxide(AZO)/ZnO hyperbolic metamaterial(AZO-HMM)is theoretically *** results herein show that AZO-HMM can enhance the GHS at the interface to a value at 3 orders of the incident wavelength under special conditions,which is much larger than conventional GHS ***,the GHS can be tuned to be negative or positive by changing the incident wavelength or the volume fraction of AZO.

关键词： GHS oxide interface

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Preparation and characterization of SiCOH film using a new precursor trimethoxy [2-(oxabicyclo [4.1.0] hept-3yl) ethyl] silicane

Preparation and characterization of SiCOH film using a new p...

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2013 Spring International Conference on Material Sciences and Technology, MST-S 2013

作者： Ding, Zi-Jun Ding, Shi-Jin Shen, Ying-Zhong Applied Chemistry Department School of Material Science and Engineering Nanjing University of Aeronautics and Astronautics Nanjing China State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai China

ISBN: (纸本)9783037857090

The SiCOH film has been prepared by using a new precursor of trimethoxy [2-(7-oxabicyclo[4.1.0]hept-3-yl)ethyl] silane via sol-gel and spin-coating methods. The resulting films were characterized by SEM, TGA, AFM, FTIR, nanomechanical testing, and electrical measurements. The TGA result shows that the SiCOH film has good thermal stability, and no obvious thermal decomposition can be observed before 400° C. After being annealed at 350° C for 2 hours, the resulting SiCOH film exhibits a smooth surface (RMS=0.222nm), and a significant reduction of CHn groups in the film. Further, the film exhibits a novel high k value of 15.6, a leakage current density of 2.72 · 10-6 A/cm2 at 1 MV/cm, and good mechanical properties of Er ~ 12.61 GPa and H~3.80 MPa. © (2013) Trans Tech Publications, Switzerland.

关键词： Film preparation

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A reconfigurable routing method for fault-tolerant mesh-based network on chip

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Journal of Information and Computational Science 2013年第1期10卷 157-165页

作者： Liu, Yanhua Ruan, Ying Lai, Zongsheng Sun, Ling Institute of Microelectronics Circuit and System East China Normal University Shanghai 200241 China Jiangsu Provincial Key Lab. of ASIC Design Nantong University Nantong 226019 China State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China

As the semiconductor industry advances to nano-technology points, Network on Chip (NoC) components are becoming vulnerable to errors during the system operation. Consequently, fault-tolerant techniques for NoC are needed to achieve high reliability. In this paper, we present a fault-tolerant routing method to tolerate faulty routers in a two-dimension (2D) mesh-based NoC. With this method, the system can have a multi-router fault-tolerant capability and the routing path can be dynamically reconfigured to support different situations caused by faulty routers in NoC. Fault-tolerance capability and system performance of the proposed method are evaluated through analysis and simulations. Theoretical analysis and simulation results show that the proposed method can enhance the reliability of system and offer considerable fault-tolerance capability. © 2013 by Binary Information Press.

关键词： Network-on-chip

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High-speed and low-power 2.5D I/O circuits for memory-logic-integration by through-silicon interposer

High-speed and low-power 2.5D I/O circuits for memory-logic-...

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2013 IEEE International 3D systems Integration Conference, 3DIC 2013

作者： Wang, Jiacheng Ma, Shunli Manoj, P. D. Sai Yu, Mingbin Weerasekera, Roshan Yu, Hao ERI at N Interdisciplinary Graduate School Nanyang Technological University Singapore Singapore State Key Lab. of ASIC and System Fudan Univerisy China School of EEE Nanyang Technological Univerisy Singapore 639798 Singapore Institute of Microelectronics A STAR Singapore Singapore

ISBN: (纸本)9781467364843

In this paper, two high-speed and low-power I/O circuits are developed using through-silicon-interposer (TSI) for 2.5D integration of multi-core processor and memory in 65nm CMOS process. For a 3mm TSI interconnection of transmission line (T-line), the first I/O circuit is a low-voltage-differential- signal (LVDS) buffer and the second one is a current-mode-logic (CML) buffer. To compensate the high-frequency loss from T-line, a pre-emphasis circuit is deployed in the LVDS buffer, and a wide-band inductor-matching is deployed in the CML buffer. Based on the post layout simulation results, the LVDS buffer can achieve 360mV peak-to-peak differential output signal swing and 563fs cycle-to-cycle jitter with 10Gb/s bandwidth and 4.8mW power consumption. The CML buffer can achieve 240mV peak-to-peak differential output signal swing and 453fs jitter with 12.8Gb/s data-rate and 1.6mA current consumption under 0.6V ultra low-power supply. © 2013 IEEE.

关键词： Timing circuits

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A 1.2 pJ/b 6.4 Gb/s 8+1-Lane Forwarded-Clock Receiver with PVT-Variation-Tolerant All-Digital Clock and Data Recovery in 28nm CMOS

A 1.2 pJ/b 6.4 Gb/s 8+1-Lane Forwarded-Clock Receiver with P...

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35th Annual IEEE Custom Integrated Circuits Conference (CICC) - The Showcase for Circuit Design in the Heart of Silicon Valley

作者： Chen, Shuai Li, Hao Yang, Liqiong Yang, Zongren Hu, Weiwu Chiang, Patrick Yin Institute of Computing Technology Chinese Academy of Sciences Beijing China School of EECS Oregon State University Corvallis OR 97331 United States University of Chinese Academy of Sciences Beijing China State Key Laboratory of ASIC and System Fudan University Shanghai China

ISBN: (纸本)9781467361460

This paper presents an energy/area-efficient forwarded-clock receiver fabricated in a 28nm CMOS process. The receiver consists of 8 data lanes plus one forwarded-clock lane, and adopts a novel all-digital clock and data recovery (CDR) using a delay-locked loop (DLL). The all-digital DLL with calibration can generate accurate multiphase clocks for both duty-cycle correction and the data recovery in the presence of process variations. The all-digital DLL-based CDR can enter into open-loop mode after lock-in to reduce power and eliminate the clock dithering phenomenon. Furthermore, the CDR can re-lock in the closed-loop mode using a proposed update algorithm to track the temperature and voltage variations without disturbing the data recovery. Measurement results show that the receiver can operate at a data rate of 6.4 Gb/s with a BER<10(-12), consuming 7.5 mW per lane under a 0.85 V power supply. The core receiver occupies an area of 0.02 mm(2) per lane.

关键词： CMOS digital integrated circuits clocks closed loop systems delay lock loops receivers

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Influence of surface preparation on atomic layer deposition of Pt films

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Journal of Semiconductors 2012年第8期33卷 32-36页

作者：葛亮胡成朱志炜张卫吴东平张世理 State Key Laboratory of ASIC and System School of MicroelectronicsFudan University State Key Laboratory of ASIC and System School of MicroclectronicsFudan University Solid-State Electronics the Angstrom LaboratoryUppsala University

We report Pt deposition on a Si substrate by means of atomic layer deposition（ALD） using（methylcyclopentadienyl） trimethylplatinum（CH_3C_5H_4Pt（CH_3）_3） and O_*** substrates with both HF-last and oxidelast surface treatments are employed to investigate the influence of surface preparation on Pt-ALD.A significantly longer incubation time and less homogeneity are observed for Pt growth on the HF-last substrate compared to the oxide-last *** interfacial oxide layer at the Pt-Si interface is found inevitable even with HF treatment of the Si substrate immediately prior to ALD processing.A plausible explanation to the observed difference of Pt-ALD is discussed.

关键词： Pt atomic layer deposition surface treatment interfacial oxide layer

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Formations and morphological stabilities of ultrathin CoSi_2 films

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Chinese Physics B 2012年第8期21卷 453-458页

作者：朱志炜高歆栋张志滨朴颖华胡成张卫吴东平 State Key Laboratory of ASIC and System School of MicroelectronicsFudan University Solid-State Electronics the Angstro¨m LaboratoryUppsala University

In this paper we investigate the formations and morphological stabilities of Co-silicide fihns using 1-8-nm thick Co layers sputter-deposited on silicon （100） substrates. These ultrathin Co-silicide films are formed via solid-state reaction of the deposited Co films with Si substrate at annealing temperatures from 450 ℃ to 850 ℃. For a Co layer with a thickness no larger than i nm, epitaxially aligned CoSi2 films readily grow on silicon （100） substrate and exhibit good morphological stabilities up to 600 ℃. For a Co layer thicker than 1 nm, polycrystalline CoSi and CoSi2 films are observed. The critical thickness below which epitaxially aligned CoSi2 film prevails is smaller than the reported critical thickness of the Ni layer for epitaxial alignment of NiSi2 on silicon （100） substrate. The larger lattice mismatch between the CoSi2 film and the silicon substrate is the root cause for the smaller critical thickness of the Co layer.

关键词： silicide epitaxial alignment ultrathin film

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Antiferroelectric Thin Films: Giant Negative Electrocaloric Effect in Antiferroelectric La‐Doped Pb(ZrTi)O3Thin Films Near Room Temperature (Adv. Mater. 20/2015)

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Advanced Materials 2015年第20期27卷

作者： Wenping Geng Yang Liu Xiangjian Meng Laurent Bellaiche James F. Scott Brahim Dkhil Anquan Jiang State Key Laboratory of ASIC and System School of Microelectronics Fudan University Shanghai 200433 PR China Laboratoire Structures Propriétés et Modélisation des Solides Université Paris‐Saclay CentraleSupélec CNRS‐UMR8580 Grande Voie des Vignes Châtenay‐Malabry Cedex 92295 France National Laboratory for Infrared Physics Shanghai Institute of Technical Physics Chinese Academy of Sciences Yu Tian Road 500 Shanghai 200083 PR China University of Chinese Academy of Sciences No. 19A Yuquan Road Beijing 100049 PR China Physics Department and Institute for Nanoscience and Engineering University of Arkansas Fayetteville AR 72701 USA Department of Physics Cavendish Laboratory University of Cambridge Cambridge CB3 0HE UK Departments of Chemistry and Physics St. Andrews University St. Andrews KY16 9ST UK

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Optical properties of a HfO_2/Si stack with a trace amount of nitrogen incorporation

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Journal of Semiconductors 2012年第3期33卷 5-7页

作者：李叶江婷婷孙清清王鹏飞丁士进张卫 State Key Laboratory of ASIC and System Department of MicroelectronicsFudan University

HfO2 films were deposited by atomic layer deposition through alternating pulsing of Hf[N（C2H5）（CH3）]4 and H2O2.A trace amount of nitrogen was incorporated into the HfO2 through ammonia *** composition,the interface stability of the HfO2/Si stack and the optical properties of the annealed films were analyzed to investigate the property evolution of HfO2 during thermal *** a nitrogen concentration increase from 1.41 to 7.45%,the bandgap of the films decreased from 5.82 to 4.94 eV.

关键词： atomic layer deposition HfO2 rapid thermal annealing optical property

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