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检索条件"机构=School of Microelectronics and State Key Laboratory of ASIC and System"

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An Analytic Threshold Voltage Model for the Double-Gate Schottky-Barrier Source/Drain MOSFETs

An Analytic Threshold Voltage Model for the Double-Gate Scho...

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2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

作者： Peicheng Li Guangxi Hu Guanghui Mei Ran Liu Yi Jiang Tingao Tang ASIC & System State Key Lab School of Microelectronics Fudan University Shanghai 200433 China

ISBN: (纸本)9781424457977

The threshold voltage, Vth of a double-gate SchottkyBarrier (DGSB) source/drain (S/D) metal-oxidesemiconductor field-effect transistor (MOSFET) has been investigated. An analytic expression for surface potential in the channel is obtained and the results are verified via simulations, good agreement is observed. A new definition for Vth is given, and an analytic expression for V,h is presented. We find that when the silicon thickness, tsi is small (<3 nm), V,h is very sensitive to it. Vth increases dramatically with the decreasing of tsi. Vth also increases with the increasing of the oxide thickness, and with the decreasing of the drain-so'irce voltage. These results can be of great help to the ultralargescale integrated-circuit (ULSI) designers.

关键词： threshold voltage double gate surface potential metal-oxide-semiconductor field effect transistors VOLTAGE Very large scale integration

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Applications of tunneling FET in memory devices

Applications of tunneling FET in memory devices

引用

2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology

作者： Zang, Song-Gan Liu, Xin-Yan Lin, Xi Liu, Lei Liu, Wei Zhang, David Wei Wang, Peng-Fei Hansch, Walter State Key Laboratory of ASIC and System Dept. of Microelectronics Fudan University Shanghai China Oriental Semiconductor Co. Ltd. Suzhou China Institute for Physics Universitaet der Bundeswehr Munich 85577 Neubiberg Germany

ISBN: (纸本)9781424457984

Because of the special p-i-n structure of the tunneling FET (TFET), many different composite transistors can be formed with careful device design by combining TFET with MOSFET. In this paper, we propose the special applications of TFET as memory devices. A novel capacitor-less DRAM cell based on floating junction gate (FJG) concept can be configured with TFET. In addition, several different memory cells containing TFET will be discussed. ©2010 IEEE.

关键词： Dynamic random access storage

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Blind CFO Estimation for Constant Modulus Signaling Based OFDM systems

Blind CFO Estimation for Constant Modulus Signaling Based OF...

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IEEE International Conference on Communications (ICC)

作者： W. Xu Z. Hong State Key Laboratory of ASIC and Systems School of Microelectronics Fudan University Shanghai China

A low-complexity, blind CFO estimator for OFDM systems with constant modulus (CM) signaling is presented. Both single-input single-output (SISO) systems and multiple-input multiple-output (MIMO) systems are considered. Assuming the channel keeps constant during estimation, the CFO can be uniquely and exactly estimated through minimizing the power difference of the received data on the same subcarrier between two consecutive OFDM symbols, thus the identifiability problem is solved. Inspired by the sinusoid-like cost function, curve fitting is applied to simplify our algorithm. This blind scheme can also be applied to a MIMO system.

关键词： OFDM MIMO Cost function Frequency estimation Curve fitting state estimation Interference Degradation Bit error rate Frequency response

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Hot carrier stress induced negative differential resistance in the output characteristic of poly-Si TFTs

Hot carrier stress induced negative differential resistance ...

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International Symposium on Physical & Failure Analysis of Integrated Circuits

作者： Chunfeng Hu Mingxiang Wang Meijuan Xu State Key Laboratory of ASIC & System Department of Microelectronics Fudan University Shanghai China Department of Microelectronics Soochow University Suzhou China

ISBN: (纸本)9781424455966;9781424455980

Hot carrier (HC) stress induced negative differential resistance (NDR) behavior in the reserve mode output characteristics of n-type poly-Si TFTs is first observed. The NDR phenomenon, i.e., I ON decreases with increasing V D is also found to increase at higher V G but disappear when V G TH and is reduced as stress time increases. Based on drain induced grain barrier lowering and thermionic emission controlled carrier conduction relating to the HC induced trap potential barrier, the NDR phenomenon can be understood.

关键词： Hot carriers Degradation Thermal stresses Thermionic emission microelectronics Temperature Laboratories Application specific integrated circuits Electrodes Testing

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Immunosensor for detecting pulmonary tuberculosis markers in human serum

Immunosensor for detecting pulmonary tuberculosis markers in...

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International Conference on Solid-state and Integrated Circuit Technology

作者： Chun Xu Xiao-sen Chai Shu-lin Zhang Jia Zhou ASIC and System State Key Lab Department of Microelectronics Fudan University Shanghai China State Key Laboratory of Genetic Engineering Fudan University Shanghai China

ISBN: (纸本)9781424457977

A specific and high-sensitive immunosensor for detecting pulmonary tuberculosis (TB) markers in human serum is presented by miniaturizing array of microelectrodes via micro electro-mechanical system (MEMS) for multi-channel electrochemical measurement. The immunosensor is consisted of six Au disk working electrodes, one Au counter electrode and one Ag/AgCl reference electrode. Semi-insulating poly(o-phenylenediamine)(PoPD) film was utilized to co-polymerize and immobilize antigen at the arrayed Au electrodes. The selective recognition of antibody to the corresponding antigen is quantitatively detected by the peak current in the presence of the redox probe, FcCH 2 OH(FcM). Samples with antibody positive and antibody negative can be distinguished.

关键词： Electrodes Immune system Gold Humans Sensitivity Films Arrays

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Highly ordered growth of ZnO nanostructures by combination of nanoimprint lithography and hydrothermal method

Highly ordered growth of ZnO nanostructures by combination o...

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IEEE International Nanoelectronics Conference (INEC)

作者： Shao-Ren Deng Tao Chen Shu-Yi Liu Yi-Fang Chen Ejaz Huq Ran Liu Xin-Ping Qu State Key Lab of ASIC and System Department of Microelectronics Fudan University Shanghai China Rutherford and Appleton Laboratory Didcot Oxfordshire UK

By combining nanoimprint lithography and traditional hydrothermal growth method of ZnO nanorods, vertical and well patterned ZnO nanostructures were successfully fabricated. The imprinted SU-8 resist deep trenches above the ZnO seed layer prohibit the lateral growth of ZnO nanorods. Various patterned vertical ZnO nanostructures like nanorods and nanowalls can be obtained. The improvement of photoluminescence property of ZnO nanorods was observed after removing the SU-8 resist from the substrate by O 2 reactive ion etching (RIE).

关键词： Zinc oxide Nanostructures Nanolithography Resists Etching Photoluminescence Lithography Radio access networks Solvents Gratings

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Influence of nano-embossing on properties of Pb(Zr0.3,Ti0.7)O3 ferroelectric thin film

Influence of nano-embossing on properties of Pb(Zr0.3,Ti0.7)...

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IEEE International Nanoelectronics Conference (INEC)

作者： Zhenkui Shen Zhihui Chen Jiangrong Fang Bingrui Lu Zhijun Qiu Anquan Jiang Yifang Chen Xinping Qu Ran Liu State Key Lab of ASIC and System Department of Microelectronics Fudan University Shanghai China Rutherford and Appleton Laboratory Didcot Oxfordshire UK

In this work, we apply nano-embossing technology to fabricate Pb(Zr 0.3 , Ti 0.7 )O3 (PZT) ferroelectric thin film nanostructures and investigate the influence of the patterning process on the material and ferroelectric properties by using SEM, XRD and Precision Ferroelectric Tester. Embossing process has been optimized for embossing depth and pattern profile. It was found that embossing will result in (100) preferred orientation of the PZT thin film. The electrical characteristics of patterned and unpatterned PZT films have been also studied for comparison.

关键词： Embossing Ferroelectric films Ferroelectric materials Temperature Nanostructures Annealing Transistors Switches Radio access networks Scanning electron microscopy

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Work function modulation for TiN/Ta/TiN metal gate electrode

Work function modulation for TiN/Ta/TiN metal gate electrode

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International Conference on Solid-state and Integrated Circuit Technology

作者： Xiao-Rong Wang Yu-Long Jiang Qi Xie Christophe Detavernier Guo-Ping Ru Xin-Ping Qu Bing-Zong Li State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai China Department of Solid State Science Ghent University Ghent Belgium

ISBN: (纸本)9781424457977

In this work, the metal gate effective work function (EWF) modulation for the TiN/Ta/TiN/SiO 2 /p-Si(100) structure was investigated. Comparing with TiN/SiO 2 /p-Si(100) structure, after annealing the introduction of Ta can effectively reduce the flat band voltage. It is also revealed that although as the thermal budget increases the flat band voltage obviously shifts toward the negative bias direction, the extracted EWF does not vary too much. An EWF of 4.4 eV is confirmed for TiN/Ta/TiN/SiO 2 /p-Si(100) structure by C-V measurements, which is almost identical to Al/TiN metal gate electrode.

关键词： Tin Annealing Logic gates Electrodes Materials Modulation

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Charging characteristics of Sb nanocrystals embedded in copper phthalocyanine films for memory applications

Charging characteristics of Sb nanocrystals embedded in copp...

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2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

作者： Shi-Jin Ding Yue Huang Dietrich R.T. Zahn State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai Semiconductor Physics Chemnitz University of Technology Chemnitz 097107 Germany

ISBN: (纸本)9781424457977

The charging characteristics of Sb nanocrystals embedded in organic semiconductor copper phthalocyanine (CuPc) have been studied for the first time. The images from atomic force microscopy show that Sb NCs grown on the surface of CuPc film exhibit a vertical height of 10-15 nm and uniform distribution, which are interspersed with a few bigger ones (~30 nm). Two kinds of capacitancevoltage measurements, frequericy responds and hysteresis loops, of the control sample and the one embedded with Sb NCs indicate the charging and discharging of the Sb NCs.

关键词： copper phthalocyanine antimony charging charge characteristics CHARGING(ACCOUNTTNG) embedding Nanocrystals Uniform distribution

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Mapping of Pipeline Flow Chart onto Mesh-based Multi-core NoC Architecture

Mapping of Pipeline Flow Chart onto Mesh-based Multi-core No...

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2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

作者： Haofan Yang Ming-e Jing Zhiyi Yu Ruijin Xiao Xiaoyang Zeng Dian Zhou Liang Liu State Key Laboratory of ASIC and System Fudan University Shanghai 200433 China School of Computer Science Fudan University

ISBN: (纸本)9781424457977

Among current outstanding research problems in NoC Design, mapping application onto NoC is one of the core issues to be explored. In this paper, wepropose two methods for mappinga pipelined flow chart onto mesh-based NoC system: Communication Length Concerned (CLC) method and Space Restricted (SR) method after a simple pre-process. The former significantly reduces the latency and energy consumption in inter-core communication while latter method provides a tradeoff for run-time mapping based on the former one. Results show that, compared with normal mapping, the CLC method reduces about 43.3％ and 28.6％ in communication latency and energy consumption, respectively;while the SR method reduces about 37.6％ communication latency and 24％ energy consumption. The two methods discussed in this paper could be used as guidance for mapping pipeline flow charts on homogenous mesh-based NoC architectures.

关键词： Flowcharts MAPPING(MATHEMATICAL) energy consumption Latency Research Problems pipeline Communication Research mapping CLC gene Surjective ARCHITECTURE

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