检索结果-内蒙古大学图书馆

IEEE International Symposium on Circuits and systems (ISCAS)

作者： Jinjin He Jian Cui Lianxing Yang Zhongfeng Wang School of EECS Oregon State University Corvallis OR USA Oregon State University Corvallis OR US ASIC & System State Key Laboratory Fudan University Shanghai China

This paper presents an efficient algorithm for noncoherent demodulation of Gaussian frequency shift keying (GFSK) signals when the receiver is operating in a decision-feedback mode to aid the current symbol demodulation based on the previous decision bits. Enlightened by the data-aided noncoherent demodulation of DPSK signal, the maximum likelihood (ML) noncoherent receiver for GFSK signals is derived. The proposed algorithm adopts a recursive structure that significantly reduces the computational cost compared with the standard ML methods. The simulation results show that the proposed method achieves comparable bit-error-rate (BER) performance with the matched filter band (MFB) receiver using an observation period of 7 bits, but with two orders of magnitude lower computation complexity.

关键词： Demodulation Equations Intersymbol interference Matched filters Computational complexity Differential quadrature phase shift keying Computational efficiency Computational modeling Frequency Bandwidth

来源：评论

学校读者我要写书评

暂无评论

Enhancement of endurance for CuxO based RRAM cell

Enhancement of endurance for CuxO based RRAM cell

引用

International Conference on Solid-state and Integrated Circuit Technology

作者： M. Yin P. Zhou H. B. Lv T. A. Tang B.A. Chen Y.Y. Lin A. Bao M. H. Chi School of Microelectronics and State Key Lab of ASIC & System Fudan University Shanghai China Memory Technology Development Center Semiconductor Manufacturing International Corp. Shanghai China

For the first time, we report that the copper oxide (Cu x O) based resistive random access memory (RRAM) cell can achieve 10 4 cycles (i.e. ~10x better) as a new record as well as elimination of the initial ¿forming¿ than reported in literature. The copper oxide is integrated in MIM (metal-insulator-metal) structure and is grown by plasma oxidation of Cu substrate, with CuO near upper surface and graded Cu x O (i.e. increasingly Cu rich or O-vacancies rich) toward the Cu substrate. A thinner CuO upper layer can eliminate ¿forming¿ process and, for in turn, greatly enhance the endurance of resistive switching by eliminating the damage during the ¿forming¿ process.

关键词： Copper Oxidation Plasma applications Substrates Electrodes Deformable models Random access memory Scanning electron microscopy Chemical analysis Spectroscopy

来源：评论

学校读者我要写书评

暂无评论

Improvement of Endurance and Switching Stability of Forming-Free CuxO RRAM

Improvement of Endurance and Switching Stability of Forming-...

引用

IEEE International Memory Workshop (IMW)

作者： H. B. Lv M. Yin P. Zhou T. A. Tang B. A. Chen Y. Y. Lin A. Bao M. H. Chi School of Microelectronics and State Key Lab of ASIC & System Fudan University Shanghai China Memory Technology Development Center Semiconductor Manufacturing International Corp. Shanghai China

Cu-oxide grown by plasma oxidation is found typically composed of upper CuO layer and inner graded Cu x O. The initial forming process leads to endurance degradation but can be improved by annealing in an oxygen deficient ambient. By using ramped pulse and verification algorithm, the endurance and programming voltage shift are further ameliorated.

关键词： Stability Oxidation Degradation Random access memory CMOS process Plasma measurements Breakdown voltage microelectronics Application specific integrated circuits Semiconductor device manufacture

来源：评论

学校读者我要写书评

暂无评论

Electrical characterization of ultrathin single crystalline Gd2O3/Si(100) with Pt top electrode

Electrical characterization of ultrathin single crystalline ...

引用

International Conference on Solid-state and Integrated Circuit Technology

作者： Qing-Qing Sun Apurba Laha H. Jorg Osten Shi-Jin Ding David Wei Zhang A. Fissel State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai China Institute of Electronic Materials and Devices Leibniz University Hanover Germany Information Technology Laboratory Leibniz University Hanover Germany

Capacitor composed of single crystalline Gd 2 O 3 on Si(100) with Pt top electrode was fabricated by molecular beam epitaxy. We present a systematic study of electrical properties of as-grown single crystalline Pt/Gd 2 O 3 /Si(100). Three capacitors with different thickness are used for electrical evaluation. The EOT of the samples are estimated to be 0.7 nm, 1.2 nm and 1.8 nm respectively. Work function of Pt on Gd 2 O 3 is pinned at 4.75 eV and due to the lattice mismatch between Gd 2 O 3 , the interface state density is in the level of 10 13 extracted by Terman and conductance methods.

关键词： Crystallization Molecular beam epitaxial growth High-K gate dielectrics Dielectric constant Amorphous materials High K dielectric materials Substrates Capacitance-voltage characteristics Electrodes Laboratories

来源：评论

学校读者我要写书评

暂无评论

Characteristics of NBTI in pMOSFETs with thermally and plasma nitrided gate oxides

Characteristics of NBTI in pMOSFETs with thermally and plasm...

引用

International Conference on Solid-state and Integrated Circuit Technology

作者： W.J. Liu Z.Y. Liu Y. Luo G.F. Jiao X.Y. Huang D. Huang C. C. Liao L.F. Zhang Z. H. Gan W. Wong Ming-Fu Li State Key Laboratory ASIC & System Department Microelectronics Fudan University Shanghai China Semiconductor Manufacturing International Corporation Shanghai China SNDL ECE Department National University of Singapore Singapore

ISBN: (纸本)9781424421855

Negative bias temperature instability in pMOSFETs with thermally and plasma nitrided oxides is investigated using quasi-DC Id-Vg (slow Id-Vg) and on-the-fly interface trap (OFIT) measurement methods. By comparing the OFIT results with those observed from Id-Vg measurements, we found that the threshold voltage shift measured by slow Id-Vg is mainly due to the interface trap since the oxide charge is essentially detrapped during the measurement delay. Quantitatively, the interface trap density measured by OFIT method is higher than that by slow Id-Vg measurement, since the latter measurement is subjected to the recovery effect. For the thermally and plasma nitrided oxides, we found the interface trap density is higher for thermally nitride oxide. However, the power law time exponent n as stress time is the same for the pMOSFETs with both processes.

关键词： Niobium compounds Titanium compounds MOSFETs Plasma properties Plasma measurements Current measurement Charge measurement Density measurement Plasma temperature Negative bias temperature instability

来源：评论

学校读者我要写书评

暂无评论

Issues and controversies in NBTI degradation and recovery mechanisms for p-MOSFETs with SiON gate dielectrics

Issues and controversies in NBTI degradation and recovery me...

引用

International Conference on Solid-state and Integrated Circuit Technology

作者： Ming-Fu Li Daming Huang W.J. Liu Z.Y. Liu Yong Luo C.C. Liao L.F. Zhang Z.H. Gan Waisum Wong State Key Laboratory ASIC & System Department Microelectronics Fudan University Shanghai China SNDL ECE Department National University of Singapore Singapore Semiconductor Manufacturing International Corporation Shanghai China

Some issues and controversies in NBTI degradation and recovery mechanisms for p-MOSFETs with SiON gate dielectrics are summarized. The resolutions of these issues from our point of view are illustrated.

ISBN: (纸本)9781424421855

关键词： Niobium compounds Titanium compounds Degradation MOSFET circuits Dielectrics Stress measurement Pulse measurements Phase measurement Density measurement Application specific integrated circuits

来源：评论

学校读者我要写书评

暂无评论

Silicide as diffusion source for dopant segregation in 70-nm MOSFETs with PtSi Schottky-barrier source/drain on ultrathin-body SOI

Silicide as diffusion source for dopant segregation in 70-nm...

引用

2008 9th International Conference on Ultimate Integration on Silicon (ULIS 2008)

作者： Z. J. Qiu Z. Zhang J. Lu R. Liu M. Ostling S. L. Zhang State Key Lab of ASIC & System Fudan University Shanghai China School of Information and Communication Technology Royal Institute of Technology Stockholm Sweden The Ångström Laboratory Uppsala University Uppsala Sweden

In this paper, dopant segregation (DS) method is adopted to enhance device performance of PtSi-based Schottky-barrier source/drain MOSFETs (SB-MOSFETs) fabricated on ultrathin silicon-on-insulator. The DS formation is realized by means of Silicide As Diffusion Source. Without DS treatment, the devices are typically p-type, but with a rather large electron branch at positive gate bias. Dopant segregation with As is found to turn the devices to well-performing n-MOSFETs, and DS with B to greatly enhance the hole conduction in the p-MOSFETs. A large threshold voltage (V{sub}t) shift is however observed in the p-MOSFET due to B lateral spread caused during the drive-in process for the DS formation. By reducing the drive-in temperature, this problem is partially addressed with a smaller V{sub}t shift and a much better control of short channel effect.

关键词： Schottky-barrier MOSFET Dopant segregation Threshold voltage SADS

来源：评论

学校读者我要写书评

暂无评论

Electrical Characterization of Ultrathin Single Crystalline Gd2O3/Si（100） with Pt Top Electrode

Electrical Characterization of Ultrathin Single Crystalline ...

引用

2008 9th International Conference on Solid-state and Integrated-Circuit Technology

作者： Apurba Laha H. Jrg Osten David Wei Zhang A. Fissel Institute of Electronic Materials and Devices Leibniz UniversityAppelstr. 11A. D-30167 HannoverGermany State Key Laboratory of ASIC and System Department of MicroelectronicsFudan University Information Technology Laboratory Leibniz UniversitySchneiderberg32D-30167 HannoverGermany

Capacitor composed of single crystalline Gd2O3 on Si(100) with Pt top electrode was fabricated by Molecular Beam Epitaxy. We present a systematic study of electrical properties of as-grown single crystalline Pt/Gd2O3/Si(100). Three capacitors with different thickness are used for electrical evaluation. The EOT of the samples are estimated to be 0.7 nm, 1.2 nm and 1.8 nm respectively. Work function of Pt on Gd2O3 is pinned at 4.75 eV and due to the lattice mismatch between Gd2O3, the interface state density is in the level of 1013 extracted by Terman and conductance methods.

关键词： Electrical Characterization of Ultrathin Single Crystalline Gd2O3/Si with Pt Top Electrode

来源：评论

学校读者我要写书评

暂无评论

High density Al2O3/TaN-based metal-insulatormetal capacitors in application to radio equency integrated circuits

引用

Chinese Physics B 2007年第9期16卷 2803-2808页

作者：丁士进黄宇健黄玥潘少辉张卫汪礼康 State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai 200433 China

Metal-insulator-metal （MIM） capacitors with atomic-layer-deposited Al2O3 dielectric and reactively sputtered TaN electrodes in application to radio frequency integrated circuits have been characterized electrically. The capacitors exhibit a high density of about 6.05 fF/μm^2, a small leakage current of 4.8 × 10^-8 A/cm^2 at 3 V, a high breakdown electric field of 8.61 MV/cm as well as acceptable voltage coefficients of capacitance （VCCs） of 795 ppm/V2 and 268ppm/V at 1 MHz. The observed properties should be attributed to high-quality Al2O3 film and chemically stable TaN electrodes. Further, a logarithmically linear relationship between quadratic VCC and frequency is observed due to the change of relaxation time with carrier mobility in the dielectric. The conduction mechanism in the high field ranges is dominated by the Poole-Frenkel emission, and the leakage current in the low field ranges is likely to be associated with trap-assisted tunnelling. Meanwhile, the Al2O3 dielectric presents charge trapping under low voltage stresses, and defect generation under high voltage stresses, and it has a hard-breakdown performance.

关键词： metal-insulator-metal atomic-layer-deposition Al2O3 radio frequency integrated circuit

来源：评论

学校读者我要写书评

暂无评论

Role of Si implantation in control of underlap length in Schottky-barrier source/drain MOSFETs on ultrathin body SOI

Role of Si implantation in control of underlap length in Sch...

引用

2008 9th International Conference on Ultimate Integration on Silicon (ULIS 2008)

作者： Z. J. Qiu Z. Zhang J. Olsson J. Lu P. E. Hellstrom R. Liu M. Ostling S. L. Zhang School of Information and Communication Technology Royal Institute of Technology Stockholm Sweden The Ångström Laboratory Uppsala University Sweden The Ångström Laboratory Uppsala University Uppsala Sweden State Key Lab of ASIC & System Fudan University Shanghai China

This works demonstrates a novel approach using Si implantation prior to Pt deposition and PtSi formation to control the underlap length between the PtSi source/drain regions to the gate in Schottky-Barrier (SB-)^sMOSFETs. Dopant segregation at the PtSi/Si interface is used to enhance device performance. With the I{sub}(on)/I{sub}(off) current ratio as an indicator, optimized Si implant doses are found for both n- and p-channel SB-MOSFETs. Through an effective barrier width, the underlap length has direct implication on the leakage current.

关键词： Si implantation Underlap length PtSi Schottky barrier-MOSFET Dopant segregation

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：