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International Conference on Solid-state and Integrated Circuit Technology

作者： Shaohui Pan Lunwen He L.K. Wang David Wei Zhang Department of Microelectronics ASIC & System State Key Laboratory Fudan University Shanghai China

ISBN: (纸本)1424401607

For the low voltage power MOSFETs, the power loss and the switching frequency are the most important parameters, the two are separately determined by the conduction resistance R DS (on) and the gate charge Q G . The gate charge mainly depends on the gate to drain charge Q GD . The so-called figure-of-merit, which is defined as the product of the R DS (on) and Q GD is commonly used to quantifying the performance of the power MOSFETs for a specified off-state breakdown voltage (BVDS). The trench gate structure power MOSFET can attain low conduction resistance R DS (on) with high cell density, in this paper its structure and performance are discussed, due to there is a body diode between drain and source, the electrical characteristic of drain and source is not symmetric. On curve tracer, the device's capacitive effects both the gate capacitance and the PN junction capacitance which determines the gate charge Q G are studied with its AC waveform. From this point, some abnormal cases are explained. Its C-V curve is also investigated, for the N- drift area under the gate which forms the gate to drain capacitance C GD , its high frequency C-V curve is different from that of the common MIS structure

关键词： Capacitance MOSFET circuits Power MOSFET Immune system Capacitance-voltage characteristics Low voltage Switching frequency Electric resistance Diodes Electric variables

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Modeling and Simulation of 1D Longitudinal Acoustic Resonator for JR Photoacoustic Spectroscopy

Modeling and Simulation of 1D Longitudinal Acoustic Resonato...

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International Conference on Infrared and Millimeter Waves

作者： Jia Luo Xinming Ji Jianye Wang Jia Zhou Guoping Ru Yiping Huang ASIC and System National Key Laboratory School of Microelectronics Fudan University Shanghai China

In this paper, an LC Circuit model is built for the simulation of ID acoustic resonator with considerations of some nonideal factors. The model is verified by the device and its corresponding experimental data. An ID acoustic resonator for CO spectroscopy is set up suing the model. The effects of its structural parameters, quality factor and resonant frequency as well as the ambient temperature on the performance are theoretically analyzed.

关键词： Spectroscopy Optical resonators Acoustic signal detection Circuit simulation Resonant frequency Gas lasers Gas detectors Acoustic devices Q factor Temperature

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Fast Conversion for Large Canonical OR-Coincidence Functions

Fast Conversion for Large Canonical OR-Coincidence Functions

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IEEE Asia-Pacific Conference on Circuits and systems

作者： M. Yang L. Wang A.E.A. Almaini State Key Laboratory of ASIC & System Microelectronics Department Fudan University Shanghai China School of Engineering Napier University Edinburgh UK

Fixed polarity canonical OR-coincidence (COC) expansions based on inclusive-OR and OR operations are dual forms of fixed polarity Reed-Muller expansions. Traditionally, they are obtained from maxterms of canonical products-of-sum (CPOS) expansions. Two conversion methods are proposed for generating fixed polarity COC expansions. The first proposed method called maxterm method is based on traditional maxterm method. Fast conversion speed is achieved after the coefficients were divided into several segments to reduce the duplication of the calculation. The second proposed method called minterm method generates fixed polarity COC expansions directly from programmable logic array (PLA) files. The minterm method can on average achieve 37.57% speed improvement over the maxterm method. Both algorithms outperform published work significantly

关键词： Programmable logic arrays Logic functions Circuit synthesis Circuit testing Central Processing Unit Laboratories Application specific integrated circuits microelectronics Signal processing algorithms Digital circuits

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A Fast Capacitance Extraction Engine

A Fast Capacitance Extraction Engine

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2006 8th International Conference on Solid-state and Integrated Circuit Technology

作者： Shilei Sun Jintao Xue Li Liu Gaofeng Wang Computer School Wuhan University Institute of Microelectronics & Information Technology Wuhan University State Key Laboratory of ASIC & System Fudan University

ISBN: (纸本)1424401607

A fast interconnect capacitance extraction engine is realized and presented *** a fast multipole accelerated Generalized Minimal Residual(GMRES) based three-dimensional(3-D) field solver,this software tool can quickly and accurately extract parasitic capacitances of arbitrary interconnects embedded in piece-wise constant *** engine is also capable of performing fast and accurate capacitance extraction for critical nets in Radio Frequency(RF) applications,IC designs,and MicroElectroMechanical systems(MEMS).The architecture of this extraction engine is *** examples are included to validate the extraction engine and demonstrate the capabilities of this extraction engine.

关键词： GMRES A Fast Capacitance Extraction Engine

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Electrical Properties Study of Ni（Pt）-silicide/Si Contacts

Electrical Properties Study of Ni（Pt）-silicide/Si Contacts

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2006 8th International Conference on Solid-state and Integrated Circuit Technology

作者： Yifei Huang Yu-Long Jiang Guo-Ping Ru Fang Lu Qijia Cai Shihai Cao Bing-Zong Li ASIC & System State Key Lab. School of MicroelectronicsFudan University State Key Lab of Applied Surface Physics Fudan University

＜正＞The electrical propertie of Ni（Pt）-silicide/Si contact is studied and it is revealed that the Schottky barrier contact obeys a complicated two Gauss *** is demonstrated that the Pt interface layer can not only...

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A Fast Inductance Extraction Engine

A Fast Inductance Extraction Engine

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International Conference on Wireless Communications, Networking and Mobile Computing (WiCom)

作者： Shilei Sun Jintao Xue Li Liu Gaofeng Wang Insistitute of Microelectronics & Information Technology Wuhan University of China China State Key Laboratory of ASIC & System Fudan University China

A fast inductance extraction engine is presented. With a fast multipole accelerated generalized minimal residual (GMRES) based three-dimensional (3-D) field solver, the software extracts parasitic inductance very quickly and accurately for interconnects with arbitrary geometries. The engine makes it possible the fast and highly-accurate analysis for critical nets in radio frequency (RF) application, antennae and even microelectromechanical systems (MEMS) devices. Moreover, the architecture of this engine is introduced, and some examples are given to demonstrate the extraction validity of the software which is presented

关键词： Inductance Engines Conductors Data mining Acceleration Integrated circuit interconnections Radio frequency Computer architecture Parameter extraction Equations

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Exact minimization of large fixed polarity dual form of reed-muller functions

Exact minimization of large fixed polarity dual form of reed...

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ICSICT-2006: 2006 8th International Conference on Solid-state and Integrated Circuit Technology

作者： Yang, M. Xu, H. Wang, L. Tong, J.R. Almaini, A.E.A. State Key Lab of ASIC and System Microelectronics Dept. Fudan University Shanghai 201203 China Tianjin Vocational College of Mechanics and Electricity Tianjin China School of Engineering Napier University Edinburgh EH10 5DT United Kingdom

ISBN: (纸本)1424401615

Dual Form of Reed-Muller (DFRM) expansions are implemented in OR/XNOR logic, which are based on the features of coincidence operation and known as fixed polarity Canonical OR-Coincidence (COC) expansions. An efficient minimization method is proposed to find the best polarity COC expansion for large functions. The method derives one expansion from another adjacent polarity expansion using gray code, resulting in small space complexity O(M) and time complexity O(2nMlogM) (n and M are the number of input variables and the number of on-set COC maxterms). Hence, it makes minimization for large functions practical. ©2006 IEEE.

关键词： Logic circuits

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Implementation of a CMOS down-conversion mixer for GSM1900 receivers

Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors

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Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors 2006年第3期27卷 467-472页

作者： Chu, Fangqing Li, Wei Su, Yanfeng Ren, Junyan State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai 201203 China Shanghai Sicomm RF Technology Incorporation Shanghai 200433 China

A 1.9 GHz down-conversion CMOS mixer with a novel folded Gilbert cell, intended for use in GSM1900 (PCS1900) low-IF receivers, is fabricated in a RF 0.18 μm CMOS process. The prototype demonstrates good performance at an intermediate frequency of 100 kHz. It achieves a conversion gain of 6 dB, SSB noise figure of 18.5 dB (1 MHz IF), and IIP3 11.5 dBm while consuming a 7 mA current from a 3.3 V power supply.

关键词： Mobile telecommunication systems

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Modified Reynolds equation for squeeze-film air damping of slotted plates in MEMS devices

Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors

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Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors 2006年第3期27卷 473-477页

作者： Sun, Yuancheng Bao, Minhang Yang, Heng Huang, Yiping State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai 200433 China State Key Laboratory of Transducer Technologies Shanghai Institute of Microsystem and Information Technology Chinese Academy of Sciences Shanghai 200050 China

A differential equation for calculating squeeze-film air damping in slotted plates is developed by modifying the Reynolds equation. A term is added to account for the effect of airflow through the slots on the air damping of the plate. The end effect of the airflow in the slots is also treated by substituting an effective channel length for the geometric channel length (i.e. the thickness of the plate). The damping pressure distribution, damping force, and damping force coefficient of the slotted plates can be found by solving the equation under appropriate boundary conditions. With restrictions on the thickness and the lateral dimensions of the slotted plate removed, the equation provides a useful tool for analysing the squeeze-film air damping effect of slotted plates with finite thickness and finite lateral dimensions. For a typical slotted plate structure, the damping force coefficient obtained by this equation agrees well with that generated by ANSYS.

关键词： Microelectromechanical devices

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A Spectral Stochastic Collocation Method for Capacitance Extraction of Interconnects with Process Variations

A Spectral Stochastic Collocation Method for Capacitance Ext...

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IEEE Asia-Pacific Conference on Circuits and systems

作者： Hengliang Zhu Xuan Zeng Wei Cai Dian Zhou ASIC & System State Key Laboratory Microelectronics Department Fudan University Shanghai China Department of Mathematics University of North Carolina Charlotte USA

In this paper, a spectral stochastic collocation method (SSCM), is proposed for the capacitance extraction of interconnects with either on-chip process variations or off-chip rough surfaces. The proposed method is based on the stochastic spectral method combined with sparse grid technique, and has several advantages over the existing methods. Compared with the perturbation method, the stochastic spectral method based on homogeneous chaos expansion has exponential convergence rate, which makes it very promising for parasitic extraction with process variations. Furthermore, the sparse grid technique significantly reduces the amount of sampling points compared with Monte Carlo method, and greatly saves the computation time for capacitance extraction. Numerical experiments have demonstrated that SSCM can achieve higher accuracy while having the same efficiency compared with the existing methods

关键词： Stochastic processes Capacitance Chaos Integrated circuit interconnections Rough surfaces Surface roughness Perturbation methods Surface topography Conductors Solid modeling

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