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Design and simulation of 1D longitudinal acoustic resonator for photoacoustic spectroscopy

Design and simulation of 1D longitudinal acoustic resonator ...

引用

2006 8th International Conference on Solid-state and Integrated Circuit Technology

作者： Jia Luo Xinming Ji Jianye Wang Jia Zhou Guoping Ru Yiping Huang ASIC ＆ System State Key Lab School of Microelectronics Fudan University

ISBN: (纸本)1424401607

＜正＞The design of acoustic resonator is critical for the sensitivity of photoacoustic（PA） gas *** this paper, a LC Circuit model is built for the simulation of 1D acoustic resonator with considerations of some nonideal factors such as the boundary layers in *** model is verified by the device and the corresponding experimental *** an application of the model,a 1D acoustic resonator for CO photoacoustic spectroscopy is studied. The effects of the structrual parameters,quality factor and resonant frequency on the performance of the device are theoretically ***’s worthy noted that for the first time we point out the effect of the ambient temperature.

关键词： ACOUSTIC RESONATORS Photoacoustic spectroscopy boundary layer simulating resonant frequencies Experimental data

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Efficient Model-Based OPC via Graph Neural Network

Efficient Model-Based OPC via Graph Neural Network

引用

2023 International Symposium of Electronics Design Automation, ISEDA 2023

作者： Sun, Shuyuan Chen, Xuelian Yang, Fan Yu, Bei Li, Shang Zeng, Xuan School of Microelectronics Fudan University State Key Lab of ASIC and System China Cogenda Inc China The Chinese University of Hong Kong Department of Computer Science and Engineering Hong Kong

ISBN: (纸本)9798350304510

As feature size continues to shrink and light source wavelengths remain unchanged, the optical diffraction effects seriously degrade chip yield. Optical proximity correction (OPC) has become an essential step for chip manufacturability. However, OPC cannot achieve satisfactory mask correction results in an affordable number of iterations on some layouts, delaying the chip design cycle. In this paper, we propose to use the Graph Neural Network (GNN) to predict the initial mask correction and speed up model-based OPC. We design a graph model to represent the chip layout, with segments represented as graph nodes and the diffraction effects between them represented as graph edges. The GNN is used to obtain the embedding of the segment, and we predict the shift value based on its output. The proposed GNN-based predictor enhances the original OPC to find a good correction solution for full-chip-size masks in fewer iterations. compared with the original OPC method, experimental results on 55nm and 32nm full chip designs show that the proposed GNN-based OPC method reduces the number of iterations up to 75% and the acquired mask of comparable quality. © 2023 IEEE.

关键词： Diffraction

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Investigation of tunneling field effect transistor reliability

Investigation of tunneling field effect transistor reliabili...

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2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology

作者： Jiao, G.F. Huang, X.Y. Chen, Z.X. Cao, W. Huang, D.M. Yu, H.Y. Singh, N. Lo, G.Q. Kwong, D.-L. Li, Ming-Fu State Key Lab. of ASIC and System Department of Microelectronics Fudan University Shanghai 200433 China Singapore 117685 Singapore School of EEE Nanyang Technological University Singapore 639798 Singapore

ISBN: (纸本)9781424457984

This paper summarizes our recent investigations of nano-wire n type tunneling field effect transistor (n-TFET) reliability by experimental measurements and physical analysis [1-3]. Large PBTI and HC degradations which are very different from those in conventional n-MOSFETs were observed. The results are interpreted by different degradation mechanism in TFET. ©2010 IEEE.

关键词： Degradation

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RLCkt: An Analog Circuit Automatic Sizing Sage Based on Reinforcement Learning

RLCkt: An Analog Circuit Automatic Sizing Sage Based on Rein...

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2023 China Semiconductor Technology International Conference, CSTIC 2023

作者： Zuo, Wangge Liu, Lingge Li, Fei Huang, Yifei Zhang, Liqian Wan, Jing Fudan University School of Information Science and Engineering State Key Lab of Asic and System Shanghai200433 China Suzhou Foohu Technology Co. Ltd. Shanghai200433 China

ISBN: (纸本)9798350311006

Automated solutions for sizing analog circuits have gained significant interest due to the labor-intensive nature of the task in a typical design cycle, especially with technology development and circuit scaling. This study introduces the RLCkt, an Analog Circuit Automatic Sizing Sage, which utilizes reinforcement learning (RL) and the SPICE simulator to automatically adjusts design parameters to meet performance metrics. After several hours of training, RLCkt runs 94 times faster than a traditional generic algorithm with comparable performance. Additionally, its generalization capability surpasses that of state-of-the-art methods. © 2023 IEEE.

关键词： Reinforcement learning

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Role of Si implantation in control of underlap length in Schottky-Barrier source/drain MOSFETs on ultrathin body SOI

Role of Si implantation in control of underlap length in Sch...

引用

9th International Conference on ULtimate Integration of Silicon, ULIS 2008

作者： Qiu, Z.J. Zhang, Z. Olsson, J. Lu, J. Hellström, P.-E. Liu, R. Östling, M. Zhang, S.-L. State Key Lab. of ASIC and System School of Microelectronics Fudan University Shanghai China School of Information and Communication Technology Royal Institute of Technology Stockholm Sweden Angstrom Laboratory Uppsala University Uppsala Sweden

ISBN: (纸本)9781424417308

This works demonstrates a novel approach using Si implantation prior to Pt deposition and PtSi formation to control the underlap length between the PtSi source/drain regions to the gate in Schottky-Barrier (SB-) MOSFETs. Dopant segregation at the PtSi/Si interface is used to enhance device performance. With the Ion/Ioff current ratio as an indicator, optimized Si implant doses are found for both n- and p-channel SB-MOSFETs. Through an effective barrier width, the underlap length has direct implication on the leakage current. © 2008 IEEE.

关键词： Schottky barrier diodes

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Optimization of mixed polarity Reed-Muller functions using genetic algorithm

Optimization of mixed polarity Reed-Muller functions using g...

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IEEE International Conference on Computer Research and Development

作者： Yang, M. Xu, Hongying Almaini, A.E.A. State Key Lab. of ASIC and System Fudan University Shanghai China Tianjin Vocational College of Mechanics and Electricity Tianjin China School of Engineering Napier University Edinburgh United Kingdom

ISBN: (纸本)9781612848372

In this paper, genetic algorithm (GA) using parallel tabular technique is presented for the optimization of mixed polarity Reed Muller and mixed polarity dual Reed Muller functions. The algorithm is to find optimal solution among 3n different solutions for large functions. To overcome the disadvantage of the traditional tabular technique, the cost function of GA is based on parallel tabular technique, in which new terms are generated at one time instead of generating in sequence. Without generating all the polarities, the proposed algorithm is efficient in terms of CPU time and achieves 8% improvement in average. © 2011 IEEE.

关键词： Logic Synthesis

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Silicide as diffusion source for dopant segregation in 70-nm MOSFETs with PtSi Schottky-barrier source/drain on ultrathin-body SOI

Silicide as diffusion source for dopant segregation in 70-nm...

引用

9th International Conference on ULtimate Integration of Silicon, ULIS 2008

作者： Qiu, Z.J. Zhang, Z. Lu, J. Liu, R. Östling, M. Zhang, S.-L. State Key Lab. of ASIC and System School of Microelectronics Fudan University Shanghai China School of Information and Communication Technology Royal Institute of Technology Stockholm Sweden Angstrom Laboratory Uppsala University Uppsala Sweden

ISBN: (纸本)9781424417308

In this paper, dopant segregation (DS) method is adopted to enhance device performance of PtSi-based Schottky-barrier source/drain MOSFETs (SB-MOSFETs) fabricated on ultrathin silicon-on-insulator. The DS formation is realized by means of Suicide As Diffusion Source. Without DS treatment, the devices are typically p-type, but with a rather large electron branch at positive gate bias. Dopant segregation with As is found to turn the devices to well-performing n-MOSFETs, and DS with B to greatly enhance the hole conduction in the p-MOSFETs. A large threshold voltage (Vt) shift is however observed in the p-MOSFET due to B lateral spread caused during the drive-in process for the DS formation. By reducing the drive-in temperature, this problem is partially addressed with a smaller Vt shift and a much better control of short channel effect. © 2008 IEEE.

关键词： Threshold voltage

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Fabrication and transmission characteristic of PDMS plasma photonic crystal

Fabrication and transmission characteristic of PDMS plasma p...

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International Conference on Solid-state and Integrated Circuit Technology

作者： Jinying Zhang Hua Huang Xinming Ji Jia Zhou Yiping Huang ASIC and System State Key Lab School of Microelectronics Fudan University Shanghai China

ISBN: (纸本)9781424421855

Two-dimensional (2-D) polydimethylsiloxane (PDMS) plasma photonic crystal with square lattice structure was fabricated by hydro-casting method using Si-based templates. The transmission characteristic of PDMS plasma photonic crystal was studied by UV-visible spectrophotometer. The results show that the plasma photonic crystal can improve the transmitted rate in visible light range.

关键词： Fabrication Plasma properties Photonic crystals Plasma applications Plasma waves Plasma simulation Testing Lattices Periodic structures Gold

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Automated Design of Complex Analog Circuits with Multiagent based Reinforcement Learning

Automated Design of Complex Analog Circuits with Multiagent ...

引用

Design Automation Conference

作者： Jinxin Zhang Jiarui Bao Zhangcheng Huang Xuan Zeng Ye Lu State Key Lab. of ASIC & System School of Information Science and Technology Frontier Institute of Chip and System State Key Lab. of ASIC & System Microelectronics Department Fudan University Shanghai China

Despite the effort of analog circuit design automation, currently complex analog circuit design still requires extensive manual iterations, making it labor intensive and time-consuming. Recently, reinforcement learning (RL) algorithms have been demonstrated successfully for the analog circuit design optimization. However, a robust and highly efficient RL method to design analog circuits with complex design space has not been fully explored yet. In this work, inspired by multiagent planning theory as well as human expert design practice, we propose a multiagent based RL (MA-RL) framework to tackle this issue. Particularly, we (i) partition the complex analog circuits into several sub-blocks based on topology information and effectively reduce the complexity of design search space; (ii) leverage MA-RL for the circuit optimization, where each agent corresponds to a single sub-block, and the interactions between agents delicately mimic the best design tradeoffs between circuit sub-blocks by human experts; (iii) introduce the multiagent twin-delayed techniques to further boost training stability and accomplish higher performances. Experiments on two different analog circuit topologies and knowledge transfers between two technology nodes are demonstrated. It’s shown that MA-RL framework can achieve the best FoM for complex analog circuits design. This work shines the light for future large scale analog circuit system design automation.

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The oxygen barrier properties of CoxMoy diffusion barrier for Cu interconnect

The oxygen barrier properties of CoxMoy diffusion barrier fo...

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IEEE International Conference on Interconnect Technology

作者： Li-Ao Cao Xin-Ping Qu State key lab of ASIC and system School of Microelectronics Fudan University Shanghai China

ISBN: (纸本)9781509003877

In this work, oxygen barrier properties of a promising single layer diffusion barrier Co x Mo y for copper interconnect has been investigated. Sandwich structures of barrier/Cu/barrier were fabricated to modulate the damascene structure. The samples were oxidized by thermal annealing in air at 200-300°C for 1min to 1h. Sheet resistance, optical microscopy, SEM, XRD and XPS were used to characterize the oxidation behavior of the sandwich structure and the barrier itself. Results show that, with more Mo content, the anti-oxidation property of CoMo is better. The Co 1 Mo 3 barrier has best oxygen barrier property: it can protect Cu from oxidizing after 300°C/30 min annealing in air and the barrier film itself has low oxygen content.

关键词： Films Annealing Oxidation Copper Sandwich structures Resistance

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