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检索条件"机构=School of Microelectronies and State Key Lab of ASIC and System"

共 181 条记录，以下是61-70 订阅

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A Threshold Voltage Model for the Surrounding-Gate MOSFETs

A Threshold Voltage Model for the Surrounding-Gate MOSFETs

引用

2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

作者： Guanghui Mei Guangxi Hu Peicheng Li Jinglun Gu Ran Liu Tingao Tang ASIC & System State Key Lab School of Microelectronics Fudan University Shanghai 200433 China

ISBN: (纸本)9781424457977

The metal-oxide-semiconductor field-effect transistor (MOSFET) with a surrounding-gate (SG) is investigated. Poisson's Equation (PE) is solved analytically. The analytic expressions for electrical potential and threshold voltage (Vth) are obtained. The results are verified with Sentaurus simulations, good agreement is observed. The Vth model can be used for the integrated circuit designers.

关键词： threshold voltage metal-oxide-semiconductor field effect transistors potential DUAL-GATE MOSFET Steam generators Integrated circuits Designers VOLTAGE

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An Analytic Threshold Voltage Model for the Double-Gate Schottky-Barrier Source/Drain MOSFETs

An Analytic Threshold Voltage Model for the Double-Gate Scho...

引用

2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

作者： Peicheng Li Guangxi Hu Guanghui Mei Ran Liu Yi Jiang Tingao Tang ASIC & System State Key Lab School of Microelectronics Fudan University Shanghai 200433 China

ISBN: (纸本)9781424457977

The threshold voltage, Vth of a double-gate SchottkyBarrier (DGSB) source/drain (S/D) metal-oxidesemiconductor field-effect transistor (MOSFET) has been investigated. An analytic expression for surface potential in the channel is obtained and the results are verified via simulations, good agreement is observed. A new definition for Vth is given, and an analytic expression for V,h is presented. We find that when the silicon thickness, tsi is small (<3 nm), V,h is very sensitive to it. Vth increases dramatically with the decreasing of tsi. Vth also increases with the increasing of the oxide thickness, and with the decreasing of the drain-so'irce voltage. These results can be of great help to the ultralargescale integrated-circuit (ULSI) designers.

关键词： threshold voltage double gate surface potential metal-oxide-semiconductor field effect transistors VOLTAGE Very large scale integration

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Ar RIE to improve the source/drain contact in GaN HEMT

Ar RIE to improve the source/drain contact in GaN HEMT

引用

International Conference on Solid-state and Integrated Circuit Technology

作者： K.M. Zhu J.N. Deng X.Y. Cao J. Wan State key lab of ASIC and System School of Information Science and Engineering Fudan University China

In this work, we introduce an effective yet low cost method to improve the Ohmic contact in the AlGaN/GaN HEMT. Even with high temperature annealing, the source/drain contact shows Schottky behavior with a large turn-on voltage (V ON ) which limits the ON current of the transistor, especially under low operation voltage. An extra Ar reactive ion etching (RIE) performed after the O 2 RIE is found to largely improve the source/drain contact. The Schottky contact with high V ON is converted to Ohmic contact with negligible V ON under a moderate Ar RIE power. The relation between the Ar RIE power and V ON is studied systematically revealing an interesting trend. This effect is due to the recess of the AlGaN layer by the Ar RIE, similar to that etched by the Cl-based inductive coupled plasma (ICP). Compared to Cl-based ICP, Ar RIE has lower production cost, better environmental compatibility and is less hazardous to human health.

关键词： Aluminum gallium nitride Wide band gap semiconductors HEMTs Annealing Ohmic contacts Gallium nitride Iterative closest point algorithm

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Electrical Properties Study of Ni（Pt）-silicide/Si Contacts

Electrical Properties Study of Ni（Pt）-silicide/Si Contacts

引用

2006 8th International Conference on Solid-state and Integrated Circuit Technology

作者： Yifei Huang Yu-Long Jiang Guo-Ping Ru Fang Lu Qijia Cai Shihai Cao Bing-Zong Li ASIC & System State Key Lab. School of MicroelectronicsFudan University State Key Lab of Applied Surface Physics Fudan University

＜正＞The electrical propertie of Ni（Pt）-silicide/Si contact is studied and it is revealed that the Schottky barrier contact obeys a complicated two Gauss *** is demonstrated that the Pt interface layer can not only...

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GAS SENSING CMOS TRANSISTORS BASED ON SOI SUBSTRATE

GAS SENSING CMOS TRANSISTORS BASED ON SOI SUBSTRATE

引用

International Conference on Solid-state and Integrated Circuit Technology

作者： K. Xiao J. Liu X. Liu J. Wan State key lab of ASIC and System School of Information Science and Engineering Fudan University Shanghai China

ISBN: (数字)9781728162355

ISBN: (纸本)9781728162362

In recent years, the development of miniature gas sensors based on silicon technology is being increasingly emphasized. Most of the devices reported are based on micro-hot plates, but the materials they used are not fully compatible with CMOS and are therefore not suitable for massive production and co-integration with CMOS circuit. In addition, extra process steps are needed to form the sensing device and CMOS circuits separately. In this work, we demonstrate novel gas sensor devices directly based on the MOSFET transistors fabricated in the silicon-on-insulator (SOI) substrate. Both n-type and p-type devices are demonstrated showing opposite sensing polarity under the exposure to NO 2 gas.

关键词： Sensors Gas detectors Sensitivity Substrates Silicon Threshold voltage MOSFET

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High-speed and low-power 2.5D I/O circuits for memory-logic-integration by through-silicon interposer

High-speed and low-power 2.5D I/O circuits for memory-logic-...

引用

2013 IEEE International 3D systems Integration Conference, 3DIC 2013

作者： Wang, Jiacheng Ma, Shunli Manoj, P. D. Sai Yu, Mingbin Weerasekera, Roshan Yu, Hao ERI at N Interdisciplinary Graduate School Nanyang Technological University Singapore Singapore State Key Lab. of ASIC and System Fudan Univerisy China School of EEE Nanyang Technological Univerisy Singapore 639798 Singapore Institute of Microelectronics A STAR Singapore Singapore

ISBN: (纸本)9781467364843

In this paper, two high-speed and low-power I/O circuits are developed using through-silicon-interposer (TSI) for 2.5D integration of multi-core processor and memory in 65nm CMOS process. For a 3mm TSI interconnection of transmission line (T-line), the first I/O circuit is a low-voltage-differential- signal (LVDS) buffer and the second one is a current-mode-logic (CML) buffer. To compensate the high-frequency loss from T-line, a pre-emphasis circuit is deployed in the LVDS buffer, and a wide-band inductor-matching is deployed in the CML buffer. Based on the post layout simulation results, the LVDS buffer can achieve 360mV peak-to-peak differential output signal swing and 563fs cycle-to-cycle jitter with 10Gb/s bandwidth and 4.8mW power consumption. The CML buffer can achieve 240mV peak-to-peak differential output signal swing and 453fs jitter with 12.8Gb/s data-rate and 1.6mA current consumption under 0.6V ultra low-power supply. © 2013 IEEE.

关键词： Timing circuits

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Automatic design of analog integrated circuit based on multi-objective optimization

Automatic design of analog integrated circuit based on multi...

引用

International Conference on Solid-state and Integrated Circuit Technology

作者： Wei Mao Jia-Hao Wei Jing Wan State key lab of ASIC and System School of Information Science and Engineering Fudan University Shanghai China

ISBN: (数字)9781728162355

ISBN: (纸本)9781728162362

In this work, we have explored the automatic design of an operational amplifier using multi-objective optimization technique. The design parameters of the circuit, including transistor sizes, bias current and load capacitance, have been optimized by genetic algorithm, in order to achieve the best compromise (Pareto-Front) between performances, such as Gain, cut-off frequency, quiescent current and phase. Optimizations with two and three objectives have been demonstrated successfully. Various population size and optimization algorithms have been used in our work and compared systematically.

关键词： Optimization Statistics Sociology Pareto optimization Genetic algorithms Mathematical model Operational amplifiers

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A 16-bit Arithmetic Logic Unit Design by Using Gate Diffusion Input

A 16-bit Arithmetic Logic Unit Design by Using Gate Diffusio...

引用

International Conference on Solid-state and Integrated Circuit Technology

作者： Yihang Duanmu Jianguo Yang Jinbao Li Xiaoyong Xue Minge Jing Xiaoyang Zeng State Key Lab of ASIC and System School of Microelectronics Fudan University Shanghai China Zhejiang Lab Hangzhou China

ISBN: (数字)9781728162355

ISBN: (纸本)9781728162362

Gate diffusion input (GDI) is a new technology of digital circuit design for low power. Compared with traditional CMOS technology, GDI technology can reduce the power consumption, the propagation delay and the circuit area. This work uses the GDI technology to build a 16-bit arithmetic logic unit (ALU) to perform logic operations (AND, OR, NAND and XOR), and math operations (addition, subtraction, adding 1 and subtracting 1), and finally compares it with traditional CMOS circuits.

关键词： Logic gates Adders Simulation CMOS technology Power demand Inverters Delays

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A 23-34 GHz Wideband GaN Low-Noise Amplifier for 5G Millimeter-Wave Applications

A 23-34 GHz Wideband GaN Low-Noise Amplifier for 5G Millimet...

引用

2021 IEEE International Workshop on Electromagnetics: Applications and Student Innovation Competition, iWEM 2021

作者： Li, Yubin Wu, Xueying Hu, Jun Zhang, Xiuyin Yin, Yun Xu, Hongtao State Key Laboratory of Asic and System Fudan University Shanghai201203 China Pazhou Lab Guangzhou510320 China School of Electronic and Information Engineering South China University of Technology South China University of Technology Guangzhou510641 China

ISBN: (纸本)9781665418287

This paper presents a design of 23-34 GHz wideband low-noise amplifier (LNA) based on gallium-nitride (GaN) technology. The LNA circuit employs an input matching network with few components and particularly reduces the noise of the second stage at the high frequency, which makes the circuit achieve sub-1dB noise performance in the whole bandwidth, while completing noise and impedance matching. Because inductive peaking technique and stagger tuning technique are adopted, the small-signal gain of the LNA is from 22.1 dB to 25.2 dB over the whole bandwidth. With 30.9 dBm maximum output-referred third-order intercept point (OIP3) and 42 dBm maximum input power (Pin,max), the LNA also achieves high linearity and high reliability. © 2021 IEEE.

关键词： Monolithic microwave integrated circuits

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Quantum Mechanical Effects on the Threshold Voltage of the Evenly Doped Surrounding-Gate MOSFETs

Quantum Mechanical Effects on the Threshold Voltage of the E...

引用

2011 IEEE 9th International Conference on asic(2011年第九届IEEE国际专用集成电路大会)

作者： Guanghui Mei Peicheng Li Guangxi Hu Ran Liu Tingao Tang State Key Lab of ASIC and System School of Information Science and Technology Fudan University Shanghai 200433 China

In this work, we investigate analytically quantum mechanical (QM) effects on the threshold voltage (VTH ) shift of the surrounding-gate (SG) MOSFETs. We show how VTH is influenced with QM effects with the considerations of (110)-silicon (Si) orientation and (100)-Si orientation. When the radius of an SG MOSFET is small (<3nm), the VTH shift will be significant, and one should be careful in the use of a device with an extremely small silicon body radius. The analytical results are compared with those obtained by B. Yu et al., and good agreement is observed.

关键词： Lead MOSFET circuits

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