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检索条件"机构=School of Microelectronies and State Key Lab of ASIC and System"

共 181 条记录，以下是81-90 订阅

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Nanofabrication of 100nm radial nanoslits in Au by a novel PMMA/NEB bilayer technique for manipulating vectorial optical field

Nanofabrication of 100nm radial nanoslits in Au by a novel P...

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The 6th International Conference on Nanoscience and Technology, China 2015 (第六届中国国际纳米科学技术会议)

作者： XiaQi Huang Jinhai Shao Chialin Tsou Sichao Zhang Bingrui Lu Yifang Chen Nanolithography and Application Research Group State key lab of Asic and SystemSchool of Information Science and EngineeringFudan University

Inhomogeneous spatial polarization state of vectorial optical field is of importance in biophotonics,communication,single molecule imaging and optical tweezers etc[1].It have been reported that the radial sub-wavelength nanoslits can generate vector field due to the surface plasmon polarization effect[2],but fabrication of nanoslits in gold still remains a daunting *** achieve high quality orbital polarization with high extinction,the width of nanoslits should be below *** fabrication method for such a structure is to employ electron beam lithography(EBL)in negative tone resist with high sensitivity.

关键词： vectorial optical field radial nanoslits electron beam lithography PMMA/NEB bilayer

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Optical behavior in visible frequency through free-standing chiral metamaterial in SiNx membrane

Optical behavior in visible frequency through free-standing ...

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The 6th International Conference on Nanoscience & Technology, China 2015

作者： Bingrui Lu Chen Xu Sichao Zhang Junjie Li Yifang Chen Nanolithography and Application Research Group State key lab of Asic and SystemSchool of Information Science and EngineeringFudan University

Metamaterials are artificially structured media that are engineered for electromagnetic properties such as negative refractive index, giant optical activity and circular dichroism. Applications include multiband circular polarization transformers and wave plates, chirality based sensors etc. Theoretical studies on metamaterials for their enormously strong chiral responses, covers various structural designs such as helical, split ring, combined U- or L-shape, twisted arc, twisted rosette, metallic cut wire structures etc. However, the research on the actual devices is limited because the actual structures are normally generated on a substrate, which interferes with the optical behavior of the metamaterial itself, making it difficult to distinguish the contributions between the two factors. In order to study the optical behavior of the metamaterial, developing a method to create free-standing metamaterial structures is crucial. Here we report a method for free-standing chiral metamaterials on Si Nx membrane. First, a suspended Si Nx membrane of 100 nm thickness is fabricated on a double-side-polished silicon substrate. The Si Nx layer is deposited by LPCVD onto one side of the silicon substrate. On the other side multiple windows in the size of 1 mm by 1 mm are etched through the silicon substrate using KOH chemical with the protection of photoresist, leaving the Si Nx film suspended. Then a JEOL 6300 FS EBL system is used to create chiral patterns in the PMMA resist on the Si Nx membrane. Afterwards, Reactive Ion Etching by Samco RIE system is applied with CHF3 and O2 to etch through the Si Nx membrane to form the stencil mask. After depositing the metal film on top of the etched Si Nx membrane, the free-standing metamaterial structures are created. With this method, free-standing chiral metamaterial structures are generated for optical behavior study within the visible frequency range. This facilitates enhanced experimental research on metamaterial devices in the st

关键词： chiral metamaterial free-standing visible frequency optical behavior

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Algorithm and VLSI Architecture of Channel Estimation Impaired by Impulsive Noise in PLC

Algorithm and VLSI Architecture of Channel Estimation Impair...

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IEEE International Midwest Symposium on Circuits and systems

作者： Yun Chen Qiang Zhang Yunlong Ge Yuanzhou Hu Jie Chen Na Ding Xiaoyang Zeng Defeng (David) Huang The State Key Lab of ASIC & System Fudan University School of Electrical Electronic & Computer Engineer University of Western Australia

ISBN: (纸本)9781479900657

In this paper, we investigate the channel estimation algorithm for medium-voltage, long haul power line communi-cation (PLC) system in the IEEE 1901 standard. To improve the overall performance, we employ a dual Gaussian interpolation method working on the amplitude and phase domain simultane-ously, a major difference from the conventional schemes using the real and imaginary part. Meanwhile, to mitigate the effect of impulsive noise, a notorious impairment in PLC transmission, we propose an impulsiveness detection/cancellation method using unused null subcarriers. Extensive simulation results indicate improved performance than the conventional inter-polators in an impulsive environment. The channel models proposed by the open power-line communication European research alliance (OPERA) are utilized for simulation. The hardware architecture is also presented together with its achievable performance.

关键词： Channel estimation Interpolation OFDM Channel models Noise cancellation Bit error rate

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Exact minimization of large fixed polarity dual form of reed-muller functions

Exact minimization of large fixed polarity dual form of reed...

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ICSICT-2006: 2006 8th International Conference on Solid-state and Integrated Circuit Technology

作者： Yang, M. Xu, H. Wang, L. Tong, J.R. Almaini, A.E.A. State Key Lab of ASIC and System Microelectronics Dept. Fudan University Shanghai 201203 China Tianjin Vocational College of Mechanics and Electricity Tianjin China School of Engineering Napier University Edinburgh EH10 5DT United Kingdom

ISBN: (纸本)1424401615

Dual Form of Reed-Muller (DFRM) expansions are implemented in OR/XNOR logic, which are based on the features of coincidence operation and known as fixed polarity Canonical OR-Coincidence (COC) expansions. An efficient minimization method is proposed to find the best polarity COC expansion for large functions. The method derives one expansion from another adjacent polarity expansion using gray code, resulting in small space complexity O(M) and time complexity O(2nMlogM) (n and M are the number of input variables and the number of on-set COC maxterms). Hence, it makes minimization for large functions practical. ©2006 IEEE.

关键词： Logic circuits

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A 60.8–67GHz and 6.3mW injection-locked frequency divider with switching-inductor loaded transformer in 65nm CMOS

A 60.8–67GHz and 6.3mW injection-locked frequency divider w...

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Microwave, MTT-S International Symposium

作者： Haipeng Fu Wei Fei Hao Yu Junyan Ren State Key Lab of ASIC and System Fudan University China School of Electrical and Electronic Engineering Nanyang Technological University Singapore

A CMOS 60GHz injection-locked frequency divider (ILFD) is demonstrated in this paper by introducing a wide-frequency-range switching-inductor loaded transformer. With different switching conditions, multi-band operation can be realized to improve the locking range with low power consumption and compact area. The 60GHz ILFD together with the entire divider chain is implemented in 65nm CMOS process with measured frequency range from 60.8 to 67GHz covered by two switching bands that can be utilized in 60GHz PLL design.

关键词： CMOS integrated circuits Switching circuits Switches Frequency measurement Indexes Frequency conversion

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MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency

MajorityNets: BNNs Utilising Approximate Popcount for Improv...

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IEEE International Conference on Field-Programmable Technology (FPT)

作者： Seyedramin Rasoulinezhad Sean Fox Hao Zhou Lingli Wang David Boland Philip H.W. Leong School of Electrical and Information Engineering The University of Sydney Australia State Key Lab of ASIC and System Fudan University Shanghai China

Binarized neural networks (BNNs) have shown exciting potential for utilising neural networks in embedded implementations where area, energy and latency constraints are paramount. With BNNs, multiply-accumulate (MAC) operations can be simplified to XnorPopcount operations, leading to massive reductions in both memory and computation resources. Furthermore, multiple efficient implementations of BNNs have been reported on field-programmable gate array (FPGA) implementations. This paper proposes a smaller, faster, more energy-efficient approximate replacement for the XnorPopcount operation, called XNorMaj, inspired by state-of-the-art FPGA look-up table schemes which benefit FPGA implementations. We show that XNorMaj is up to 2x more resource-efficient than the XnorPopcount operation. While the XNorMaj operation has a minor detrimental impact on accuracy, the resource savings enable us to use larger networks to recover the loss.

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A 32.5-GS/s two-channel time-interleaved CMOS sampler with switched-source follower based track-and-hold amplifier

A 32.5-GS/s two-channel time-interleaved CMOS sampler with s...

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Microwave, MTT-S International Symposium

作者： Shunli Ma Jiacheng Wang Hao Yu Junyan Ren State Key Lab of ASIC and System Fudan University China School of Electrical and Electronic Engineering Nanyang Technological University Singapore

This paper presents a high speed and low distortion sampler with two-channel time-interleaved sampler with track-and-hold amplifier (THA). The THA is based on switched source-follower with active inductor load such that wide bandwidth in tack-mode and small signal feed-through in hold-mode can be both achieved within compact area. Furthermore, one clock-controlled auxiliary transistor is also introduced to cancel clock feed-through in hold-mode. The chip was fabricated in 65nm RF-CMOS process with core area of 0.07mm 2 and power consumption of 192mW. The measured S-parameters show matched input and output up to 40GHz with 19.3GHz bandwidth in track-mode. The measured spurious-free-dynamic-range (SFDR) is 35dB, and total harmonic distortion (THD) is -30dB sampled at 16.26GS/s in one channel.

关键词： Inductors CMOS integrated circuits Switches Clocks Silicon germanium CMOS technology

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Nanofabrication and Optical Property of Submicron Gold Nanopillar Array in both Visible and Near-Infrared Spectra

Nanofabrication and Optical Property of Submicron Gold Nanop...

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The 6th International Conference on Nanoscience and Technology, China 2015 (第六届中国国际纳米科学技术会议)

作者： Yaqi Ma Jianpeng Liu Sichao Zhang Jinhai Shao Yifang Chen Nanolithogrophy and Application Research Group State Key Lab of ASIC and SystemSchool of Information Science and EngineeringFudan UniversityChina

Local surface plasmonic resonance(LSPR)existing in noble metallic nanostructures,which is caused by the resonant excitation of collective oscillations between the surface free electrons in metallic nanostructures with specific frequency of light,is very important for the development of novel nanoscopic bio/*** for anistropic nanostructures,such as sub-wavelength gold nano pillars,the high quality factors and sensitivity comparable to conventional surface plasmonic resonance(SPR)sensors should be able to provide us with broad prospects in various applications.

关键词： local surface plasmonic resonance electron beam lithography sub-wavelength ultra-high sensors

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PIR-DSP: An FPGA DSP Block Architecture for Multi-precision Deep Neural Networks

PIR-DSP: An FPGA DSP Block Architecture for Multi-precision ...

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Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： SeyedRamin Rasoulinezhad Hao Zhou Lingli Wang Philip H.W. Leong School of Electrical and Information Engineering The University of Sydney Australia State Key Lab of ASIC and System Fudan University Shanghai China

Quantisation is a key optimisation strategy to improve the performance of floating-point deep neural network (DNN) accelerators. Digital signal processing (DSP) blocks on field-programmable gate arrays are not efficiently utilised when the accelerator precision is much lower than the DSP precision. Through three modifications to Xilinx DSP48E2 DSP blocks, we address this issue for important computations in embedded DNN accelerators, namely the standard, depth-wise, and pointwise convolutional layers. First, we propose a flexible precision, run-time decomposable multiplier architecture for CNN implementations. Second, we propose a significant upgrade to DSPDSP interconnect, providing a semi-2D low precision chaining capability which supports our low-precision multiplier. Finally, we improve data reuse via a register file which can also be configured as FIFO. Compared with the 27 × 18-bit mode in the Xilinx DSP48E2, our Precision, Interconnect, and Reuseoptimised DSP (PIR-DSP) offers a 6× improvement in multiplyaccumulate operations per DSP in the 9 × 9-bit case, 12× for 4 × 4 bits, and 24× for 2 × 2 bits. We estimate that PIR-DSP decreases the run time energy to 31/19/13% of the original value in a 9/4/2-bit MobileNet-v2 DNN implementation.

关键词： Computer architecture Field programmable gate arrays Standards Convolution Integrated circuit interconnections Digital signal processing Neural networks

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Joint estimation for Carrier Frequency Offset and Sampling Frequency Offset in OFDM systems

Joint estimation for Carrier Frequency Offset and Sampling F...

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International Conference on Solid-state and Integrated Circuit Technology

作者： Jing Lin Fan Ye Junyan Ren School of Microelectronics Fudan University Shanghai CHINA State-Key Lab of ASIC and System Micro/Nan-Electronics Innovation Platform

ISBN: (纸本)9781479932849

For solving the problem of non-ideal factors introduced from the analog front-end in Orthogonal Frequency Division Multiplexing (OFDM) systems, a joint estimation method of Carrier Frequency Offset (CFO) and Sampling Frequency Offset (SFO) is proposed. This algorithm uses three consecutive preamble symbols to estimate and is robust to large I/Q imbalance. It can reduce interference of Gaussian noise by considering all the samples and taking the advantage of them. Compared to the previous methods, the simulation results show that the proposed method can provide high precision in CFO and SFO estimation, which is robust to large-scale SNR and I/Q imbalance.

关键词： OFDM Estimation Frequency estimation Joints Frequency division multiplexing Frequency conversion Robustness

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