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Overview of AMBA AHB2APB Bridge for SOC Interconnects

Overview of AMBA AHB2APB Bridge for SOC Interconnects

引用

2024 International Conference on system, Computation, Automation and Networking, ICSCAN 2024

作者： Adiya Saini, Lalit Mohan School of Vlsi and Embedded System Design National Institute of Technology Department of Electrical Engineering Haryana Kurukshetra India

ISBN: (纸本)9798331510022

The swift evolution of technology demands a highly efficient system with seamless integration of components. Evolution of system on Chip (SOC) has modified making use of different components within a single chip. Therefore, it becomes very crucial to manage these components. The Advanced Microcontroller Bus Architecture (AMBA) bus architecture, a standard SOC interconnection, enhance Intellectual Property (IP) core reusability and streamlines data transmission. Advanced High-Performance Bus (AHB) is part of AMBA family used for High-speed data transfer communication protocol manages with high bandwidth components like processor or memory. Advanced Peripheral Bus (APB) is specifically used for connecting with low bandwidth components like keyboard and mouse. Thus, the importance of AHB2APB bridge becomes very vital. It is the backbone of all data transfer that takes place within a SOC. This paper focuses on reviewing different reported studies in this field, implementing Register Transfer Level (RTL) schematic of AHB2APB bridge. © 2024 IEEE.

关键词： system-on-chip

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AMBA based AHB2APB bridge: An overview 2

AMBA based AHB2APB bridge: An overview

引用

2nd IEEE International Conference on Measurement, Instrumentation, Control and Automation, ICMICA 2023

作者： Sonal, Shashank Saini, Lalit Mohan National Institute of Technology School of Vlsi Design and Embedded System Haryana Kurukshetra India National Institute of Technology Department of Electrical Engineering Haryana Kurukshetra India

ISBN: (纸本)9798350355048

The AMBA is popularly used as an on-chip bus architecture, widely adopted as a standard for interconnections in SoC designs. Its primary aim is to enhance the reusability of Intellectual Property (IP) cores. It helps in accelerating sequential data transmission through a comprehensive collection of bus signals, posing challenges for the in-depth analysis of embedded systems based on AMBA. This study focuses on providing an overview of AHB to APB Bridge - a sophisticated interface bridge that connects the AHB with the APB. © 2024 IEEE.

关键词： Reusability

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Analysis of Serial Peripheral Interface 2

Analysis of Serial Peripheral Interface

引用

2nd IEEE International Conference on Measurement, Instrumentation, Control and Automation, ICMICA 2023

作者： Patra, Aritra Saini, Lalit Mohan National Institute of Technology School of Vlsi and Embedded System Design Haryana Kurukshetra India National Institute of Technology Department of Electrical Engineering Haryana Kurukshetra India

ISBN: (纸本)9798350355048

Serial peripheral interface, a term originally coined by Motorola in the 1980s, serves as a protocol facilitating the communication of serial synchronous data between a master device, often a microcontroller, and various peripherals. These peripherals encompass a broad range, including EEPROMs (Electrically Erasable Programmable Read-Only Memory), sensors, cards and more. Functioning as a full-duplex serial protocol, SPI (Serial peripheral interface) involves transmission and reception of synchronous serial data. This document elucidates the operational intricacies and distinctive features of the SPI Interface Protocol, focusing on a configuration with one master and one slave. In this setup, master device orchestrates communication, dictating the timing and flow of data, while slave device responds to master's commands. Understanding working principles and characteristics of SPI is paramount for its effective implementation in diverse applications. © 2024 IEEE.

关键词： Mice (computer peripherals)

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Overview of AMBA AHB2APB Bridge for SOC Interconnects

Overview of AMBA AHB2APB Bridge for SOC Interconnects

引用

IEEE International Conference on system, Computation, Automation and Networking (ICSCAN)

作者： Adiya Lalit Mohan Saini Department of Electrical Engineering School of VLSI and Embedded System Design National Institute of Technology Kurukshetra Haryana India

ISBN: (数字)9798331510022

ISBN: (纸本)9798331510039

关键词： Bridges Protocols Microcontrollers Keyboards Computer architecture Bandwidth Register transfer level Data transfer system-on-chip Standards

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A Study of AES Software Implementation for IoT systems 3

A Study of AES Software Implementation for IoT Systems

引用

3rd International Conference on Issues and Challenges in Intelligent Computing Techniques, ICICT 2022

作者： Tripathy, Amitesh Singh, Brahmjit School of Vlsi Design and Embedded System National Institute of Technology Kurukshetra India National Institute of Technology Electronics and Communication Engineering Department Kurukshetra India

ISBN: (纸本)9781665482684

The Internet of Things (IoT) is a network of physical objects. This concept enables data exchange between connected things without human intervention. However, the devices being constrained in resources in terms of computing power, memory storage, and energy sources, implementation of traditional security encryption algorithms is not suitable for these devices. It is important to develop light weight low power security solutions for IoT devices and implementations. Advanced Encryption Standard (AES) is the widely used standard encryption method and could be considered to provide security to IoT based networks. However, standard AES needs to be optimised in terms of energy savings, and reduced area for implementation. The approach of software implementation of the AES is associated with high latency. It is, therefore, important to explore the implementation of the AES on hardware in area-restricted way. In this work, we present an architecture of 8-bit data path aiming to achieve reduced area for hardware implementation. © 2022 IEEE.

关键词： Internet of things

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design, Analysis and Verification of AMBA AXI4.0

Design, Analysis and Verification of AMBA AXI4.0

引用

2025 International Conference on Visual Analytics and Data Visualization, ICVADV 2025

作者： Aashima Saini, Lalit Mohan School of Vlsi and Embedded System Design National Institute of Technology Haryana Kurukshetra India National Institute of Technology Department of Electrical Engineering Haryana Kurukshetra India

ISBN: (纸本)9798331521394

AMBA AXI was developed by ARM in 2003 upgrading it to AMBA AXI 4.0 in 2014. AMBA AXI4.0 is a fast, efficient, high frequency, high performance, high bandwidth SOC (system-on-chip) protocol that is used for communication between CPU (central processing unit) and FPGA (field programmable gate arrays). It has five communication channels for reading and writing between master and slave. It supports burst transactions and has handshake mechanism, which makes it suitable for high data transfers rate and for pipeline processing of instructions. It finds applications in various ARM (advanced RISC (reduced instruction set computer) machine) based FPGAs like Zynq-7000, Zynq Ultrascale+, Spartan 7, Arria 10 etc. This work implements the AXI4.0 protocol for communication between master and slave for 32 bits of data transfer and verification of using protocol checker. © 2025 IEEE.

关键词： Signal conditioning circuits

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Analysis & Implementation of Clock Domain Crossing Techniques Using FIFO Buffers

Analysis & Implementation of Clock Domain Crossing Technique...

引用

International Conference on Trends in Electronics and Informatics (ICEI)

作者： Shashank Sonal Lalit Mohan Saini School of VLSI Design & Embedded System National Institute of Technology Kurukshetra Haryana India Department of Electrical Engineering National Institute of Technology Kurukshetra Haryana India

ISBN: (数字)9798331544607

ISBN: (纸本)9798331544614

With the rapid advancement in integrated circuits due to scaling of transistors and efficient technology, modern day CPU are much faster than before. During on-chip communication between several components of a multicore system-on chip, a FIFO buffer can be employed which prevents the loss of data. A FIFO can also be employed at peripherals and at the clock domain crossing in entire SoC. It is mainly classified under two categories - Synchronous and Asynchronous FIFO. Generally, Synchronous FIFO is employed for synchronization of CPU or computer hardware, while Asynchronous FIFOs isolate signals from various clock domains and also buffer the data in case of variations in the data rate or latency. In this paper, some key characteristics and circuit implementation is presented for Asynchronous & Synchronous FIFO through comparative analysis which will help reader in understanding the functioning and specification for FIFO.

关键词： Integrated circuits Multicore processing Random access memory Market research Central Processing Unit system-on-chip Synchronization Transistors Informatics Clocks

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design, Analysis and Verification of AMBA AXI4.0

Design, Analysis and Verification of AMBA AXI4.0

引用

Visual Analytics and Data Visualization (ICVADV), International Conference on

作者： Aashima Lalit Mohan Saini School of VLSI and Embedded System Design National Institute of Technology Kurukshetra Haryana India Department of Electrical Engineering National Institute of Technology Kurukshetra Haryana India

ISBN: (数字)9798331521394

ISBN: (纸本)9798331521400

关键词： Reduced instruction set computing Visual analytics Communication channels Writing Data transfer Main-secondary Central Processing Unit system-on-chip Field programmable gate arrays Pipeline processing

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AMBA based AHB2APB bridge: An overview

AMBA based AHB2APB bridge: An overview

引用

Measurement, Instrumentation, Control and Automation (ICMICA), 2020 First IEEE International Conference on

ISBN: (数字)9798350355048

ISBN: (纸本)9798350355055

The AMBA is popularly used as an on-chip bus architecture, widely adopted as a standard for interconnections in SoC designs. Its primary aim is to enhance the reusability of Intellectual Property (IP) cores. It helps in accelerating sequential data transmission through a comprehensive collection of bus signals, posing challenges for the in-depth analysis of embedded systems based on AMBA. This study focuses on providing an overview of AHB to APB Bridge—a sophisticated interface bridge that connects the AHB with the APB.

关键词： Bridges embedded systems Automation Instruments Intellectual property system-on-chip Data communication Standards

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Analysis of Serial Peripheral Interface

Analysis of Serial Peripheral Interface

引用

Measurement, Instrumentation, Control and Automation (ICMICA), 2020 First IEEE International Conference on

作者： Aritra Patra Lalit Mohan Saini School of VLSI and Embedded System Design National Institute of Technology Kurukshetra Haryana India Department of Electrical Engineering National Institute of Technology Kurukshetra Haryana India

ISBN: (数字)9798350355048

ISBN: (纸本)9798350355055

关键词： Automation Microcontrollers Instruments EPROM Focusing Full-duplex system Main-secondary Timing Sensors

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