Interface is important for software modules, e.g., classes, components and services. Most current description approaches focus only on each method signatures of the target interface, while constraint on interface, e.g...
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ISBN:
(纸本)9781424459124
Interface is important for software modules, e.g., classes, components and services. Most current description approaches focus only on each method signatures of the target interface, while constraint on interface, e.g. temporal sequence of the invocation is less considered so far. This paper proposes an intuitive approach for specifying interface constraint, especially the temporal constraints on different methods of the interface. As a directed graph, the proposed approach is intuitive and powerful. Notations of relationships are introduced, followed by some examples. One algorithm that can translate the high level intuitive graph to low level FSA is presented.
In applications such as target tracking the ability to steer the radiation pattern produced by an antenna is required. This can be achieved using reconfigurable reflector antennas based on a planar array of dipole ele...
In applications such as target tracking the ability to steer the radiation pattern produced by an antenna is required. This can be achieved using reconfigurable reflector antennas based on a planar array of dipole elements immersed in a circularly polarised field. In this paper, we present a new type of reconfigurable planar reflectarray designed for operation with circularly polarised signals. The devices employ a rack and pinion arrangement fabricated using microelectromechanical system (MEMS) technology. A 16×16 array of elements has been fabricated with each dipole element located on a rotatable disc and connected to a linear rack in groups of 8 in order to facilitate ID scanning. The structure, designed for 110 GHz operation uses 1360 μm long, 100 μm wide dipole elements located with 2100 μm pitch. This paper concentrates on the main issues related to fabrication of the structure.
It has been a decade since the need of VLSI design intellectual property (IP) protection was identified. The goals of IP protection are: 1) to enable IP providers to protect their IPs against unauthorized use, 2) to p...
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It has been a decade since the need of VLSI design intellectual property (IP) protection was identified. The goals of IP protection are: 1) to enable IP providers to protect their IPs against unauthorized use, 2) to protect all types of design data used to produce and deliver IPs, 3) to detect the use of IPs, and 4) to trace the use of IPs. There are significant advances from both industry and academic towards these goals. However, do we have solutions to achieve all these goals? What are the current state-of-the-art IP protection techniques? Do they meet the protection requirement designers sought for? What are the (new) challenges and is there any feasible answer to them in the foreseeable future? This paper addresses these questions and provides possible solutions mainly from academia point of view. Several successful industry practice and ongoing efforts are also discussed briefly
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