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Comparison of Multi-Phase Power Converters and Power Delivery Networks for Next-Generation Space Architectures

Comparison of Multi-Phase Power Converters and Power Deliver...

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IEEE Conference on Aerospace

作者： Nicholas Franconi Thomas Cook Christopher Wilson Alan D. George NASA Goddard Space Flight Center Science Data Processing Branch Code 587 Software Engineering Division Department of Electrical and Computer Engineering NSF Center for Space High-Performance and Resilient Computing (SHREC) University of Pittsburgh

Next-generation spacecraft developers are earnestly investigating the application of artificial intelligence (AI) algorithms onboard to enable new mission concepts for space exploration and science. However, the current generation of radiation-hardened processors are inferior compared to commercial-off-the-shelf alternatives in terms of the computational performance required by modern AI applications. To address this disparity, space-system designers have started employing novel radiation-tolerant architectures combining both commercial and radiation-hardened components to mitigate radiation effects at a system level. Unfortunately, developing single-board computers with radiation-tolerant, high-performance processors is challenging because designers must balance the sparce selection of radiation-hardened power converters and high-reliability decoupling capacitors with SmallSat/CubeSat area constraints and limited thermal conduction. Consequently, the next-generation of space processors, including the AMD-Xilinx Versal Adaptive Compute Acceleration Platform require demanding power solutions capable of supplying core rails with 0.8V ± 18mV and currents up to 150 A. In this paper, we present a multifaceted analysis of the power system and decoupling network for a future Versal-based design. We developed preliminary power estimates based on expected processor and FPGA resource utilization for common AI processing applications. These estimates drive the power system requirements and a comparative analysis of single-phase integrated converters and multi-phase discrete converters for high-current FPGA supplies. We develop a tradespace between the number of phases, input voltage, load current, switching frequency, power efficiency, and printed circuit board area. Finally, we design and simulate four power delivery networks based on commercial, high-reliability, and flight-qualified capacitors to compare the efficacy of 0201 decoupling capacitors in flight missions.

关键词： Rails Program processors Capacitors Voltage Power systems Resource management Artificial intelligence

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SpaceCube GHOST: A Resilient Processor for Low-Power, High-Reliability Space Computing

SpaceCube GHOST: A Resilient Processor for Low-Power, High-R...

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IEEE Conference on Aerospace

作者： Noah Perryman Nicholas Franconi Gary Crum Christopher Wilson Alan D. George Department of Electrical and Computer Engineering NSF Center for Space High-Performance and Resilient Computing (SHREC) University of Pittsburgh Pittsburgh PA Science Data Processing Branch Code 587 Software Engineering Division NASA Goddard Space Flight Center Greenbelt MD

There is a direct need for high-visibility NASA missions that provide significant scientific impact or have a high mission class using completely radiation-hardened (rad-hard) electronics solutions, to enable artificial intelligence (AI) applications in harsh environments despite severe size, weight, and power (SWaP) constraints. For these missions, where current state-of-the-art solutions are too power-demanding or are incapable of surviving the intended radiation environment, an alternative rad-hard processing architecture that can leverage the control-flow capabilities of scalar processors while also incorporating the hardware-acceleration capabilities of an FPGA is of significant value. Therefore, in this research, we propose a miniaturized (3.5 in. × 3.5 in. form factor) processor card featuring the GR740 quad-core rad-hard processor and the CertusPro-NX-RT radiation-tolerant FPGA, called the SpaceCube GR740 Host for Onboard science and Telemetry (GHOST) architecture. The card will be designed to conform to the NASA Goddard Space Flight Center (GSFC) CubeSat Card Specification (CS2), which provides a common template to build new 1U CubeSat-sized cards compatible with a variety of other avionics designs. The GR740 features a fault-tolerant quad- processor LEON4FT SPARC V8 integer unit with a 7-stage pipeline and 4×4 KiB instruction and data caches. To extend the capabilities of the GR740, the CertusPro-NX-RT, a low-power radiation-tolerant FPGA, was combined to create a hybrid system architecture, providing the benefits of a programmable logic fabric. The GHOST architecture supports high-reliability, general-purpose processing and system monitoring via the GR740 while simultaneously increasing the AI-based application performance via a combination of the GR740 and CertusPro-NX-RT.

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Adaptively Lossy Image Compression for Onboard processing

Adaptively Lossy Image Compression for Onboard Processing

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IEEE Aerospace Conference

作者： Justin Goodwill David Wilson Sebastian Sabogal Alan D. George Christopher Wilson NSF Center for Space High-Performance and Resilient Computing (SHREC) University of Pittsburgh 4420 Bayard St Suite 560 Pittsburgh PA Software Engineering Division NASA Goddard Space Flight Center Science Data Processing Branch Code 587 8800 Greenbelt Rd Greenbelt MD

ISBN: (数字)9781728127347

ISBN: (纸本)9781728127354

More efficient image-compression codecs are an emerging requirement for spacecraft because increasingly complex, onboard image sensors can rapidly saturate downlink bandwidth of communication transceivers. While these codecs reduce transmitted data volume, many are compute-intensive and require rapid processing to sustain sensor data rates. Emerging next-generation small satellite (SmallSat) computers provide compelling computational capability to enable more onboard processing and compression than previously considered. For this research, we apply two compression algorithms for deployment on modern flight hardware: (1) end-to-end, neural-network-based, image compression (CNN-JPEG);and (2) adaptive image compression through feature-point detection (FPD-JPEG). These algorithms rely on intelligent data-processing pipelines that adapt to sensor data to compress it more effectively, ensuring efficient use of limited downlink bandwidths. The first algorithm, CNN-JPEG, employs a hybrid approach adapted from literature combining convolutional neural networks (CNNs) and JPEG;however, we modify and tune the training scheme for satellite imagery to account for observed training instabilities. This hybrid CNN-JPEG approach shows 23.5% better average peak signal-to-noise ratio (PSNR) and 33.5% better average structural similarity index (SSIM) versus standard JPEG on a dataset collected on the Space Test Program - Houston 5 (STP-H5-CSP) mission onboard the International Space Station (ISS). For our second algorithm, we developed a novel adaptive image-compression pipeline based upon JPEG that leverages the Oriented FAST and Rotated BRIEF (ORB) feature-point detection algorithm to adaptively tune the compression ratio to allow for a tradeoff between PSNR/SSIM and combined file size over a batch of STP-H5-CSP images. We achieve a less than 1% drop in average PSNR and SSIM while reducing the combined file size by 29.6% compared to JPEG using a static quality factor (QF) of 90.

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