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International Conference on (ICEPT) electronic Packaging technology

作者： Jiang Xia GuoYuan Li Bin Zhou School of Electronic and Information Engineering South China University of Technology Guangzhou China Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory Guangzhou China

ISBN: (纸本)9781509013975

The board level vibration reliability of the Package-on-Package (PoP) structure with different underfill types was investigated by finite element method (FEM). Underfill methods used in this study were the full-filled method, the corer-bonded method and the edge-bonded method. Results show that all of them can obviously improve the reliability of PoP structure in random vibration environment. The stress level of the solder joint significantly decreases by the application of underfill materials in the bottom package body of PoP structure. In addition, the location of critical solder joint is different with different underfill types.

关键词： reliability Lead Vibrations Loading Compounds Substrates

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A low power and low phase noise PLL frequency synthesizer for Ka-band application in 65 nm process

A low power and low phase noise PLL frequency synthesizer fo...

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IEEE International Nanoelectronics Conference (INEC)

作者： Mingyuan Sun Ning Ning Qi Yu Zhengyu Shi State Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of China Chengdu China Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory Guangzhou China

This paper presents a fully integrated phase-locked loop (PLL) frequency synthesizer for Ka-band wireless communication application in standard 65nm CMOS process. Post-layout simulation shows that the voltage controlled oscillator (VCO) achieves a phase noise of -105dBc/Hz@1MHz offset with a tuning range of over 17%, and the PLL synthesizer provides output frequencies from 25.5 GHz to 30.3 GHz thanks to the self-biased buffer. Moreover, benefiting from the combination of current-mode-logic (CML) dividers and voltage-mode-logic (VML) dividers, the PLL consumes a total power dissipation of only 33.6mW with a single 1.2 V supply including all the buffers. And the PLL occupies an area of 0.86 mm × 0.65 mm with all the testing pads.

关键词： Phase locked loops Voltage-controlled oscillators Phase noise Tuning Wireless communication Power demand Frequency synthesizers

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Azimuthal dependence of single-event and multiple-bit upsets in SRAM devices with anisotropic layout

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Nuclear science and Techniques 2015年第5期26卷 69-75页

作者：张战刚刘杰侯明东孙友梅苏弘古松耿超姚会军罗捷段敬来莫丹习凯恩云飞 Institute of Modern Physics Chinese Academy of Sciences University of Chinese Academy of Sciences Science and Technology on Reliability Physics and Application of Electronic Component Laboratory China Electronic Product Reliability and Environmental Testing Research Institute

Experimental evidence is presented showing obvious azimuthal dependence of single event upsets(SEU) and multiple-bit upset(MBU) patterns in radiation hardened by design(RHBD) and MBU-sensitive static random access memories(SRAMs), due to the anisotropic device layouts. Depending on the test devices, a discrepancy from 24.5% to 50% in the SEU cross sections of dual interlock cell(DICE) SRAMs is shown between two perpendicular ion azimuths under the same tilt angle. Significant angular dependence of the SEU data in this kind of design is also observed, which does not fit the inverse-cosine law in the effective LET method. Ion trajectory-oriented MBU patterns are identified, which is also affected by the topological distribution of sensitive volumes. Due to that the sensitive volumes are periodically isolated by the BL/BLB contacts along the Y-axis direction, double-bit upsets along the X-axis become the predominant configuration under normal *** triple-bit upset and quadruple-bit upset patterns are the same under different ion azimuths(Lshaped and square-shaped configurations, respectively). Those results suggest that traditional RPP/IRPP model should be promoted to consider the azimuthal and angular dependence of single event effects in certain *** earth-based evaluation of SEE sensitivity, worst case beam direction, i.e., the worst case response, should be revealed to avoid underestimation of the on-orbit error rate.

关键词： SRAM 各向异性方位角单事件翻转静态随机存取存储器器件设计模式

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Advanced fault isolation techniques for 3D packaging

Advanced fault isolation techniques for 3D packaging

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International Symposium on Physical & Failure Analysis of Integrated Circuits

作者： Y. Chen P. Lai Q. Shi Science and Technology on Reliability Physics and Application of Electronic Component Laboratory The Fifth Electronics Research Institute of Ministry of Industry and Information Technology Guangzhou Guangdong P.R. China

ISBN: (纸本)9781467382601

3D packaging has become a popular technology along with the tendency of functionality and portability for electronic devices. Conventional fault isolation techniques face a great challenge for 3D packaging devices. 3D X-Ray laminography technique can capture three-dimensional information about the internal structure of an object. Magnetic current imaging technique is a non-destructive failure isolation technique at package levels. This paper introduces these two kinds of useful fault isolation techniques for 3D packaging. And case studies demonstrated the effectiveness of the advanced fault isolation techniques for 3D packaging.

关键词： Failure analysis Integrated circuits Decision support systems

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PoP assembly reliability test and assessment under random vibration loading

PoP assembly reliability test and assessment under random vi...

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International Conference on (ICEPT) electronic Packaging technology

作者： Jiang Xia GuoYuan Li Bin Zhou LanXian Cheng School of Electronic and Information Engineering South China University of Technology Guangzhou China Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory Guangzhou School of Electronic Engineering South China Agricultural University Guangzhou China

ISBN: (纸本)9781509013975

This paper investigates the reliability of the Package-on-Package (PoP) under random vibration loading by experimental tests and FEM simulations. An event detector was used to monitor the PoP failure times under random vibration. A finite element model of the PoP assembly model was built in ANSYS, and the natural frequencies and modes were calculated and verified by experimental model test. The results showed that the bottom package soon failed under random vibration loading, and the top package failed after a long period of time, the reliability of top package is better than the bottom package under vibration loading. The dye-pry and cross-section tests indicated that the outermost corner bottom solder joint is the critical solder joint for the PoP. Over 80% of the failed solder joints of the bottom package fractured on the component side, brittle failure (IMC crack) and ductile failure (bulk crack) were discovered under vibration loading. The stress characteristics of PoP solder joints obtained from FEM simulations are consistent with the experimental results.

关键词： reliability Substrates Monitoring Load modeling Vibrations Soldering Detectors

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Source of Low Frequency Noise in SiGe HBTs

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Journal of Donghua University(English Edition) 2015年第6期32卷 1052-1054页

作者：王凯刘远邓婉玲 School of Information Science and Technology Jinan University Science and Technology on Reliability Physics and Application of Electronic Component Laboratory CEPREI

The performance of low frequency noise(LFN)in SiGe heterojunction bipolar transistors(HBTs)is *** experimental results indicate that the performance of LFN in SiGe HBTs agrees with classical LFN *** on classical LFN theory,the source of LFN in SiGe HBTs is confirmed from Hooge modal and McWhorter model ***,according to this results,the base current coefficient α is extracted and the relationship between current noise power spectral density and base current is also shown.

关键词： SiGe heterojunction bipolar transistors(HBTs) low frequency noise

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Temperature-Dependent Drain Current Characteristics and Low Frequency Noises in Indium Zinc Oxide Thin Fihn Transistors

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Chinese physics Letters 2015年第8期32卷 208-211页

作者：刘远吴为敬强蕾王磊恩云飞李斌 Science and Technology on Reliability Physics and Application of Electronic Component Laboratory China Electronic Produce Reliability and Environmental Testing Research Institute Guangzhou 510610 State Key Laboratory of Luminescent Materials and Devices South China University of Technology Guangzhou 510640 School of Electronic and Information Engineering South China University of Technology Guangzhou 510640

The I-V characteristics and low frequency noises for indium zinc oxide thin film transistor are measured between 250 K and 430 K. The experimental results show that drain currents are thermally activated following the Meyer Neldel rule, which can be explained by the multiple-trapping process. Moreover, the field effect electron mobility firstly increases, and then decreases with the increase of temperature, while the threshold voltage decreases with increasing the temperature. The activation energy and the density of localized gap states are extracted. A noticeable increase in the density of localized states is observed at the higher temperatures.

关键词： TFT Temperature-Dependent Drain Current Characteristics and Low Frequency Noises in Indium Zinc Oxide Thin Fihn Transistors

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Low frequency noise and radiation response in the partially depleted SOI MOSFETs with ion implanted buried oxide

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Chinese physics B 2015年第8期24卷 613-618页

作者：刘远陈海波刘玉荣王信恩云飞李斌陆裕东 Science and Technology on Reliability Physics and Application of Electronic Component Laboratory CEPREI No. 58th Research Institute of China Electronics Technology Group Corporation School of Electronic and Information Engineering South China University of Technology Xinjiang Technical Institute of Physics & Chemistry Chinese Academy of Sciences

Low frequency noise behaviors of partially depleted silicon-on-insulator(PDSOI) n-channel metal-oxide semiconductors(MOS) transistors with and without ion implantation into the buried oxide are investigated in this paper. Owing to ion implantation-induced electron traps in the buried oxide and back interface states, back gate threshold voltage increases from44.48 V to 51.47 V and sub-threshold swing increases from 2.47 V/dec to 3.37 V/dec, while electron field effect mobility decreases from 475.44 cm2/V·s to 363.65 cm2/V·s. In addition, the magnitude of normalized low frequency noise also greatly increases, which indicates that the intrinsic electronic performances are degenerated after ion implantation processing. According to carrier number fluctuation theory, the extracted flat-band voltage noise power spectral densities in the PDSOI devices with and without ion implantation are equal to 7×10-10V2·Hz-1and 2.7×10-8V2·Hz-1, respectively, while the extracted average trap density in the buried oxide increases from 1.42×1017cm-3·e V-1to 6.16×1018cm-3·e V-1. Based on carrier mobility fluctuation theory, the extracted average Hooge’s parameter in these devices increases from 3.92×10-5to 1.34×10-2after ion implantation processing. Finally, radiation responses in the PDSOI devices are investigated. Owing to radiation-induced positive buried oxide trapped charges, back gate threshold voltage decreases with the increase of the total dose. After radiation reaches up to a total dose of 1 M·rad(si), the shifts of back gate threshold voltage in the SOI devices with and without ion implantation are-10.82 V and-31.84 V, respectively. The low frequency noise behaviors in these devices before and after radiation are also compared and discussed.

关键词： silicon on insulator ion implantation ionizing radiation low frequency noise

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Thermal analysis and reliability evaluation on high power Flip chip LED

Thermal analysis and reliability evaluation on high power Fl...

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第十二届中国国际半导体照明论坛

作者： LU Guo-guang HAO Ming-ming Lai Can-xiong Yao Bin The Fifth Research Institute of MIIT P.R.ChinaScience and Technology on Reliability Physics and Application of Electronic Component Laboratory

ISBN: (纸本)9781509001767

We showed a detailed thermal simulation of a high power flip-chip packaged LED, simulation results show that the junction temperature of the LED is more sensitive to the adhesive layer material between the Si substrate and the1000μm thick Cu heatsink, and less sensitive to the bonding ball material and the heatsink material. Otherwise, three groups of aging tests were conducted on high power flip chip LEDs, according to the linear regression analysis, the extrapolated lifetime of the high power flip chip LEDs at 25 ℃ is 37718 hours, we also obtain an acceleration factor 70.5 of resulting in a thermal activation energy of Ea=0.35 e V using Arrhenius function.

关键词： high power flip-chip LED,thermal simulation,reliability,aging

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Fracture failure analysis of Fiber Reinforced Composites T-joints

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IOP Conference Series: Materials science and Engineering 2017年第1期207卷

作者： Wei Su De-zhi Kong Ren-huai Liu Shi-qing Huang Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory China Electronic Product Reliability and Environmental Testing Research Institute Guangzhou China MOE Key Lab of Disaster Forecast and Control in Engineering Jinan University Guangzhou China Department of Mechanics and Civil Engineering Jinan University Guangzhou China

This paper discusses staple FRP T-joints on the project based on the classical beam theory of Euler-Bernoulli and a theoretical model of energy release rate is set up to discuss fracture propagation of composite T-joints. The paper is further analysis on fracture failure affected by composite pane depth and joints chamfer dimension parameters and so on. The conclusion benefit for extensive use of projects is also summarized.

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