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Effect of Fixation Method on Solder Joint Vibration Fatigue reliability of High Density PCB Assembly

Effect of Fixation Method on Solder Joint Vibration Fatigue ...

2011 12th International Conference on electronic Packaging technology & High Density Packaging(2011 电子封装技术与高密度封装国际会议)

作者： Xueli QI Yunfei EN Bin ZHOU Guoyuan LI Pengfei Zhang School of Electronic and Information Engineering South China University of Technology Address:No.381 Science and Technology on Reliability Physics and Application of Electronic Component Laboratory CE School of Electronic and Information Engineering South China University of Technology Address:No.381

In order to explore the influence of various fixation method on vibration fatigue reliability of high density PCB assembly, a three-dimensional simulation model which was almost completely in keeping with test samples was created, and the modal parameters were obtained through modal test and finite element method respectively. Based on the verification of FEM Model correctness, through designed different fixation methods, random vibration finite element simulation was being done, and vibration parameters were picked up and analyzed. The result showed that more PCB fixations could increase the first frequency, decrease the deformation of PCB. Under the same conditions, the order of the first frequency of the PCB Assembly with different fixation methods is: one end fixation ＜two screws fixation＜two ends fixation＜four screws fixation＜six screws fixation. Consequently, more PCB fixations will decrease stress of key positions of PCB assembly, and BGA (ball grid array) devices should be placed near the region which has more fixation *** stress of solder joint is located in the outermost corner of central PBGA module, and the accurate interface of maximum stress is located on the BGA side. And stress increases with the distance between solder and the center of BGA. So, the dimensional structure of PBGA assembly, fixation method of PCB and chip position should be considered comprehensively when vibration reliability of PBGA assembly was analysized. Finally, it can make some references for guiding BGA placement, selecting the appropriate size of BGA and the best fixation method for predicting and optimizing random vibration fatigue life of solder joints.

关键词： Vibrations Stress Soldering Analytical models Fatigue Fasteners

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The Popcorn Effect of Lead and Lead-free Mixed Assembly Process In High Density Plastic Packages

The Popcorn Effect of Lead and Lead-free Mixed Assembly Proc...

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2011 International Symposium on Advanced Packaging Materials(2011年先进电子封装材料国际会议APM)

作者： Xiao Hong Ping Lai Science and Technology on Reliability Physics and Application of Electronic Component Laboratory The 5th Electronics Research Institute of the Ministry of Industry and Information Technology No. 110 Dongguanzhuang Rd Guangzhou Guangdong PR. China

The expansion of integrated circuit applications is driving chip costs down. To respond to the lower price the lower price expectations, manufacturers bring Plastic packages which is cost less expensive packaging solutions. Today although the electronic packaging industry there are still many enterprises were to have lead solder, but this does not preclude the "lead-free" has become the main topic of electronic materials and microelectronics. In this transitional period, lead and lead-free both assemble on the plastic package in the field of application is already unavoidable. Problem existed in lead or leadfree materials, technology, equipment, system compatibility and other issues. The reliability of the plastic package IC is becoming a key concern. The popcorn effect is caused when moisture inside a plastic package turns to steam and expands rapidly during infrared and vapor phase reflow solder process. Under certain conditions, the force from the expanding moisture can cause stresses inside the package. Solder ball inside with lead process and outside with lead-free may result in failure. It is prompted by the melting point of lead and lead-free material is different in the same BGA packaging chip. In most severe cases, the packaging defects and the stress may result in external package cracks. And in this paper, a sample is given that the BGA packaging chip exist void in the die/die attach interface. Capillary phenomenon is present in the package closest to the die attach, and lead to a short circuit between some pins. Pay more attention to the reliability of mixed assembly process is of great value.

关键词： Lead Plastics Delamination reliability Packaging Compounds

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The Accelerated Life Experiment Study of Solid State Relay

The Accelerated Life Experiment Study of Solid State Relay

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2011 International Conference on Quality,reliability,Risk,Maintenance,and Safety Engineering(2011年质量、可靠性、风险、维修性与安全性国际会议暨第二届维修工程国际学术会议 ICQR2MSE 2011)

作者： Xiaowen ZHANG Hudong ZHANG National Key Laboratory of Science and Technology on Reliability Physics and Application of Electron Institute of Microelectronics School of Electronic and Information EngineeringSouth China University

The operational principle of SSR(Solid State Relay) has been analyzed, and the methods of acceleration life experiments of SSR has been designed. The acceleration life experiment has been conducted under the condition of 125 degree centigrade junction temperature. According to the 0 number device failure in the acceleration life experiment, using unilateral approximate, the lower limit value of MTBF has been calculated under the condition of 90 percent confidence level. If the typical value of 0.7eV active energy for the SSR degradation is choosed in the accelerated life experiment, then the lower limit value of MTBF can be calculated under the condition of 85 degree centigrade junction temperature.

关键词： Solid State Relay reliability failure mechanism acceleration life experiments

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A Study of junction temperature testing method in GaAs PHEMT

A Study of junction temperature testing method in GaAs PHEMT

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2011 International Symposium on Advanced Packaging Materials(2011年先进电子封装材料国际会议APM)

作者： Xiao Hong Yun Huang Shajin Li Science and Technology on Reliability Physics and Application of Electronic Component Laboratory The 5th Electronics Research Institute of the Ministry of Industry and Information Technology No.110 Dongguanzhuang Rd Guangzhou Guangdong P.R. China

With the development of the RF/microwave technology, more and more GaAs PHEMT device is used and the power of the device is also increasing. However, the test of thermal performance and heat dissipation in packaging device is still a prominent problem. In order to obtain steady operation and longer lifetime, what is the highest temperature environment the device can work? Also the package of the device is a major factor of cooling effect, so the measurement of thermal resistance must be accurate. In this paper, some methods was given to measuring of device junction temperature. Traditional test method such as infrared thermography is not work for the packaging device. A new method to measure the thermal resistance of GaAs PHEMT is given. Based on the electrical measurement method for thermal resistance and Schottky junction temperature of GaAs PHEMT and the factors which influence measuring results are investigated. In the meantime we design the setup of the test system for the measuring. The first is drawing the curve of forward voltage changes and temperature. Then the thermal resistance is measured and calculated. The error introduced by thermal resistance of GaAs PHEMT surface is eliminated. The experimental results show that the method has the advantages of simple structure and good stability. The proposed method is capable to evaluate the thermal resistance of the packaging device such as GaN device, VDMOS and so on. It is very significant to provide evaluation method in reliability test.

关键词： Temperature measurement Junctions Thermal resistance Gallium arsenide PHEMTs Electrical resistance measurement

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Effects of Thick Al Wires Bonding Layout on reliability of Power Devices

Effects of Thick Al Wires Bonding Layout on Reliability of P...

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作者： Hailong LIU Shaohua YANG Wulei TANG Gangtao ZHENG School of Electronic and Information Engineering South China University of Technology Science and Te Science and Technology Laboratory on Reliability Physics and Application of Electronic Component Gua Guangdong Soft-Park Co. Ltd Guangzhou China School of Electronic and Information Engineering South China University of Technology Guangzhou Chi

The maximum avalanche energy that the power MOSFET devices can sustain is primarily determined by the device design and manufacturing process. However, the layout of the thick Al wires on the source pad of the chip also has some influences on it. In this research, two different MOSFETs (400V/5.5A;75V/75A) were chosen and two or three Al wires were bonded with different layouts to investigate the influence of the configuration of thick Al wires bonding on the avalanche reliability of the power devices. The maximum single pulse avalanche energy (EAS) was employed to evaluate the devices’ avalanche reliability. The avalanche test results revealed that the wires’ layout has no obvious influence on the EAS for the low current MOSFET devices, while has significant influence on that for high current MOSFET devices. The more closely the Al wires distributed, the lower the EAS was obtained. Results also reveal that when devices suffer the maximum EAS, its average junction temperature (TJ) would be lower if the wires have a closer distribution. The avalanche breakdown spot tends to locate at the position around the Al wire, especially the area under the bonding. These results show that the Al wires on source electrode pad of the MOSFET should be distributed as uniformly as possible to optimize the avalanche reliability of the devices.

关键词： component power device wires bonding reliability leadframe

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The Common Failure Mechanisms of Plastic Encapsulated Devices Induced by Package Defect

The Common Failure Mechanisms of Plastic Encapsulated Device...

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2011 12th International Conference on electronic Packaging technology & High Density Packaging(2011 电子封装技术与高密度封装国际会议)

作者： Yuan Chen Ping Li Science and Technology on Reliability Physics and Application of Electronic Component Laboratory The Fifth Electronics Research Institute of Ministry of Industry and Information Technology Address: No.110 Dongguanzhuang Road Tianhe District Guangzhou Guangdong P.R.China

Plastic encapsulated devices are gaining wide acceptance due to advantages in size, weight, cost, availability, performance, and state of-the-art technology and design. However, the long-term reliability of plastic encapsulated devices is influenced by the inherent structures and materials. The paper introduced three common failure mechanisms of plastic encapsulated devices induced by package defect: interfacial delamination, poor die attachment and poor encapsulation material. The failure mechanisms were illuminated by theories combining with cases.

关键词： Delamination Plastics reliability Compounds Microassembly Lead

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Solder Joint Degradation Analysis Using Time Domain Reflectometry

Solder Joint Degradation Analysis Using Time Domain Reflecto...

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作者： Ming WAN Yudong LU Jingdong FENG Xiaohan WANG Yunfei EN Bin YAO Xin WANG College of Materials Science and Engineering South China University of Technology Guangzhou China S College of Materials Science and Engineering South China University of Technology Guangzhou China S Science and Technology on Reliability Physics and Application of Electronic Component Laboratory The Key Laboratory of Specially Functional Materials College of Materials Science and Engineering Sout

Solder joints on the Printed-Circuit board (PCB) serve as mechanical and electrical connections. Their function maybe simple, but the reliability of the solder joints may affect the entire device or system. They are usually the weak links when the electronic products are exposed to a variety of load conditions from their operation and storage, such as temperature cycling, vibration, shock and humidity. One of the most important parameters of solder joints is electrical stability. The resistance or impedance will rise as the fracture spreads through the solder joints. The reliability of solder joints is often determined through continuous DC resistance measurement, but it not very sensitive. In recent years, Time Domain Reflectometry (TDR) technique has been found to be a better alternative that are required for monitoring the degradation of interconnects. At high frequencies, signal propagation is concentrated at the surface of interconnects, a phenomenon known as the skin effect. Degradation of interconnects, such as cracking of solder joints due to fatigue or shock loading, also usually initiates at the surface and propagates inward. Therefore, even a small crack at the surface of a solder joint may change RF impedance. A physical crack initiated at the surface of the solder joints results in the increase of RF impedance. Thus, the crack length should be correlative with RF impedance or Reflection Coefficient, and the failure time of the solder joint could be estimated in view of electronic theory and the theory of fracture. A mathematic model was proposed to predict the relationship between the time domain reflection coefficient of solder joint and the crack length in it.

关键词： Solder joint reliability Time domain reflect degradation

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Multiple bit upsets mitigation in memory by using improved hamming codes and parity codes

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Journal of Harbin Institute of technology(New Series) 2010年第5期17卷 726-730页

作者：祝名肖立伊田欢 Microelectronics Center Harbin Institute of Technology National Key Laboratory of Science and Technology on Reliability Physics and Application Technology of Electrical Component

This paper combines improved Hamming codes and parity codes to assure the reliability of memory in presence of multiple bit upsets with low cost *** redundancy bits of improved Hamming codes will be appended at the end of data bits,which eliminates the overhead of interspersing the redundancy bits at the encoder and *** reliability of memory is further enhanced by the layout architecture of redundancy bits and data *** proposed scheme has been implemented in Verilog and synthesized using the Synopsys *** results reveal that the proposed method has about 19% less area penalties and 13% less power consumption comparing with the current two-dimensional error codes,and its latency of encoder and decoder is 63% less than that of Hamming codes.

关键词： memory multiple bit upsets improved hamming codes two-dimensional error codes

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Main failure mechanism and preventive measures of plastic encapsulated MMIC

Main failure mechanism and preventive measures of plastic en...

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URSI International Symposium on Signals, Systems, and electronics (ISSSE)

作者： Li, Ping Chen, Yuan Science and Technology on Reliability Physics and Application of Electronic Component Laboratory Fifth Research Institute of MIIT Dong Guang Zhuang Road Number 110 Tian He District Guang Zhou China

According to collection and analysis of plastic encapsulated MMIC failure cases these years, the main failure mechanisms proportion was calculated statistically. And corresponding preventive measures against failure w... 详细信息

ISBN: (纸本)9781424463558

关键词： Failure (mechanical)

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Publisher’s Note: “application of electron backscatter diffraction to the study on orientation distribution of intermetallic compounds at heterogeneous interfaces (Sn/Ag and Sn/Cu)” [J. Appl. Phys. 108, 103518 (2010)]

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Journal of Applied physics 2011年第2期109卷

作者： H. F. Zou Z. F. Zhang 1Shenyang National Laboratory for Materials Science Institute of Metal Research Chinese Academy of Sciences Shenyang 110016 People’s Republic of China 2Science and Technology on Reliability Physics and Application of Electronic Component Laboratory Guangzhou 51060 Guangdong People’s Republic of China

This article was originally published online on 23 November 2010 with an incorrect affiliation designation for Z. F. Zhang. Z. F. Zhang was linked to “science a

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