In this work,we demonstrate the technology of wafer-scale transistor-level heterogeneous integration of Ga As pseudomorphic high electron mobility transistors（p HEMTs） and Si complementary metal–oxide semiconductor...
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In this work,we demonstrate the technology of wafer-scale transistor-level heterogeneous integration of Ga As pseudomorphic high electron mobility transistors（p HEMTs） and Si complementary metal–oxide semiconductor（CMOS） on the same Silicon *** As p HEMTs are vertical stacked at the top of the Si CMOS wafer using a wafer bonding technique,and the best alignment accuracy of 5 μm is *** a circuit example,a wide band Ga As digital controlled switch is fabricated,which features the technologies of a digital control circuit in Si CMOS and a switch circuit in Ga As p HEMT,15% smaller than the area of normal Ga As and Si CMOS circuits.
In this paper, an ultra-high-speed ultra-wide-bandwidth one-bit analog-to-digital converter (ADC) is implemented. The chip uses a latched high-sensitivity comparator to achieve one-bit quantization, and an integrated ...
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A 320–356GHz fixed-tuned frequency doubler is realized with discrete Schottky diodes mounted on 50μm thick quartz substrate. Influence of circuit channel width and thermal dissipation of the diode junctions are disc...
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A 320–356GHz fixed-tuned frequency doubler is realized with discrete Schottky diodes mounted on 50μm thick quartz substrate. Influence of circuit channel width and thermal dissipation of the diode junctions are discussed for high multiplying efficiency. The doubler circuit is flip-chip mounted on gold electroplated oxygenfree copper film for grounding of RF and DC signals, and better thermal transportation. The whole multiplying circuit is optimized and established in Computer simulation technology(CST) suite. The highest measured multiplying efficiency is 8.0% and its output power is 5.4mW at 328 GHz. The measured typical output power is 4.0mW in 320–356GHz.
Two-dimensional (2D) semiconductors are widely recognized as attractive channel materials for low-power electronics. However, an unresolved challenge is the integration of high-quality, ultrathin high-κ dielectrics t...
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Design and characterization of a G-band（140–220 GHz） terahertz monolithicintegrated circuit（TMIC） amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm In Ga As/In P double heteroju...
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Design and characterization of a G-band（140–220 GHz） terahertz monolithicintegrated circuit（TMIC） amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm In Ga As/In P double heterojunction bipolar transistor（DHBT）. An inverted microstrip line is implemented to avoid a parasitic mode between the ground plane and the In P substrate. The on-wafer measurement results show that peak gains are 20 dB at 140 GHz and more than 15-dB gain at 140–190 GHz respectively. The saturation output powers are-2.688 dBm at 210 GHz and-2.88 dBm at 220 GHz,respectively. It is the first report on an amplifier operating at the G-band based on 0.5-μm InP DHBT technology. Compared with the hybrid integrated circuit of vacuum electronic devices, the monolithicintegrated circuit has the advantage of reliability and consistency. This TMIC demonstrates the feasibility of the 0.5-μm InGaAs/InP DHBT amplifier in G-band frequencies applications.
Ga- and N-polar AlGaN/GaN HEMTs were designed and epitaxially grown on Si- and C-face SiC substrates by MOCVD. The Capacitance-voltage characteristics of the two structures were investigated by C-V profile and drift-d...
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Ku-band GaN power transistor with output power over 100 W under the pulsed operation mode is pre- sented. A high temperature A1N nucleation together with an Fe doped GaN buffer was introduced for the developed GaN HEM...
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Ku-band GaN power transistor with output power over 100 W under the pulsed operation mode is pre- sented. A high temperature A1N nucleation together with an Fe doped GaN buffer was introduced for the developed GaN HEMT. The A1GaN/GaN hetero-structure deposited on 3 inch SiC substrate exhibited a 2DEG hall mobility and density of -2100 cm2/（V.s） and 1.0 x 10^13 cm-2, respectively, at room temperature. Dual field plates were introduced to the designed 0.25μm GaN HEMT and the source connected field plate was optimized for minimizing the peak field plate near the drain side of the gate, while maintaining excellent power gain performance for Ku-band application. The load-pull measurement at 14 GHz showed a power density of 5.2 W/mm for the fabricated 400 μm gate periphery GaN HEMT operated at a drain bias of 28 V. A Ku-band internally matched GaN power transistor was developed with two 10.8 mm gate periphery GaN HEMT chips combined. The GaN power transistor exhibited an output power of 102 W at 13.3 GHz and 32 V operating voltage under pulsed operation mode with a pulse width of 100 μs and duty cycle of 10%. The associated power gain and power added efficiency were 9.2 dB and 48%, respectively. To the best of the authors＇ knowledge, the PAE is the highest for Ku-band GaN power transistor with over 100 W output power.
Due to the thickness of current interposer must be very small, the thickness of active and passive wafers are no more than 200um, even less than 100um, sometime even less than 50um, So handing the thin wafer is the ke...
Due to the thickness of current interposer must be very small, the thickness of active and passive wafers are no more than 200um, even less than 100um, sometime even less than 50um, So handing the thin wafer is the key problem for 3D stack, in this paper designed and experimented the temporary bonding for 3D stack and substrate thinning, analyzed the result of the experiment, and the foundation for the 3D integration technology in the future.
In this paper 3D interconnects technologies used Cu pillars are discussed with respect to RF microsystem. While 2.5D Si interposer and 3D packaging seem to rely to cu pillars for the coming years, RF microsystem used ...
In this paper 3D interconnects technologies used Cu pillars are discussed with respect to RF microsystem. While 2.5D Si interposer and 3D packaging seem to rely to cu pillars for the coming years, RF microsystem used the heterogeneous chip such as GaAs integration with Si interposers should be at low temperature. The pillars were constituted by Cu (2 micron) -Ni (2 micron) -Cu (3 micron) -Sn (1 micron) multilayer metal and total height is 8 micron on the front-side of the wafer by using electroplating. The wafer backside Cu pillar is obtained by temporary bonding, thinning and silicon surface etching. The RF interposers are stacked by Cu-Sn eutectic bonding at 260 °C. Analyzed the reliability of different pillar bonding structure.
We have studied the effect of various ammonia (NH3) flow rates on AlGaN film grown on GaN using c-plane sapphire as substrate by metal organic chemical vapour deposition. The influences of NH3 flow on the species diff...
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