High voltage 4H-SiC Ti schottky Junction Barrier Schottky (JBS) diode with breakdown voltage of 2500 V and forward current of 2 A has been fabricated. A low reverse leakage current below 1.13 × 10-4 A/cm2 at the ...
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An InGaAs/InP DHBT with InGaAsP composite collector is designed and fabricated using triple mesa structure and planarization technology. All processes are on 3-inch wafers. The DHBT with emitter area of 0.5×5μm2...
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Passivation of InGaAs/InP double heterostructure bipolar transistors (DHBTs) with room temperature SiN_x deposition was investigated. Due to reduction of surface damages during SiN_x deposition, current gain improveme...
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ISBN:
(纸本)9781467365451
Passivation of InGaAs/InP double heterostructure bipolar transistors (DHBTs) with room temperature SiN_x deposition was investigated. Due to reduction of surface damages during SiN_x deposition, current gain improvement was observed at low bias voltage region. According to our analysis, a drastic decrease of surface recombination related current component at base-emitter junction occurred after passivation, which is crucial for improving the device reliability.
A common base four-finger InGaAs/InP DHBT with 535 GHz fmax using 0.5μm emitter technology is fabricated. Multi-finger design was used to increase input current. Common base configuration was compared with common emi...
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A static divide-by-2 frequency divider based on InP/InGaAs DHBT technology is *** chip thin film resistor and capacitor were *** levels of interconnect were *** collector design and 0.5μm emitter width enable the sta...
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A static divide-by-2 frequency divider based on InP/InGaAs DHBT technology is *** chip thin film resistor and capacitor were *** levels of interconnect were *** collector design and 0.5μm emitter width enable the static frequency divider operate data frequency over 100GHz.
Passivation of InGaAs/InP double heterostructure bipolar transistors(DHBTs) with room temperature SiN deposition was investigated. Due to reduction of surface damages during SiN deposition, current gain improvement ...
详细信息
Passivation of InGaAs/InP double heterostructure bipolar transistors(DHBTs) with room temperature SiN deposition was investigated. Due to reduction of surface damages during SiN deposition, current gain improvement was observed at low bias voltage region. According to our analysis, a drastic decrease of surface recombination related current component at base-emitter junction occurred after passivation, which is crucial for improving the device reliability.
The present work describes the study and improvement of heterogeneous integration based on epitaxial layer transfer technique, which is used to separate III/V device from their substrate and transfer to the other subs...
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The present work describes the study and improvement of heterogeneous integration based on epitaxial layer transfer technique, which is used to separate III/V device from their substrate and transfer to the other substrate. Our work aims in the development of a new process for integration of GaAs device with Silicon substrate. It is based on low temperature bonding of the epitaxial layer transfer technology with bisbenzocyclobutene (BCB). Using this method, we demonstrate that GaAs pseudomorphic high electron mobility transistor (pHEMT) device on a 3 inch-diameter GaAs wafer is transferred to a Silicon substrate, and evaluate the different thickness of BCB that affect the performance of GaAs pHEMT device.
We report on the high breakdown performance of AlGaN/GaN high electron mobility transistors (HEMTs) grown on 4-inch silicon substrates. The HEMT structure including three Al-content step-graded AlGaN transition laye...
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We report on the high breakdown performance of AlGaN/GaN high electron mobility transistors (HEMTs) grown on 4-inch silicon substrates. The HEMT structure including three Al-content step-graded AlGaN transition layers has a total thickness of 2.7 μm. The HEMT with a gate width WG of 300 μm acquires a maximum off-state breakdown voltage (BV) of 550 V and a maximum drain current of 527 mA/mm at a gate voltage of 2 V. It is found that BV is improved with the increase of gate-drain distance LGD until it exceeds 8 μm and then BV is tended to saturation. While the maximum drain current drops continuously with the increase of LGD. The HEMT with a WG of 3 mm and a LGD of 8 μm obtains an off-state BV of 500 V. Its maximum leakage current is just 13 μA when the drain voltage is below 400 V. The device exhibits a maximum output current of 1 A with a maximum transconductance of 242 mS.
The design, fabrication, and electrical characteristics of the 4H-SiC JBS diode with a breakdown voltage higher than 10 kV are presented. 60 floating guard rings have been used in the fabrication. Numerical simulation...
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The design, fabrication, and electrical characteristics of the 4H-SiC JBS diode with a breakdown voltage higher than 10 kV are presented. 60 floating guard rings have been used in the fabrication. Numerical simulations have been performed to select the doping level and thickness of the drift layer and the effectiveness of the edge termination technique. The n-type epilayer is 100 μm in thickness with a doping of 6 × 10^14 cm^-3. The on-state voltage was 2.7 V at JF = 13 A/cm^2.
We present a compact, 3-stage millimeter-wave monolithic integrated circuit (MMIC) amplifier with an operating frequency of 140-165 GHz, formed by common-emitter configured 0.5 μm InP DHBTs and a multilayer thin-film...
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ISBN:
(纸本)9781467365451
We present a compact, 3-stage millimeter-wave monolithic integrated circuit (MMIC) amplifier with an operating frequency of 140-165 GHz, formed by common-emitter configured 0.5 μm InP DHBTs and a multilayer thin-film microstrip (TFM) wiring environment. The amplifier smallsignal gain exhibits >5 dB from 140 GHz-165 GHz. The peak gain is 11 dB at 140 GHz. This is the first time reported InP DHBT MMIC amplifier operating in D-band employing TFM in china. The total size of this 3-stage amplifier is only 1.04 mm×0.88 mm.
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