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International Conference on Computer Supported Cooperative Work in Design

作者： Mingyu Liu Yijie Wang Science and Technology on Parallel and Distributed Processing Laboratory College of Computer National University of Defense Technology Changsha Hunan P.R.China

ISBN: (纸本)9781728165981

Class incremental learning is widely applied in the classification scenarios as the number of classes is usually dynamically changing. However, the existing algorithms increase computational cost to implement class incremental learning in order to increase classification quality. In this paper, we propose a nested hierarchy algorithm based on OCSVM for class incremental learning, called NH-CIL. We reuse support vectors to eliminate redundant instances and catch the key ones to replace the whole model because of the generalization ability of OCSVM. When a new class arrives, NH-CIL adopts OCSVM on the new class and the old classes respectively to get the corresponding sketching supports vectors. Then NH-CIL reuses these two kinds of sketching support vectors to build a binary sub-classifier. These two steps are repeatedly nested to form a hierarchy classification model in a bottom-up manner while the number of classes increases. On the contrary, the testing phase is in a top-down manner. NH-CIL can be used as a flexible approach in the classification scenarios during the collaborative information processing. We conduct the experiments on 8 real-world benchmark datasets to compare NH-CIL with some other class incremental learning algorithms, e.g. SD-CIL, HS-CIL and OP-CIL. The experiment results show that NH-CIL averagely achieves more than 5.1%, 8.6% and 11.6% accuracy improvement and 39.8%, 24.7% and 12.6% efficiency improvement over SD-CIL, HS-CIL and OP-CIL, respectively.

关键词： Machine learning algorithms Computational modeling Heuristic algorithms Conferences Support vector machine classification Information processing Benchmark testing

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FD-MOBILENET: IMPROVED MOBILENET WITH A FAST DOWNSAMPLING STRATEGY

FD-MOBILENET: IMPROVED MOBILENET WITH A FAST DOWNSAMPLING ST...

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IEEE International Conference on Image Processing

作者： Zheng Qin Zhaoning Zhang Xiaotao Chen Changjian Wang Yuxing Peng Science and Technology on Parallel and Distributed Laboratory National University of Defense Technology Changsha China College of Computer National University of Defense Technology Changsha China

We present Fast-Downsampling MobileNet (FD-MobileNet), an efficient and accurate network for very limited computational budgets (e.g., 10-140 MFLOPs). Our key idea is applying a fast down-sampling strategy to MobileNet framework. In FD-MobileNet, we perform 32× downsampling within 12 layers, only half the layers in the original MobileNet. This design brings three advantages: (i) It remarkably reduces the computational cost. (ii) It increases the information capacity and achieves significant performance improvements. (iii) It is engineering-friendly and provides fast actual inference speed. Experiments on ILSVRC 2012 and PASCAL VOC datasets demonstrate that FD-MobileNet consistently outperforms MobileNet and achieves comparable results with ShuffleNet under different computational budgets, for instance, surpassing Mobile-Net by 5.5% on the ILSVRC 2012 top-1 accuracy and 8.3% on the VOC 2007 mAP under a complexity of 12 MFLOPs. On an ARM-based device, FD-MobileNet achieves 1.11× inference speedup over MobileNet and 1.82× over ShuffleNet under the same complexity.

关键词： Computer architecture Complexity theory Neural networks Training Hardware Computational modeling Standards

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Accuracy evaluation of deep belief networks with fixed-point arithmetic

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Computer Modelling and New Technologies 2014年第6期18卷 7-14页

作者： Jiang, Jingfei Hu, Rongdong Mikel, Lujan Dou, Yong Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology ChangSha Hunan China University of Manchester Manchester United Kingdom

Deep Belief Networks (DBNs) are state-of-art Machine Learning techniques and one of the most important unsupervised learning algorithms. Training DBNs is computationally intensive which naturally leads to investigate FPGA acceleration. Fixed-point arithmetic can be used when implementing DBNs in FPGAs to reduce execution time, but it is not clear the implications for accuracy. Previous studies have focused only on accelerators using some fixed bit-widths. A contribution of this paper is to demonstrate the bit-width effect on various configurations of DBNs in a comprehensive way by experimental evaluation. Explicit performance changing points are found using various bit-widths. The impact of sigmoid function approximation, required part of DBNs, is evaluated. A solution of mixed bit-widths DBN is proposed, fitting the bit-widths of FPGA primitives and gaining similar performance to the software implementation. Our results provide a guide to inform the design choices on bit-widths when implementing DBNs in FPGAs documenting clearly the trade-off in accuracy.

关键词： Field programmable gate arrays (FPGA)

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FPPB: A Fast and Privacy-Preserving Method Based on the Permissioned Blockchain for Fair Transactions in Sharing Economy

FPPB: A Fast and Privacy-Preserving Method Based on the Perm...

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IEEE International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom)

作者： Bin Li Yijie Wang Peichang Shi Huan Chen Li Cheng Science and Technology on Parallel and Distributed Processing Laboratory College of Computer National University of Defense Technology Changsha Hunan P.R. China

Blockchain is a distributed system with efficient transaction recording and has been widely adopted in sharing economy. Although many existing privacy-preserving methods on the blockchain have been proposed, finding a trade-off between keeping speed and preserving privacy of transactions remain challenging. To address this limitation, we propose a novel Fast and Privacy-preserving method based on the Permissioned Blockchain (FPPB) for fair transactions in sharing economy. Without breaking the verifying protocol and bringing additional off-blockchain interactive communication, FPPB protects the privacy and fairness of transactions. Additionally, experiments are implemented in EthereumJ (a Java implementation of the Ethereum protocol) to measure the performance of FPPB. Compared with normal transactions without cryptographic primitives, FPPB only slows down transactions slightly.

关键词： Privacy Cloud computing Encryption Registers Protocols

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A low-latency fine-grained dynamic shared cache management scheme for chip multi-processor

A low-latency fine-grained dynamic shared cache management s...

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IEEE International Conference on Performance, Computing and Communications (IPCCC)

作者： Jinbo Xu Weixia Xu Zhengbin Pang College of Computer National University of Defense Technology Changsha China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China

In order to utilize the shared last-level cache (LLC) in chip multi-processors (CMP) more efficiently, the partitioning of LLC resources among all cores should have the characteristics of low-latency for access, fine granularity for migration and simple hardware complexity for implementation. This paper proposes a dynamic LLC management scheme to achieve these goals. The proposed scheme migrates cache resources among different cores at the granularity of cache blocks, instead of ways. The quantity of victim cache blocks that each victim core can migrate to other target cores are related to an eviction probability, which are calculated according to the performance goal. Then the victim cache blocks for a target core is chosen from the nearest victim core who has non-zero eviction probability by introducing innovate E-Table structure in CMP. The eviction probabilities are updated periodically. With the help of E-Tables, the proposal achieves low-latency accesses by always keeping the required cache blocks near to the target cores. And fine granularity is guaranteed by maintaining an eviction probability for each core. In addition, only little additional hardware changes to traditional cache structure is required. Simulation results suggest significant performance improvements from 6.8% to 22.7% over related works.

关键词： Hardware Resource management Probability distribution Proposals Complexity theory Simulation

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A data-assisted physics-informed neural network(DA-PINN)for fretting fatigue lifetime prediction

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International Journal of Mechanical System Dynamics 2024年第3期4卷 361-373页

作者： Can Wang Qiqi Xiao Zhikun Zhou Yongyu Yang Gregor Kosec Lihua Wang Magd Abdel Wahab Soete Laboratory Department of Electrical EnergyMetalsMechanical Constructions and SystemsFaculty of Engineering and ArchitectureGhent UniversityGentBelgium Department of Engineering Mechanics School of Aerospace EngineeringHuazhong University of Science and TechnologyWuhanChina Key Laboratory for Mechanics Anhui Polytechnic UniversityWuhuChina Parallel and Distributed Systems Laboratory Jožef Stefan InstituteLjubljanaSlovenia School of Aerospace Engineering and Applied Mechanics Tongji UniversityShanghaiChina College of Engineering Yuan Ze UniversityTaiwanChina

In this study,we present for the first time the application of physics-informed neural network(PINN)to fretting fatigue *** PINN has recently been applied to pure fatigue lifetime prediction,it has not yet been explored in the case of fretting *** propose a data-assisted PINN(DA-PINN)for predicting fretting fatigue crack initiation *** traditional PINN that solves partial differential equations for specific problems,DA-PINN combines experimental or numerical data with physics equations as part of the loss function to enhance prediction *** DA-PINN method,employed in this study,consists of two main ***,damage parameters are obtained from the finite element method by using critical plane method,which generates a data set used to train an artificial neural network(ANN)for predicting damage parameters in other ***,the predicted damage parameters are combined with the experimental parameters to form the input data set for the DA-PINN models,which predict fretting fatigue *** results demonstrate that DA-PINN outperforms ANN in terms of prediction accuracy and eliminates the need for high computational costs once the damage parameter data set is ***,the choice of loss-function methods in DA-PINN models plays a crucial role in determining its performance.

关键词： crack initiation data-assisted fretting fatigue finite element method physics-informed neural network

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A Deeply Pipelined 64-bit Multiplier for High-Performance RISC-V Processors

A Deeply Pipelined 64-bit Multiplier for High-Performance RI...

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Frontiers technology of Information and Computer (ICFTIC), IEEE International Conference on

作者： Wenyi Liu Feng Hu Guilan Li Bangjian Xu Xin Niu College of Computer Science and Electronic Hunan University Changsha China Science and Technology on Parallel and Distributed Laboratory College of Computer National University of Defense Technology Changsha China

ISBN: (数字)9798331541750

ISBN: (纸本)9798331541767

The multiplier is an important component of the processor's computing unit. Multiplication, multiplication, addition, and multiplication and subtraction operations are widely used in various signal processing algorithms. Based on this, this article extends the multiplication instructions of RISC-V, designs a 64-bit multiplier that combines the booth2 algorithm and wallace compression technology, and designs a deep pipeline mechanism for the multiplier to improve performance. Finally, Through logical simulation and emulation, the result output is correct. Comprehensive results show that under the 28nm cmos process, the MAC unit can reach 2.22Ghz.

关键词： Program processors Pipelines Emulation Signal processing algorithms Computer architecture CMOS process Encoding Circuit synthesis Testing

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Synchronization Error Detection of MPI Programs by Symbolic Execution

Synchronization Error Detection of MPI Programs by Symbolic ...

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Asia-Pacific Conference on Software Engineering

作者： Xianjin Fu Zhenbang Chen Chun Huang Wei Dong Ji Wang College of Computer National University of Defense Technology Changsha China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China

ISBN: (纸本)9781479974276

Asynchrony based overlapping of computation and communication is commonly used in MPI applications. However, this overlapping introduces synchronization errors frequently in asynchronous MPI programming. In this paper, we propose a symbolic execution based method for detecting input-related synchronization errors. The path space of an MPI program is systematically explored, and the related operations of the synchronization errors in the program are checked specifically. In addition, two optimizations are proposed to improve the efficiency. We have implemented our method as a prototype tool based on the symbolic executor Cloud9. The results of the extensive experiments indicate the effectiveness of our method.

关键词： Synchronization Data communication Libraries Optimization Buffer storage Prototypes Schedules

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Deep Learning for Social Network Information Cascade Analysis: a survey

Deep Learning for Social Network Information Cascade Analysi...

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IEEE International Conference on Data science in Cyberspace (DSC)

作者： Liqun Gao Bin Zhou Yan Jia Hongkui Tu Ye Wang Chenguang Chen Haiyang Wang Hongwu Zhuang College of Computer National University of Defense Technology ChangSha China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology ChangSha China

The following topics are dealt with: learning (artificial intelligence); text analysis; natural language processing; pattern classification; graph theory; data mining; security of data; social networking (online); fea...

ISBN: (数字)9781728195582

ISBN: (纸本)9781728195599

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GDSW: A General Framework for distributed Sliding Window over Data Streams

GDSW: A General Framework for Distributed Sliding Window ove...

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International Conference on parallel and distributed Systems (ICPADS)

作者： Huan Chen Yijie Wang Yuan Wang Xingkong Ma Science and Technology on Parallel and Distributed Processing Laboratory College of Computer National University of Defense Technology Changsha Hunan P. R. China

ISBN: (纸本)9781509053827

The big data era is characterized by the emergence of live data with high volume and fast arrival rate, it poses a new challenge to stream processing applications: how to process the unbounded live data in real time with high throughput. The sliding window technique is widely used to handle the unbounded live data by storing the most recent history of streams. However, existing centralized solutions cannot satisfy the requirements for high processing capacity and low latency due to the single-node bottleneck. Moreover, existing studies on distributed windows primarily focus on specific operators, while a general framework for processing various window-based operators is wanted. In this paper, we firstly classify the window-based operators to two categories: data-independent operators and data-dependent operators. Then, we propose GDSW, a general framework for distributed count-based sliding window, which can handle both of data-independent and data-dependent operators. Besides, in order to balance system load, we further propose a dynamic load balance algorithm called DAD based on buffer usage. Our framework is implemented on Apache Storm 0.10.0. Extensive evaluation shows that GDSW can achieve sub-second latency, and 10X improvement in throughput compared with centralized processing, when processing rapid data rate or big size window.

关键词： distributed databases Storms parallel processing Semantics Sparks distributed processing Real-time systems

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