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Frontiers technology of Information and Computer (ICFTIC), IEEE International Conference on

作者： Wenyi Liu Feng Hu Guilan Li Bangjian Xu Xin Niu College of Computer Science and Electronic Hunan University Changsha China Science and Technology on Parallel and Distributed Laboratory College of Computer National University of Defense Technology Changsha China

ISBN: (数字)9798331541750

ISBN: (纸本)9798331541767

The multiplier is an important component of the processor's computing unit. Multiplication, multiplication, addition, and multiplication and subtraction operations are widely used in various signal processing algorithms. Based on this, this article extends the multiplication instructions of RISC-V, designs a 64-bit multiplier that combines the booth2 algorithm and wallace compression technology, and designs a deep pipeline mechanism for the multiplier to improve performance. Finally, Through logical simulation and emulation, the result output is correct. Comprehensive results show that under the 28nm cmos process, the MAC unit can reach 2.22Ghz.

关键词： Program processors Pipelines Emulation Signal processing algorithms Computer architecture CMOS process Encoding Circuit synthesis Testing

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A data-assisted physics-informed neural network(DA-PINN)for fretting fatigue lifetime prediction

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International Journal of Mechanical System Dynamics 2024年第3期4卷 361-373页

作者： Can Wang Qiqi Xiao Zhikun Zhou Yongyu Yang Gregor Kosec Lihua Wang Magd Abdel Wahab Soete Laboratory Department of Electrical EnergyMetalsMechanical Constructions and SystemsFaculty of Engineering and ArchitectureGhent UniversityGentBelgium Department of Engineering Mechanics School of Aerospace EngineeringHuazhong University of Science and TechnologyWuhanChina Key Laboratory for Mechanics Anhui Polytechnic UniversityWuhuChina Parallel and Distributed Systems Laboratory Jožef Stefan InstituteLjubljanaSlovenia School of Aerospace Engineering and Applied Mechanics Tongji UniversityShanghaiChina College of Engineering Yuan Ze UniversityTaiwanChina

In this study,we present for the first time the application of physics-informed neural network(PINN)to fretting fatigue *** PINN has recently been applied to pure fatigue lifetime prediction,it has not yet been explored in the case of fretting *** propose a data-assisted PINN(DA-PINN)for predicting fretting fatigue crack initiation *** traditional PINN that solves partial differential equations for specific problems,DA-PINN combines experimental or numerical data with physics equations as part of the loss function to enhance prediction *** DA-PINN method,employed in this study,consists of two main ***,damage parameters are obtained from the finite element method by using critical plane method,which generates a data set used to train an artificial neural network(ANN)for predicting damage parameters in other ***,the predicted damage parameters are combined with the experimental parameters to form the input data set for the DA-PINN models,which predict fretting fatigue *** results demonstrate that DA-PINN outperforms ANN in terms of prediction accuracy and eliminates the need for high computational costs once the damage parameter data set is ***,the choice of loss-function methods in DA-PINN models plays a crucial role in determining its performance.

关键词： crack initiation data-assisted fretting fatigue finite element method physics-informed neural network

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Synchronization Error Detection of MPI Programs by Symbolic Execution

Synchronization Error Detection of MPI Programs by Symbolic ...

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Asia-Pacific Conference on Software Engineering

作者： Xianjin Fu Zhenbang Chen Chun Huang Wei Dong Ji Wang College of Computer National University of Defense Technology Changsha China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China

ISBN: (纸本)9781479974276

Asynchrony based overlapping of computation and communication is commonly used in MPI applications. However, this overlapping introduces synchronization errors frequently in asynchronous MPI programming. In this paper, we propose a symbolic execution based method for detecting input-related synchronization errors. The path space of an MPI program is systematically explored, and the related operations of the synchronization errors in the program are checked specifically. In addition, two optimizations are proposed to improve the efficiency. We have implemented our method as a prototype tool based on the symbolic executor Cloud9. The results of the extensive experiments indicate the effectiveness of our method.

关键词： Synchronization Data communication Libraries Optimization Buffer storage Prototypes Schedules

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Deep Learning for Social Network Information Cascade Analysis: a survey

Deep Learning for Social Network Information Cascade Analysi...

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IEEE International Conference on Data science in Cyberspace (DSC)

作者： Liqun Gao Bin Zhou Yan Jia Hongkui Tu Ye Wang Chenguang Chen Haiyang Wang Hongwu Zhuang College of Computer National University of Defense Technology ChangSha China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology ChangSha China

The following topics are dealt with: learning (artificial intelligence); text analysis; natural language processing; pattern classification; graph theory; data mining; security of data; social networking (online); fea...

ISBN: (数字)9781728195582

ISBN: (纸本)9781728195599

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GDSW: A General Framework for distributed Sliding Window over Data Streams

GDSW: A General Framework for Distributed Sliding Window ove...

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International Conference on parallel and distributed Systems (ICPADS)

作者： Huan Chen Yijie Wang Yuan Wang Xingkong Ma Science and Technology on Parallel and Distributed Processing Laboratory College of Computer National University of Defense Technology Changsha Hunan P. R. China

ISBN: (纸本)9781509053827

The big data era is characterized by the emergence of live data with high volume and fast arrival rate, it poses a new challenge to stream processing applications: how to process the unbounded live data in real time with high throughput. The sliding window technique is widely used to handle the unbounded live data by storing the most recent history of streams. However, existing centralized solutions cannot satisfy the requirements for high processing capacity and low latency due to the single-node bottleneck. Moreover, existing studies on distributed windows primarily focus on specific operators, while a general framework for processing various window-based operators is wanted. In this paper, we firstly classify the window-based operators to two categories: data-independent operators and data-dependent operators. Then, we propose GDSW, a general framework for distributed count-based sliding window, which can handle both of data-independent and data-dependent operators. Besides, in order to balance system load, we further propose a dynamic load balance algorithm called DAD based on buffer usage. Our framework is implemented on Apache Storm 0.10.0. Extensive evaluation shows that GDSW can achieve sub-second latency, and 10X improvement in throughput compared with centralized processing, when processing rapid data rate or big size window.

关键词： distributed databases Storms parallel processing Semantics Sparks distributed processing Real-time systems

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Poster: Segmentation Based Online Performance Problem Diagnosis

Poster: Segmentation Based Online Performance Problem Diagno...

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International Conference on Software Engineering (ICSE)

作者： Jingwen Zhou Zhenbang Chen Ji Wang College of Computer National University of Defense Technology Changsha China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China

ISBN: (纸本)9781479919352

Currently, the performance problems of software systems gets more and more attentions. Among various diagnosis methods based on system traces, principal component analysis (PCA) based methods are widely used due to the high accuracy of the diagnosis results and requiring no specific domain knowledge. However, according to our experiments, we have validated several shortcomings existed in PCA-based methods, including requiring traces with a same call sequence, inefficiency when the traces are long, and missing performance problems. To cope with these issues, we introduce a segmentation based online diagnosis method in this poster.

关键词： Principal component analysis Software systems Accuracy Measurement Monitoring Computer architecture Conferences

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IDOpenFlow: An OpenFlow switch to support identifier-locator split communication

IDOpenFlow: An OpenFlow switch to support identifier-locator...

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IEEE Conference on Industrial Electronics and Applications (ICIEA)

作者： Yannan Yang Yaping Liu Zhihong Liu School of Computer National University of Defense Technology Changsha China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China

ISBN: (纸本)9781467386456

The traditional identifier locator split network has many issues such as inflexibility, hard to innovate and difficult to deploy. SDN (Software Defined Network) provides a new direction for designing flexible identifier locator split network. The recent identifier locator split network based on SDN use the OpenFlow switch directly via rewritting the address, which lacks the scalability and utilizes locator address ineffectively. An OpenFlow switch named IDOpenFlow is proposed to support the communication based on identifier. IDOpenFlow switch provides the communication mechanism via encapsulating the packets, which has good scalability and utilizing locator address effectively. IDOpenFlow switch encapsulates and decapsulates packets according flow entries which are installed by SDN controller. Moreover, the prototype system shows that IDOpenFlow effectively supports the communication for both the fixed node and the mobile node. With respect to the issues of software forwarding performance, a high-performance IDOpenFlow switch based on Intel DPDK (which is named A-IDOpenFlow) is proposed. The results of Ixia test tool show that: 1) for packets more than 128 bytes, A-IDOpenFlow switch supports the communication based on identifier at rate of 10Gbit/s; 2) for small packet of 64 bytes, the rate of A-IDOpenFlow is 7.25 times faster than the rate of IDOpenFlow.

关键词： Switches Protocols Software Routing Servers Scalability

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ME-TCAM: Memory-Efficient Ternary Content Addressable Memory Based on Multipumping-Enabled LUTRAM on FPGA

ME-TCAM: Memory-Efficient Ternary Content Addressable Memory...

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Intelligent Computing and Human-Computer Interaction (ICHCI), International Conference on

作者： Zilin Shi Hui Yang Rulin Liu Jinli Yan Peng Qiao Baosheng Wang College of Computer Science and Technology National University of Defense Technology Changsha China Science and Technology on Parallel and Distributed Processing Laboratory (PDL) National University of Defense Technology Changsha China

Static random access memory (SRAM) on field programmable gate arrays (FPGAs) can be emulated to offer ternary content addressable memory (TCAM) functionality. However, SRAM-based TCAM wastes storage resources. This is due to the limited capacity of the physical addresses in the SRAM unit. This work proposes a LUTRAM-based TACM scheme on the FPGA called Memory-Efficient TCAM (ME-TCAM). METCAM divides SRAM unit into multiple virtual blocks mapping to a portion of the TCAM table to store the more address information of the TCAM table. Operation on SRAM block means that increasing the overall emulated TCAM bits/SRAM. Moreover, ME-TCAM exploits Xilinx primitives to conFigure lookup tables (LUTs) as 32 × 2 lookup table RAMs (LUTRAMs). We implement ME-TCAM using LUTRAM with a size of 512 × 48 and 1024 × 144 on a Virtex-7 FPGA device. Compared with the state-of-the-art research DUR, ME-TCAM achieves at least 2.6 times more memory efficiency.

关键词： Human computer interaction Associative memory Memory management Random access memory Logic gates Table lookup parallel architectures

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Semantic web service composition using answer set planning

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International Journal of Advancements in Computing technology 2011年第5期3卷 20-31页

作者： Qian, Jun-Yan Huang, Guo-Wang Zhao, Ling-Zhong National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha 410073 China Department of Computer science and engineering Guilin University of Electronic Technology Guilin 541004 China

This paper presents a method that adapting planning description to bring the semantic information into play for service composition through action language C. It shows how service descriptions can be expressed by preconditions and effects and the action language C provides a richer syntax and semantic for complex service descriptions. We also presents the algorithm of Translating semantic Web service described by OWL-S to action language C. Thanks to the structured description and the powerful expression of C, we only consider the initial Situation and the desired goal ignoring details of transition and planning. At last we use satisfiability planning to solve the planning problem by translating the action language into disjunctive logic program.

关键词： Web services

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A push-based prefetching for cooperative caching RAM Grid

A push-based prefetching for cooperative caching RAM Grid

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International Conference on parallel and distributed Systems (ICPADS)

作者： Rui Chu Nong Xiao Lei Chen Xicheng Lu National Laboratory for Parallel and Distributed Processing ChangSha Hunan China Hong Kong University of Science and Technology Kowloon Hong Kong China

As an innovative distributed computing technique for sharing the memory resources in high-speed network, RAM Grid exploits the distributed free nodes, and provides remote memory for the nodes which are short of memory. One of the RAM Grid systems named DRACO, tries to provide cooperative caching to improve the performance of the user node which has mass disk I/O but lacks local memory. However, the performance of DRACO is constrained with the network communication cost. In order to hide the latency of remote memory access and improve the caching performance, we proposed using push- based prefetching to enable the caching providers to push the potential useful memory pages to the user nodes. Specifically, for each caching provider, it employs sequential pattern mining techniques, which adapts to the characteristics of memory page access sequences, on locating useful memory pages for prefetching. We have verified the effectiveness of the proposed method through system analysis and trace-driven simulations.

关键词： Prefetching Cooperative caching Random access memory Read-write memory Delay High-speed networks File systems Costs Laboratories distributed processing

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