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International Conference on Communication Software and Networks, ICCSN

作者： Hangjun Zhou Sha Fu Key Laboratory of Science and Technology for National Defence of Parallel and Distributed Processing School of Computer Science National University of Defense Technology Changsha Hunan China Department of Information Management Hunan University of Finance and Economics Changsha Hunan China

When a large-scale distributed interactive simulation system is running on WAN, the sites usually disperse over a wide area in geography, which results in the simulation clock of each site is hardly to be accurately synchronized with that of other sites. The asynchronous clocks and large transmission latency on WAN bring on a problem for the large-scale simulations to preserve the real-time causal order delivery of received events at each site. In this article, we analyze the indirect way to compare the values of asynchronous simulation clocks at first, and then propose a novel scheme which can select the reconstructible causal control information for each message so as to ensure the causal ordering of events in real time. Experiments demonstrate that the scheme can weaken the effect of network latency, reduce the overhead of the transmission amount of control information and improve the causal order consistency in asynchronous distributed simulations.

关键词： Clocks Educational institutions

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NUMA-aware FFT-based convolution on ARMv8 many-core CPUs

arXiv

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arXiv 2021年

作者： Huang, Xiandong Wang, Qinglin Lu, Shuyu Hao, Ruochen Mei, Songzhu Liu, Jie Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha410073 China School of Computer Science National University of Defense Technology Changsha410073 China Department of Biomedical Informatics University of Pittsburgh Pittsburgh United States

Convolutional Neural Networks (CNNs), one of the most representative algorithms of deep learning, are widely used in various artificial intelligence applications. Convolution operations often take most of the computational overhead of CNNs. The FFT-based algorithm can improve the efficiency of convolution by reducing its algorithm complexity, there are a lot of works about the high-performance implementation of FFT-based convolution on many-core CPUs. However, there is no optimization for the non-uniform memory access (NUMA) characteristics in manycore CPUs. In this paper, we present a NUMA-aware FFT-based convolution implementation on ARMv8 many-core CPUs with NUMA architectures. The implementation can reduce a number of remote memory access through the data reordering of FFT transformations and the three-level parallelization of the complex matrix multiplication. The experiment results on a ARMv8 many-core CPU with NUMA architectures demonstrate that our NUMA-aware implementation has much better performance than the state-of-the-art work in most cases. Copyright © 2021, The Authors. All rights reserved.

关键词： Convolutional neural networks

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A consistency algorithm for causal and totally ordered event delivery in DVE

A consistency algorithm for causal and totally ordered event...

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International Conference on Computer science and Information technology (CSIT)

作者： Hangjun Zhou Wei Zhang Yuxing Peng Sikun Li Department of Information Management Hunan College of Finance and Economics Changsha Hunan China Key Laboratory of Science and Technology for National Defence of Parallel and Distributed Processing School of Computer Science National University of Defense Technology Changsha Hunan China

How to preserve causal and totally ordered event delivery is an important issue in real-time serverless DVE(distributed Virtual Environment). However, most of the related works are designed to maintain causal order merely or time stamped order with intensive computation and bandwidth overhead. In this paper, we proposed a novel distributed algorithm to maintain the before-and-after relationship between events, both causal and concurrent, of DVE at each individual node. Several simulation experiments are carried out to evaluate the performance of our algorithm and the results demonstrate that the algorithm is effective in preserving causal and totally ordered event delivery and more efficient than the previous algorithms.

关键词： Artificial neural networks Silicon Educational institutions

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A causality based dynamic message ordering for DVEs on Wide Area Network

A causality based dynamic message ordering for DVEs on Wide ...

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International Conference on Communication Software and Networks, ICCSN

Due to the large message transmission latency in distributed Virtual Environments(DVEs) on Wide Area Net-work(WAN), the effectiveness of causality consistency control of message ordering is determined by not only causal order of messages but also the real-timeness. If merely causal order is considered, the real-time property of DVEs may not be ensured because of the unlimited waiting time for the delayed messages. While if only real-timeness is emphasized, there may be too many delayed messages, which have to be discarded, to maintain the quality of causal message ordering. Therefore, a trade-off between the quality of causal order delivery and real-timeness is necessary for DVEs. In this article, a novel causality based message ordering approach is presented. In general, this new approach dynamically balances the demands of causal order delivery and real-timeness. Experiment results demonstrate the approach can enhance the quality of causality, while simultaneously keep the real-time property of DVEs.

关键词： Educational institutions

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Constraint-Relaxation Approach for Nonnegative Matrix Factorization: A Case Study

Constraint-Relaxation Approach for Nonnegative Matrix Factor...

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IEEE International Conference on Systems, Man and Cybernetics

作者： Jue Wang Naiyang Guan Xuhui Huang Zhigang Luo Science and Technology on Parallel and Distributed Processing Laboratory College of Computer National University of Defense Technology Hunan P.R. China Department of Computer Science and Techonoly College of Computer National University of Defense Technology Hunan P.R. China

ISBN: (纸本)9781479986989

Nonnegative matrix factorization (NMF) is a powerful technique for dimensionality reduction. Conventional NMF algorithms usually keep the matrices W and H nonnegative while iterating. However, to get the NMF of a matrix, it's unnecessary to force the temporary solutions in iterations nonnegative. In this paper, we propose a two-staged approach for NMF. At the relaxation stage, the nonnegative constraint of temporary solutions is relaxed and a real valued matrix factorization is generated. At the constraint stage, the real valued matrix factorization is transformed to a nonnegative matrix factorization by an invertible linear transformation. Based on this approach, we study on exact nonnegative matrix factorization when rank=2. We proved that, given two real valued matrices of rank=2, there exists an invertible linear transformation which can transform the real valued matrices to nonnegative matrices with their product stable. We propose an algorithm to find out the transformation. When rank is higher than 2, this kind of transformation may not exist. In the experiments, it's showed that this approach can reach a nonnegative matrix factorization with lower reconstruction error than conventional methods, and the technique for rank=2 exact NMF works well.

关键词： Algorithm design and analysis Matrix decomposition Additives Computers Transforms Matrix converters Clustering algorithms

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Mining Software Profile across Multiple Repositories for Hierarchical Categorization

Mining Software Profile across Multiple Repositories for Hie...

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International Conference on Software Maintenance (ICSM)

作者： Tao Wang Huaimin Wang Gang Yin Charles X. Ling Xiang Li Peng Zou National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha China Department of Computer Science The University of Western Ontario London Ontario Canada Academy of Equipment Beijing China

ISBN: (纸本)9781467352185

The large amounts of software repositories over the Internet are fundamentally changing the traditional paradigms of software maintenance. Efficient categorization of the massive projects for retrieving the relevant software in these repositories is of vital importance for Internet-based maintenance tasks such as solution searching, best practices learning and so on. Many previous works have been conducted on software categorization by mining source code or byte code, which are only verified on relatively small collections of projects with coarse-grained categories or clusters. However, Internet-based software maintenance requires finer-grained, more scalable and language-independent categorization approaches. In this paper, we propose a novel approach to hierarchically categorize software projects based on their online profiles across multiple repositories. We design a SVM-based categorization framework to classify the massive number of software hierarchically. To improve the categorization performance, we aggregate different types of profile attributes from multiple repositories and design a weighted combination strategy which assigns greater weights to more important attributes. Extensive experiments are carried out on more than 18,000 projects across three repositories. The results show that our approach achieves significant improvements by using weighted combination, and the overall precision, recall and F-Measure can reach 71.41%, 65.60% and 68.38% in appropriate settings. Compared to the previous work, our approach presents competitive results with 123 finer-grained and multi-layered categories. In contrast to those using source code or byte code, our approach is more effective for large-scale and language-independent software categorization.

关键词： Databases Collaboration Servers Software maintenance Internet Data mining

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A peak performance model for Matrix multiplication on general-purpose DSP

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Hunan Daxue Xuebao/Journal of Hunan University Natural sciences 2013年第11 SUPPL.期40卷 148-152页

作者： Liu, Jie Chi, Li-Hua Xie, Lin-Chuan Wang, Yang Gan, Xin-Biao Feng, Hua Hu, Qing-Feng Science and Technology on Parallel and Distributed Processing Laboratory National Univ of Defense Technology Changsha Hunan 410073 China

DSP processor can be used to solve the high performance computation problems, which has the characteristics of high computing performance and low power. Matrix multiplication algorithm is the kernel of many scientific and technology computation, so it is of importance for theorem and practice. Based on general purpose DSP (GPDSP), a new parallel algorithm for matrix multiplication was proposed. And a peak performance model for matrix multiplication was built. From the peak performance model, an architecture of GPDSP was set up, and the parameter of GPDSP with Tflops was given, which includes the number of pipe-line, the number of SIMD registers, the breadth and latency for the hierarchical memories.

关键词： parallel algorithms

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A Float-Point Arithmetic Logic Unit for High Performance RISC-V Processor

A Float-Point Arithmetic Logic Unit for High Performance RIS...

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Frontiers technology of Information and Computer (ICFTIC), IEEE International Conference on

作者： Chunyuan Wei Chuan Yuan Yu Qi Bangjian Xu Xin Niu College of Computer Science and Electronic Engineering Hunan University Changsha China College of Electrical and Information Engineering Hunan University Changsha China Science and Technology on Parallel and Distributed Laboratory College of Computer National University of Defense Technology Changsha China

ISBN: (数字)9798331541750

ISBN: (纸本)9798331541767

With the rapid advancement of artificial intelligence, chips have become increasingly important. The emerging RISC-V instruction set gradually provides powerful computing support for this field. In this context, along with the computing requirements of deep learning, this paper presents the design of a high-performance floating-point arithmetic logic unit (FALU) that facilitates calculations with double-precision, single-precision, half-precision, and Bfloat16 precision data. This design is based on a single-channel algorithm with merged rounding. It improves and implements a composite adder that combines high and low bits. It also proposes a tree-like floating-point comparator based on the Kogge-Stone parallel prefix network. To ensure that the FALU components meet performance requirements, we undergo functional verification in the Vivado simulation environment. Operating at 1.47GHz under the 28nm CMOS process, the components achieve the predetermined performance indicators.

关键词： Deep learning Context Accuracy Instruction sets CMOS process Logic Artificial intelligence Adders Floating-point arithmetic

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DREAMS: Dynamic resource allocation for MapReduce with data skew

DREAMS: Dynamic resource allocation for MapReduce with data ...

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IFIP/IEEE International Symposium on Integrated Network Management

作者： Zhihong Liu Qi Zhang Mohamed Faten Zhani Raouf Boutaba Yaping Liu Zhenghu Gong College of Computer National University of Defense Technology Changsha China David R. Cheriton School of Computer Science University of Waterloo Waterloo ON Canada Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha Hunan China

ISBN: (纸本)9781479982424

MapReduce has become a popular model for large-scale data processing in recent years. However, existing MapRe-duce schedulers still suffer from an issue known as partitioning skew, where the output of map tasks is unevenly distributed among reduce tasks. In this paper, we present DREAMS, a framework that provides run-time partitioning skew mitigation. Unlike previous approaches that try to balance the workload of reducers by repartitioning the intermediate data assigned to each reduce task, in DREAMS we cope with partitioning skew by adjusting task run-time resource allocation. We show that our approach allows DREAMS to eliminate the overhead of data repartitioning. Through experiments using both real and synthetic workloads running on a 11-node virtual virtualised Hadoop cluster, we show that DREAMS can effectively mitigate negative impact of partitioning skew, thereby improving job performance by up to 20.3%.

关键词： Resource management Containers Predictive models Mathematical model Monitoring Biomedical monitoring Yarn

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PyMW - A Python module for desktop grid and volunteer computing

PyMW - A Python module for desktop grid and volunteer comput...

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International Symposium on parallel and distributed Processing (IPDPS)

作者： Eric M. Heien Yusuke Takata Kenichi Hagihara Adam Kornafeld Graduate School of Information Science and Technology Osaka University Toyonaka Osaka Japan Laboratory of Parallel and Distributed Systems Computer and Automation Research Institute Hungarian Academy of Sciences (ATOMKI) Budapest Hungary

We describe a general purpose master-worker parallel computation Python module called PyMW. PyMW is intended to support rapid development, testing and deployment of large scale master-worker style computations on a desktop grid or volunteer computing environment. This module targets non-expert computer users by hiding complicated task submission and result retrieval procedures behind a simple interface. PyMW also provides a unified interface to multiple computing environments with easy extension to support additional environments. In this paper, we describe the internal structure and external interface to the PyMW module and its support for the Condor computing environment and the Berkeley Open Infrastructure for Network Computing (BOINC) platform. We demonstrate the effectiveness and scalability of PyMW by performing master-worker style computations on a desktop grid using Condor and a BOINC volunteer computing project.

关键词： Grid computing Concurrent computing Computer interfaces Large-scale systems Virtual colonoscopy distributed computing Computer networks Software packages Packaging Information science

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