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IEEE Computer Society Annual Symposium on VLSI

作者： Sheng Liu Hanyan Chen Jianghua Wan Yaohua Wang College of Computer National University of Defense Technology Changsha Hunan China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha Hunan China

ISBN: (纸本)9781467390408

Binary Exchange Algorithm (BEA) always introduces excessive shuffle operations when mapping FFTs on vector SIMD DSPs. This can greatly restrict the overall performance. We propose a novel mod (2P-1) shuffle function and Mod-BEA algorithm (MBEA), which can halve the shuffle operation count and unify the shuffle mode. Such unified shuffle mode inspires us to propose a set of novel mod (2P-1) shuffle memory-access instructions, which can totally eliminate the shuffle operations. Experimental results show that the combination of MBEA and the proposed instructions can bring 17.2%-31.4% performance improvements at reasonable hardware cost, and compress the code size by about 30%.

关键词： Digital signal processing Hardware Pipelines Computer architecture Linearity Computers Software

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Enhancing the Security of parallel Programs via Reducing Scheduling Space

Enhancing the Security of Parallel Programs via Reducing Sch...

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IEEE International Symposium on Dependable, Autonomic and Secure Computing (DASC)

作者： Xu Zhou Gen Li Kai Lu Shuangxi Wang School of Computer National University of Defense Technology Changsha PR China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha PR China

parallel programs face a new security problem - concurrency vulnerability, which is caused by a special thread scheduling instead of inputs. In this paper, we propose to automatically fix concurrency vulnerabilities by reducing thread scheduling space. Our method is based on two observations. First, most concurrency vulnerabilities are caused by atomicity violation errors. Second, reducing thread scheduling space does not harm the correctness of the original program. We designed a prototype runtime system shield using deterministic multithreading techniques. Shield is designed to transparently run parallel programs and schedule threads in large instruction blocks to prevent atomicity violation at best effort. In case some concurrency vulnerabilities cannot be fixed by shield's scheduling reducing scheme, we also provide a remedy strategy by integrating shield with record&replay function, so that it can help programmers to analyze attacker's behavior for manually fixing.

关键词： Concurrent computing Instruction sets Scheduling Runtime Computer bugs Security Processor scheduling

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UniMESH: The light-weight unidirectional channel Network-on-Chip in 2D mesh topology

UniMESH: The light-weight unidirectional channel Network-on-...

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International Conference on Electronics, Communications and Computers (CONIELECOMP)

作者： Feng Wang Xiantuo Tang Zuocheng Xing Hengzhu Liu Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha Hunan China Institute of Microelectronics National University of Defense Technology Changsha Hunan China

ISBN: (纸本)9781479974375

Power consumption, design complexity and areacost are limiting constraints in the design of interconnect for scalable many-core systems. To tackle the power and area concerns, we propose a light-weight unidirectional channel network-on-chip in 2D mesh topology (UniMESH), which simplifies router architectures, uses only half amount of channel links to guarantee a fully connected topology, and adopts a novel routing algorithm and deadlock recovery mechanism. As a result, it can reduce both design complexity and area-cost, and decrease some unwanted power consumption. Evaluations show that the proposed light-weight UniMESH can reduce 57.4% router areas, and save 39.3% total power consumption and only add few extra latency when compared with conventional 2D mesh design in SPLASH application simulations.

关键词： Routing System recovery Ports (Computers) Topology Latches Network topology Nickel

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Big data collaborative artificial intelligence and high-performance computing to drive physical design of fusion

Big data collaborative artificial intelligence and high-perf...

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2022 International Conference on Cloud Computing, Big Data Applications and Software Engineering, CBASE 2022

作者： Liu, Pan Liu, Gongjie Liu, Jie Liu, Chencheng Xiong, Wenbin Tang, Zhangcun Zhou, Yinzhao Wang, Yonggang Yuan, Zhouming Beijng Paratera Technology Corp. Ltd Beijing100000 China National University of Defense Technology Science and Technology on Parallel and Distributed Processing Laboratory Changsha410073 China National University of Defense Technology Laboratory of Software Engineering for Complex Systems Changsha410073 China Central South University of Forestry and Technology Changsha410000 China Nuclear and Radiation Safety Center Mee Beijing100000 China University of Electronic Science and Technology of China Chengdu610000 China Tianfu Innovation Energy Establishment Chengdu610000 China

ISBN: (纸本)9798350396393

Controlled thermonuclear fusion has always been a dream pursued by mankind. However, the physical processes of controlled thermonuclear fusion are complex, requiring numerical simulations with high performance computing, and the amount of data generated by the physical processes on spatial, temporal and temperature scales is too large to be captured, managed, processed and collated in a reasonable time frame by mainstream software tools to achieve more aggressive fusion physical design. The data are too large to be captured, managed, processed, and collated into more aggressive targets for fusion physical design in a reasonable time by mainstream software tools. At the same time, the failure of fusion ignition can be caused by the distortion of various key physical quantities, and only by decomposing the process step by step and clarifying the changes of key physical quantities in the fusion physics process, can an effective mechanism be formed to prevent the distortion of key physical quantities from causing ignition failure in experimental physics. Big data in collaboration with artificial intelligence and high performance computing to drive the physical design of fusion is a novel avenue. By data acquisition with and pre-processing, this allows the creation of small sample libraries and deep learning. With supervised learning function convergence, incorporating solid/fluid computational methods, further network layering and cell expansion, the parameters of the physical model conforming to Lawson's criterion will become experimental physical parameters, and we find the new approach in Data capacity, Model combination approach, Type of material, Calculation speed, Optimisation of design iteration times, etc. are superior to the traditional approach. © 2022 IEEE.

关键词： Big data

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ST-PINN: A Self-Training Physics-Informed Neural Network for Partial Differential Equations

arXiv

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arXiv 2023年

作者： Yan, Junjun Chen, Xinhai Wang, Zhichao Zhoui, Enqiang Liu, Jie Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha410073 China Laboratory of Digitizing Software for Frontier Equipment National University of Defense Technology Changsha410073 China

Partial differential equations (PDEs) are an essential computational kernel in physics and engineering. With the advance of deep learning, physics-informed neural networks (PINNs), as a mesh-free method, have shown great potential for fast PDE solving in various applications. To address the issue of low accuracy and convergence problems of existing PINNs, we propose a self-training physics-informed neural network, ST-PINN. Specifically, ST-PINN introduces a pseudo label based self-learning algorithm during training. It employs governing equation as the pseudo-labeled evaluation index and selects the highest confidence examples from the sample points to attach the pseudo labels. To our best knowledge, we are the first to incorporate a self-training mechanism into physics-informed learning. We conduct experiments on five PDE problems in different fields and scenarios. The results demonstrate that the proposed method allows the network to learn more physical information and benefit convergence. The ST-PINN outperforms existing physics-informed neural network methods and improves the accuracy by a factor of 1.33x-2.54x. The code of ST-PINN is available at GitHub: https://***/junjun-yan/ST-PINN. Copyright © 2023, The Authors. All rights reserved.

关键词： Learning algorithms

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A Fast Adversarial Sample Detection Approach for Industrial Internet-of-Things Applications

A Fast Adversarial Sample Detection Approach for Industrial ...

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International Workshop on Quality of Service

作者： Shigeng Zhang Yudong Li Shuxin Chen Xuan Li Jian Zhang School of Computer Science and Engineering Central South University College of Computer Science and Electronic Engineering Hunan University The Science and Technology on Parallel and Distributed Processing Laboratory (PDL) China

Adversarial attacks reveal the inherent vulnerability of deep neural networks, which face serious security issues for their security. Among them, the attack against the Deep Neural Network (DNN) application used in the Industrial Internet of Things (IIoT) is a key area in adversarial attacks. Adversarial examples generated by attackers by adding human-undetectable interference to legitimate examples may cause models to make wrong decision results, resulting in serious accidents. Many detection technologies have been proposed to mitigate the harm of adversarial examples to neural networks, among which the methods based on the difference of feature attribution between normal examples and adversarial examples show state-of-the-art detection performance, but they suffer from detection efficiency. In this work, we focus on improving the detection efficiency of the feature-attribution-based detection methods. We observe that there is still a significant difference in the feature attribution distribution of a normal image and an adversarial image even only some pixels in the image are processed, which can be verified by utilizing the Kolmogorov-Smirnov test. Based on this observation, we first adopt a variety of strategies to sample partial pixels in an image and then utilize the selected pixels to train a feature-attribution-based detector for detecting adversarial examples. Extensive experiments conducted on four datasets (MNIST, CIFAR-10, SVHN, CIFAR-100) against various attacks proved that the detection efficiency of the accelerated detection method is improved (for example, the average execution time was increased by 8.7 times on CIFAR-10) while the detection performance maintains state-of-the-art.

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Optimizing All-to-All Collective Communication on Tianhe Supercomputer

Optimizing All-to-All Collective Communication on Tianhe Sup...

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IEEE International Conference on Big Data and Cloud Computing (BdCloud)

作者： Jintao Peng Jie Liu Yi Dai Min Xie Chunye Gong National University of Defense Technology ChangSha China Science and Technology on Parallel and Distributed Processing Laboratory NUDT Changsha China Changsha and Laboratory of Software Engineering for Complex System NUDT Changsha China

All-to-all communication has a wide range of ap-plications in parallel applications like FFT. On most supercom-puters, there are multiple cores in a node. Message aggregation is an efficient method for smaller messages. Using multi-leader to aggregate message show significant improvement in intra-node overhead. However, compared to one-leader aggregation, existing multi-leader design incurs more message count and less aggregated message size. This paper proposes an Overlapped Multi-worker Multi-port all-to-all (OVALL) to scale the message size and parallelism of the aggregation algorithm. The algorithm exploits the all-to-all multi-core parallelism, concurrent commu-nication, and overlapping capabilities. Experiment results show that, compared to systems built-in MPI, OVALL'implementation achieves up to 5.9x or 18x speedup compared to MPI on different HPC systems. For the Fast Fourier Transform (FFT) application, OVALL is up to 2.7x (8192 cores, system A) or 5.6x (4800 cores, system B) faster compared to built-in MPI on peak performance.

关键词： Multicore processing Fast Fourier transforms Scalability Aggregates Supercomputers Libraries Pipeline processing

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NUMA-aware FFT-based Convolution on ARMv8 Many-core CPUs

NUMA-aware FFT-based Convolution on ARMv8 Many-core CPUs

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IEEE International Conference on Big Data and Cloud Computing (BdCloud)

作者： Xiandong Huang Qinglin Wang Shuyu Lu Ruochen Hao Songzhu Mei Jie Liu Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China School of Computer Science National University of Defense Technology Changsha China University of Pittsburgh Pittsburgh USA

Convolutional Neural Networks (CNNs), one of the most representative algorithms of deep learning, are widely used in various artificial intelligence applications. Convolution operations often take most of the computational overhead of CNNs. The FFT-based algorithm can improve the efficiency of convolution by reducing its algorithm complexity, there are a lot of works about the high-performance implementation of FFT-based convolution on many-core CPUs. However, there is no optimization for the non-uniform memory access (NUMA) characteristics in many-core CPUs. In this paper, we present a NUMA-aware FFT-based convolution implementation on ARMv8 many-core CPUs with NUMA architectures. The implementation can reduce a number of remote memory access through the data reordering of FFT transformations and the three-level parallelization of the complex matrix multiplication. The experiment results on a ARMv8 many-core CPU with NUMA architectures demonstrate that our NUMA-aware implementation has much better performance than the state-of-the-art work in most cases.

关键词： Deep learning Recurrent neural networks Convolution Computer architecture Complexity theory Convolutional neural networks Kernel

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A framework to specify and evaluate coordination in MAS with logic

A framework to specify and evaluate coordination in MAS with...

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IEEE/WIC/ACM International Conference on Intelligent Agent technology (IAT)

作者： Xinjun Mao Ji Wang E. Yu Department of Computer Science National University of Defense Technology China National Laboratory for Parallel and Distributed Processing Changsha China Department of Computer Science University of Toronto Canada

We present a framework to specify and evaluate the coordinations in MAS. The framework draws on a MAS logic incorporating a number of temporal and dynamic operators, and has some important characteristics such as high-level, abstract, complete, and general-purpose. Based on the framework, the request/service cooperation models are studied and analyzed.

关键词： Logic Protocols Multiagent systems Computer science Laboratories Distributed processing Speech processing Information systems Internet TCPIP

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A Simulated Annealing Technique for Optimizing Time Warp Simulation

A Simulated Annealing Technique for Optimizing Time Warp Sim...

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International Conference on Computer Modeling and Simulation, ICCMS

作者： Wei Zhang Sina Meraji Jun Wang Carl Tropper National Laboratory of Parallel and Distributed Processing School of Computer Science National University of Defense Technology ChangSha China School of Computer Science McGill University Montreal Canada

According to Moore's law the complexity of VLSI circuits has doubled approximately every two years, resulting in simulation becoming the major bottleneck in the circuit design process. parallel and distributed simulations can be applied as fast, cost effective approaches to the simulation of large, complex circuits. In this paper, a simple yet effective simulated annealing-based approach is proposed to optimize the choice of a time window for optimistic parallel simulation. We chose gate level circuits simulations as our experimental vehicle. Our results show up to a 52% improvement in the simulation time using our simulated annealing algorithm. To the best of our knowledge, this is the first time that SA has been applied to optimize the performance of time warp simulations.

关键词： Time warp simulation Simulated annealing Circuit simulation Computational modeling Hardware design languages Discrete event simulation Computer simulation Voltage control Concurrent computing Computer science

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