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Large-scale network topology generation for emulation environment

Large-scale network topology generation for emulation enviro...

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1st International Conference on Networking and distributed Computing, ICNDC 2010

作者： Kuang, Xiao-Hui Huang, Min-Huan Che, Yong-Gang Jin, Li Fei, Xu National Key Laboratory of Science and Technology on Information System Security Beijing Institute of System and Engineering Beijing China Department of Computer Science and Technology Tsinghua University Beijing China National Laboratory for Parallel and Distributed Process National University of Defense Technology Changsha China

ISBN: (纸本)9780769542072

Network emulation environment is great importance to the research of network protocols, applications and security mechanism. Large-scale network topology generation is one of key technologies to construct network emulation environment. In this paper, a new large-scale network topology generation framework called LSNTGF is proposed, which divides the network topology into three hierarchies: AS, router and terminal node. It contains the assignment mechanism to bandwidth of each link and IP address of each node. The framework is evaluate by implementation, and the result illustrate it is efficient to network emulation environment for network protocols and security research. © 2010 IEEE.

关键词： Network topology

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Versatile Stack Management for Multitasking Sensor Networks

Versatile Stack Management for Multitasking Sensor Networks

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IEEE International Conference on distributed Computing Systems

作者： Rui Chu Lin Gu Yunhao Liu Mo Li Xicheng Lu National Laboratory for Parallel and Distributed Processing National University of Defense Technology Department of Computer Science and Engineering Hong Kong University of Science and Technology

ISBN: (纸本)9781424472611;9780769540597

The networked application environment has motivated the development of multitasking operating systems for sensor networks and other low-power electronic devices, but their multitasking capability is severely limited because traditional stack management techniques perform poorly on small-memory systems. In this paper, we show that combining binary translation and a new kernel runtime can lead to efficient OS designs on resource-constrained platforms. We introduce SenSmart, a multitasking OS for sensor networks, and present new OS design techniques for supporting preemptive multi-task scheduling, memory isolation, and versatile stack management. We have implemented SenSmart on MICA2/MICAz motes. Evaluation shows that SenSmart performs efficient binary translation and demonstrates a significantly better capability in managing concurrent tasks than other sensornet operating systems.

关键词： parallel processing (COMPUTERS) Sensor networks Electron devices Furnace conveyors Cache Memory System Operating systems osmium

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The Composability Problem of Events and Threads in distributed Systems

The Composability Problem of Events and Threads in Distribut...

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2010 2nd International Conference on Education technology and Computer(第二届IEEE教育技术与计算机国际会议 ICETC 2010)

作者： Huiba Li Yuxing Peng Xicheng Lu National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha China 410073

ISBN: (纸本)9781424463671;9781424463688;9781424463701

Event-driven programming has been a relatively hot topic in distributed systems development. Having worked on these systems for years, we now believe that it is not the best choice. Besides the wellknown "stack ripping" problem, we argue that it greatly influences the composability of software modules. Preemptive threads are also short of composability because of data-races and locks. Lacking of composability can result in systems with little vitality. Cooperative threading (or coroutine), on the contrary, is almost free of this problem, so we advocate it as the primary concurrency model for most distributed systems.

关键词： distributed systems thread event composability

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Stigmergic Collaboration: A Sign-Based Perspective of Stigmergy

Stigmergic Collaboration: A Sign-Based Perspective of Stigme...

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2010 International Conference on Intelligent Computation technology and Automation(2010 智能计算技术与自动化国际会议 ICICTA 2010)

作者： Chuanjun Ren Hongbing Huang Shiyao Jin National Laboratory for Parallel & Distributed Processing College of Computer Science National University of Defense Technology Changsha 410073 China

ISBN: (纸本)9781424472796

Insects build architecturally complex nests and search for remote food by collaboration work despite their limited sensors, minimal individual intelligence and the lack of a central control system. Insets' collaborations emerge as a response of the individual insects to Stigmergy. A sign-based model of Stigmergy to discuss collaboration is proposed in this paper where we picked up "sign" as a key notion to understand it. Therefore, sign is the link of all the components in a Stigmergic complex adaptive system. Based on this understanding, we propose a definition that reveals the nature of signs and exploit the significations and relationships carried by the notion of sign. Then, a sign-based model of Stigmergy is consequently reached, which captures the essentials of Stigmergy. A basic architecture of Stigmergy as well as its constituents are presented and discussed. At last, some applications of the model are discussed.

关键词： Stigmergy Sign Emergence Collaboration CAS

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Notice of Retraction: parallel block multigrid preconditioner for 3D Navier-Stokes equations on unstructured grids

Notice of Retraction: Parallel block multigrid preconditione...

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International Conference on Computer Application and System Modeling (ICCASM)

作者： Zongzhe Li Lu Yao Wei Cao Yongxian Wang Zhenghua Wang School of Computer Science Parallel and Distributed Processing for National Laboratory National University of Defense Technology Changsha Hunan China

This article has been retracted by the publisher.

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Link Scheduling in Wireless Networks with Successive Interference Cancellation

Link Scheduling in Wireless Networks with Successive Interfe...

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International Conference on Mobile Ad-hoc and Sensor Networks, MSN

作者： Shaohe Lv Xiaodong Wang Xingming Zhou National Laboratory of Parallel and Distributed Processing National University of Defense Technology Changsha Hunan China

Successive interference cancellation (SIC) is an effective technique of multipacket reception to combat interference. As not all collision are resolvable, careful transmission coordination is required. We study link scheduling in wireless networks with SIC at the physical layer. A new model, simultaneity graph (SG), is proposed to characterize the link correlation introduced by SIC. Then two new scheduling schemes are presented: 1) a slot-oriented scheme which assigns a maximal feasible link set to a time slot and 2) a link-oriented scheme which assigns each link a sufficient number of slots. The performance is evaluated by simulations and the results demonstrate that the throughput gain is on average 50% and up to 110% over IEEE 802.11. The complexity of SG is only a bit higher than that of the available widely-used models (e.g., conflict graph).

关键词： Interference Optimal scheduling Silicon carbide Schedules Scheduling Receivers Measurement

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Scheduling under SINR Model in Ad Hoc Networks with Successive Interference Cancellation

Scheduling under SINR Model in Ad Hoc Networks with Successi...

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2010 IEEE Global Telecommunications Conference GLOBECOM 2010

作者： Shaohe Lv Xiaodong Wang Xingming Zhou National Laboratory of Parallel and Distributed Processing National University of Defense Technology Changsha Hunan China

Successive interference cancellation (SIC) is an effective way of multipacket reception to combat interference. We study link scheduling under SINR (Signal to Interference Noise Ratio) model in ad hoc networks with SIC at physical layer. The facts that interference is accumulated and the links decoded sequentially by SIC are correlated pose key technical challenges. We propose conflict set graph (CSG) to characterize the interference and define interference degree to measure the interference of a link. As scheduling over CSG is NP-hard, independent set based greedy scheme is explored to efficiently construct maximal feasible schedule. The performance is evaluated by simulations. As compared to the simple greedy method, the throughput gain is on average 30% and up to 60%.

关键词： Interference Silicon carbide Peer to peer computing Throughput Signal to noise ratio Wireless networks Transmitters

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Optimization and Implementation of LBM Benchmark on Multithreaded GPU

Optimization and Implementation of LBM Benchmark on Multithr...

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International Conference on Data Storage and Data Engineering (DSDE)

作者： Xiaoguang Ren Yuhua Tang Guibin Wang Tao Tang Xudong Fang National Laboratory of Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

ISBN: (纸本)9781424456789;9780769539584

With fast development of transistor technology, Graphic processing Unit(GPU) is increasingly used in the non-graphics applications, and major GPU hardware vendors have introduced software stacks for their own GPUs, such as Brook+ for AMD GPU. Compared with the traditional parallel systems, heterogeneous systems integerating stream-based multi-threaded GPUs provide higher parallel computing capabilities with lower cost. However, porting traditional applications to the heterogeneous systems makes new demand of application optimization on GPU. Based on the AMD's Brook+ platform, we explored application optimization features on AMD GPU by optimizing and implementing the benchmark LBM from SPEC2006. To improve the program locality, we optimized the original data layout of LBM. Using the short vector data types mechanism provided by Brook+, we also optimized the GPU's bandwidth utilization and its thread processors' efficiency. Through the branch elimination technique, we reduced the performance lose caused by branch divergences in the kernel, which is due to the GPU's SIMD executing mode. The experiment results show that data layout, memory bandwidth, branch paths and other factors have a close effect on the performance of program execution on the GPU. Through all the optimizations, we finally got a speedup of 22x (single-precision) and 19x (double-precision) over the original serial benchmark code on a Quad-core CPU, and a speedup of 4x (single-precision) and 8.7x (double-precision) over the original OMP benchmark code on a 8-core CPU.

关键词： Application software Graphics processing unit parallel processing Computer architecture Biomedical computing Computational fluid dynamics Computational modeling

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Evaluating the Performance and Accuracy Impact of Trace Generation to the BigSim Emulator

Evaluating the Performance and Accuracy Impact of Trace Gene...

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International Conference on Computer and Information technology (CIT)

作者： Yonggang Che Chuanfu Xu Pingjing Lu National Laboratory of Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

This paper quantitatively studies the trace effects to the performance and accuracy of the BigSim Emulator, a scalable parallel emulator for large-scale computers. To assess the accuracy effect we modify the emulator code to collect the predicted computation time. Four MPI programs with different computation to communication ratios are used as benchmarks. The emulation time and the predicted computation time, both when trace generation are enabled and disabled, are collected on two parallel host machines. The results show that although the BigSim Emulator only traces communication events and dependencies, trace generation still evidently degrades the emulation performance for programs with high communication to computation ratios. Trace generation also significantly affects the accuracy of the predicted computation time for communication intensive programs, which is an issue that can not be overlooked.

关键词： Emulation Accuracy Runtime Benchmark testing Program processors Predictive models Jacobian matrices

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A Case Study of SWIM: Optimization of Memory Intensive Application on GPGPU

A Case Study of SWIM: Optimization of Memory Intensive Appli...

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International Symposium on parallel Architectures, Algorithms and Programming (PAAP)

作者： Wei Yi Yuhua Tang Guibin Wang Xudong Fang National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

Recently, GPGPU has been adopted well in the High Performance Computing (HPC) field. The limited global memory bandwidth poses a great challenge to many GPGPU programmers trying to exploit parallelism within the CPU-GPU heterogeneous platform. In this paper, we choose SWIM, a typical memory intensive application from the SPEC OMP 2001 benchmark suite, for case study. We attempt to optimize the performance and energy consumption of the application utilizing different memory access mechanisms and present optimization methods including matrix transposition and kernel fusion. The experimental results on the Intel Core TM i920 CPU plus GeForce GTX 295 platform shows that, the proposed optimizing methods achieve a speedup of 8.7X over the original OpenMP program and reduce the energy consumption by 83% for the problem size of 2048*2048.

关键词： Instruction sets Kernel Bandwidth Graphics processing unit Memory management Energy consumption Central processing Unit

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