A 320–356GHz fixed-tuned frequency doubler is realized with discrete Schottky diodes mounted on 50μm thick quartz substrate. Influence of circuit channel width and thermal dissipation of the diode junctions are disc...
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A 320–356GHz fixed-tuned frequency doubler is realized with discrete Schottky diodes mounted on 50μm thick quartz substrate. Influence of circuit channel width and thermal dissipation of the diode junctions are discussed for high multiplying efficiency. The doubler circuit is flip-chip mounted on gold electroplated oxygenfree copper film for grounding of RF and DC signals, and better thermal transportation. The whole multiplying circuit is optimized and established in Computer simulation technology(CST) suite. The highest measured multiplying efficiency is 8.0% and its output power is 5.4mW at 328 GHz. The measured typical output power is 4.0mW in 320–356GHz.
InAlN/GaN heterojunction structures are grown on two-inch c-face(0001) sapphire substrates by metalorganic chemical vapour deposition. AlN and AlGaN interlayers are intentionally inserted into the structure to impro...
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InAlN/GaN heterojunction structures are grown on two-inch c-face(0001) sapphire substrates by metalorganic chemical vapour deposition. AlN and AlGaN interlayers are intentionally inserted into the structure to improve the electrical properties. The lowest sheet resistance of 359 Ω/sq and the highest room-temperature two-dimensional electron gas (2DEG) mobility of 1051 cm2 V-1s-1 is obtained in the structure with AlN thickness of 1.3 nm. The structure with AlN thickness of 2 nm exhibits the highest 2DEG concentration of 1.84×1013 cm-2. The sample with an AlGaN interlayer gives a smoother surface morphology compared to the one using an AlN interlayer, indicating potential applications of this technique in device fabrication.
An InGaAs/InP DHBT with an InGaAsP composite collector is designed and fabricated using triple mesa structural and planarization technology. All processes are on 3-inch wafers. The DHBT with an emitter area of 1×...
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An InGaAs/InP DHBT with an InGaAsP composite collector is designed and fabricated using triple mesa structural and planarization technology. All processes are on 3-inch wafers. The DHBT with an emitter area of 1×15 μm2 exhibits a current cutoff frequency ft = 170 GHz and a maximum oscillation frequency fmax = 256 GHz. The breakdown voltage is 8.3 V, which is to our knowledge the highest BVcEo ever reported for InGaAs/InP DHBTs in China with comparable high frequency performances. The high speed InGaAs/InP DHBTs with high breakdown voltage are promising for voltage-controlled oscillator and mixer applications at W band or even higher frequencies.
Design and characterization of a G-band(140–220 GHz) terahertz monolithicintegrated circuit(TMIC) amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm In Ga As/In P double heteroju...
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Design and characterization of a G-band(140–220 GHz) terahertz monolithicintegrated circuit(TMIC) amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm In Ga As/In P double heterojunction bipolar transistor(DHBT). An inverted microstrip line is implemented to avoid a parasitic mode between the ground plane and the In P substrate. The on-wafer measurement results show that peak gains are 20 dB at 140 GHz and more than 15-dB gain at 140–190 GHz respectively. The saturation output powers are-2.688 dBm at 210 GHz and-2.88 dBm at 220 GHz,respectively. It is the first report on an amplifier operating at the G-band based on 0.5-μm InP DHBT technology. Compared with the hybrid integrated circuit of vacuum electronic devices, the monolithicintegrated circuit has the advantage of reliability and consistency. This TMIC demonstrates the feasibility of the 0.5-μm InGaAs/InP DHBT amplifier in G-band frequencies applications.
A high performance 3 inch 0.5 μm InP DHBT technology with three interconnecting layers has been *** epitaxial layer structure and geometry parameters of the device were carefully studied to get the required *** 0.5 &...
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A high performance 3 inch 0.5 μm InP DHBT technology with three interconnecting layers has been *** epitaxial layer structure and geometry parameters of the device were carefully studied to get the required *** 0.5 × 5 μm^2 InP DHBTs demonstrated ft = 350 GHz,f(max) = 532 GHz and BV(CEO) = 4.8 V,which were modeled using Agilent-IIBT large signal *** a benchmark circuit,a dynamic frequency divider operating from 110 to 220 GHz has been designed,fabricated and measured with this *** ultra-high-speed 0.5 μm InP DHBT technology offers a combination of ultra-high-speed and high breakdown voltage,which makes it an ideal candidate for next generation 100 GHz+ mixed signal integratedcircuits.
Two different frequency bandwidth subharmonic mixers(SHM) using planar Schottky mixing diodes are discussed and ***-wave analysis is carried out to find the optimum diode embedding impedances with a lumped port for ...
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Two different frequency bandwidth subharmonic mixers(SHM) using planar Schottky mixing diodes are discussed and ***-wave analysis is carried out to find the optimum diode embedding impedances with a lumped port for modeling the nonlinear *** SHM circuit is divided into several different parts and each part is optimized using the calculated diode *** divided parts are then combined and optimized *** exported S-parameter files of the global circuit are used for conversion loss(CL) *** the 150 GHz SHM,the lowest measured CL is 10.7 dB at 153 GHz,and typical CL is 12.5 dB in the frequency range of 135-165 *** lowest measured CL of the 180 GHz SHM is 5.8 dB at 240 GHz,and typical CL is 13.5 dB and 11.5 dB in the frequency range of 165-200 GHz and 210-240 GHz,respectively.
Two broadband detectors at W-band and D-band are analyzed and designed with low barrier Schottky diodes. The input circuit of the detectors is realized by low and high impedance microstrip lines, and their output circ...
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Two broadband detectors at W-band and D-band are analyzed and designed with low barrier Schottky diodes. The input circuit of the detectors is realized by low and high impedance microstrip lines, and their output circuit is composed of a radio frequency (RF) bandstop filter and a tuning line for optimum reflection phase of the RF signal. S-parameters of the complete circuit are exported to a circuit simulator for voltage sensitivity analysis. For the W band detectors, the highest measured voltage sensitivity is 11800 mV/mW at 100 GHz, and the sensitivity is higher than 2000 mV/mW in 80-104 GHz. Measured tangential sensitivity (TSS) is higher than -38 dBm, and its linearity is superior than 0.99992 at 95 GHz. For the D band detector, the highest measured voltage sensitivity is 1600 mV/mW, and the typical sensitivity is 600 mV/mW in 110-170 GHz. TSS is higher than -29 dBm, and its linearity is superior than 0.99961 at 150 GHz.
W-band quartz based high output power fix-tuned doublers are analyzed and designed with planar Schot- tky diodes. Full-wave analysis is carried out to find diode embedding impedances with a lumped port to model the no...
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W-band quartz based high output power fix-tuned doublers are analyzed and designed with planar Schot- tky diodes. Full-wave analysis is carried out to find diode embedding impedances with a lumped port to model the nonlinear junction. Passive networks of the circuit, such as the low pass filter, the E-plane waveguide to strip transitions, input and output matching networks, and passive diode parts are analyzed by using electromagnetic simulators, and the different parts are then combined and optimized together. The exported S-parameters of the doubler circuit are used for multiply efficiency analysis. The highest measured output power is 29.5 mW at 80 GHz and higher than 15 mW in 76-94 GHz. The highest measured efficiency is 11.5% at 92.5 GHz, and the typical value is 6.0% in 70-100 GHz.
Ga- and N-polar AlGaN/GaN HEMTs were designed and epitaxially grown on Si- and C-face SiC substrates by MOCVD. The Capacitance-voltage characteristics of the two structures were investigated by C-V profile and drift-d...
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A 4H-SiC MOSFET with breakdown voltage higher than 3300 V has been successfully designed and fabricated. Numerical simulations have been performed to optimize the parameters of the drift layer and DMOSFET cell structu...
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A 4H-SiC MOSFET with breakdown voltage higher than 3300 V has been successfully designed and fabricated. Numerical simulations have been performed to optimize the parameters of the drift layer and DMOSFET cell structure of active area. The n-type epilayer is 33μm thick with a doping of 2.5 × 10^15 cm-3. The devices were fabricated with a floating guard ring edge termination. The drain current 1d= 5 A at Vg = 20 V, corresponding to vd = 2.5 v.
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