A two-port memory contains two similar ports, which can be accessed separately and independent of each other. In this paper, logical fault models are derived for the effect of shorts between the ports. The result is a...
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A two-port memory contains two similar ports, which can be accessed separately and independent of each other. In this paper, logical fault models are derived for the effect of shorts between the ports. The result is a set of new fault models, based on circuit simulation, together with a new test.
The LMS algorithm forms the core of a number of adaptive control schemes. It has on one hand provided certain degree of robustness to these algorithms but on the other hand its convergence rate is notoriously slow. We...
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The LMS algorithm forms the core of a number of adaptive control schemes. It has on one hand provided certain degree of robustness to these algorithms but on the other hand its convergence rate is notoriously slow. We propose a method to initialize the LMS algorithm which dramatically shortens its adaptation period. We also prove that under certain condition this initialization can be computed without explicit knowledge of either the reference or noise spectrum. Although the work is illustrated using the filtered-X scheme, this idea can also be applied to other similar schemes. Two successful experiments starting from black-box identification to real-time control have verified the effectiveness of this idea.
This paper presents the results of 44 well known memory tests applied to 1896 1M*4 DRAM chips, using up to 96 different stress combinations with each test. The results show the importance of selecting the right stress...
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This paper presents the results of 44 well known memory tests applied to 1896 1M*4 DRAM chips, using up to 96 different stress combinations with each test. The results show the importance of selecting the right stress combination, and that the theoretically better tests (i.e. those covering different functional faults) also have a higher fault coverage. However the currently used fault models still leave much to be explained; e.g., the used data backgrounds and address orders show an unexplainable large variation in fault coverage.
A supervised classification method using a self-organizing map (SOM) is proposed to classify remote sensing data. The SOM structure is composed of two layers. One is an input layer with nodes corresponding to spectral...
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A supervised classification method using a self-organizing map (SOM) is proposed to classify remote sensing data. The SOM structure is composed of two layers. One is an input layer with nodes corresponding to spectral bands. The other is an output layer with square array of nodes. First, a feature map on the output layer is generated by inputting training data into SOM. Each node in the feature map cannot be corresponding to a category because the number of nodes is generally greater than those of training data. Thus, a cluster map is generated by comparing differentials among weight vectors in nodes. Secondly, the training data is re-inputted into the cluster map to find the relationship between clusters and categories, that is, the cluster including a fired node is labeled as the category to which the training data belongs. In consequence of mapping, the category map is obtained from the feature map. The proposed classification method extracts liquefied area in Kobe (Japan) damaged by the 1995 Hyogoken Nanbu earthquake using the SPOT HRV data and the category map. As an experimental result, it is shown that classification accuracies of the proposed method are higher than those of the maximum likelihood and the backpropagation methods.
This paper proposes an efficient and convenient approach to frequency domain subspace identification for continuous-time systems. In the case of continuous-time models, the data matrices often become ill-conditioned i...
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This paper proposes an efficient and convenient approach to frequency domain subspace identification for continuous-time systems. In the case of continuous-time models, the data matrices often become ill-conditioned if we simply rewrite the Laplace operator s as s = jw where w denotes the frequency. To avoid the ill-conditioned problem, the operator w = ( s - b.α)/( s + b.α) is introduced such that the system can be identified based on a state-space model in the w -operator. And then the estimated w -operator state-space model can be transformed back to the common continuous-time state-space model. An instrumental variable matrix in the frequency domain is also proposed to obtain consistent estimate in the presence of measurement noise.
Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests have to be used. Many two-port memories have ports which are read-only or wri...
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Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests have to be used. Many two-port memories have ports which are read-only or write-only; this impacts the possible tests for single-port and two-port memories, as well as the test strategy. This paper discusses the consequences of the port restrictions (read-only or write-only ports) on the tests; in addition it covers the test strategy for address decoder faults in two-port memories.
Industry is facing a crisis in the design of complex hardware/software systems. Due to the increasing complexity, the gap between the generation of a product idea and the realisation of a working system is expanding r...
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Industry is facing a crisis in the design of complex hardware/software systems. Due to the increasing complexity, the gap between the generation of a product idea and the realisation of a working system is expanding rapidly. To manage complexity and to shorten design cycles, industry is forced to look at system level languages towards specification and design. We report on the system level modelling language called POOSL. The language is very expressive and is able to model dynamic hard real time behaviour as well as static (architecture and topology) structure in an object oriented fashion. The language integrates a process part, based on the process algebra CCS, with a data part, based on the concepts of traditional object oriented programming languages. Unlike many modelling languages today, POOSL is equipped with a complete mathematical semantics. Currently a number of automated software tools (model editing simulator and compiler tools) are available. It is shown how the language and tools allow the estimation of a performance parameter of a datalink protocol.
Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests to be used. Many two-port memories have ports which are read-only or write-on...
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Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests to be used. Many two-port memories have ports which are read-only or write-only; this impacts the possible fault models, the tests for single-port and two-port memories, as well as the test strategy. This paper presents a test strategy for two-port memories and covers the consequences of the port restrictions (read-only or write-only ports).
Most memory test algorithms are optimized tests for a particular memory technology, and a particular set of fault models, under the assumption that the memory is bit-oriented; i.e., read and write operations affect on...
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ISBN:
(纸本)9780818683596
Most memory test algorithms are optimized tests for a particular memory technology, and a particular set of fault models, under the assumption that the memory is bit-oriented; i.e., read and write operations affect only a single bit in the memory. Traditionally, word-oriented memories have been tested by repeated application of a test for bit-oriented memories whereby a different data background (which depends on the used intra-word fault model) is used during each iteration. This results in rime inefficiencies and limited fault coverage. A new approach for testing word-oriented memories is presented, distinguishing between inter-word and intra-word faults and allowing for a systematic way of converting tests for bit-oriented memories to rests for word-oriented memories. The conversion consists of concatenating the bit-oriented test for inter-word faults with a test for intra-word faults. This approach results in more efficient tests with complete coverage of the targeted faults. Because most memories have an external data path which is wider than one bit, word-oriented memory tests are very important.
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