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IEEE International Conference on Parallel and Distributed computing, Applications and Technologies (PDCAT)

作者： Mingyuan An Yang Wang Weiping Wang Ninghui Sun Chinese Academy of Sciences Beijing China Institute of Computing Technology Chinese Academy and Sciences Beijing China University of the Chinese Academy of Sciences Beijing Beijing CN Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

To obtain the efficiency of DBMS, HadoopDB combines Hadoop and DBMS, and claims the superiority over Hadoop in terms of performance. However, the approach of HadoopDB is simply putting Map Reduce onto unmodified single-machined DBMSs which has several obvious weaknesses. In essence, HadoopDB is a parallel DBMS with fault tolerance, which incurs unnecessary overhead due to the DBMS legacy. Instead of augmenting DBMS with Hadoop techniques, we propose a new system architecture integrating modified DBMS engines as a read-only execution layer into Hadoop, where DBMS plays a role of providing efficient read-only operators rather than managing the data. Besides the obtained efficiency from DBMS engine, there are other advantages. The modified DBMS engine is able to directly process data from the HDFS (Hadoop Distributed File system) files at the block level, which means that the data replication can be handled by HDFS naturally, and the block-level parallelism is easily achieved. The global index access mechanism is added according to the Map Reduce paradigm. The data loading speed is also guaranteed by directly writing the data into HDFS with simplified logic. Experiments show that our system outperforms both original Hadoop and HadoopDB styled system.

关键词： Engines Fault tolerance Fault tolerant systems Indexes Loading Parallel processing

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GVE: Godson-T Verification Engine for many-core architecture rapid prototyping and debugging

GVE: Godson-T Verification Engine for many-core architecture...

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IEEE International Conference on Field-Programmable technology (FPT)

作者： Zhengmeng Lei Lunkai Zhang Fenglong Song Shibin Tang Dongrui Fan Chinese Academy and Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Chinese Academy of Sciences Beijing Beijing CN

In this paper, we present a Godson-T Verification Engine (GVE) to rapidly prototype and debug our Godson-T many-core processor design. GVE adopts the state-of-the-art hardware platform which contains 6 Xilinx Virtex-5 LX330 FPGAs, thus permitting us to map our many-core processor and peripheral devices into it. Besides the hardware, our toolkit Godson-T Studio provides the compiler, program loader, debugger and monitor to fulfil the purpose of developing, profiling and debugging, while the accuracy loss problem is settled by our novel techniques: Check-point and ILA-Check, presented in this paper. To our experience, GVE greatly reduces the verification cycle due to its high execution speed, for example, it finishes thousands of testcases in an hour, where the software-based approach takes few days to run. And by the help of the checkpoint framework, we can easily locate the faults. Because of these features, GVE makes a great contribution to the 16-tile Godson-T tape-out Project.

关键词： Clocks Field programmable gate arrays Synchronization Registers Hardware Computer architecture Emulation

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Substantial Fault Pair At-a-Time (SFPAT): An Automatic Diagnostic Pattern Generation Method

Substantial Fault Pair At-a-Time (SFPAT): An Automatic Diagn...

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Asian Test Symposium (ATS)

作者： Jing Ye Xiaolin Zhang Yu Hu Xiaowei Li Chinese Academy and Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Chinese Academy of Sciences Beijing Beijing CN

Volume diagnosis plays an important role in the yield learning process. To get a high quality diagnosis result, patterns with high distinguish ability are essential. However, the test patterns used by volume diagnosis commonly have low distinguish ability to specific faults. In our experiments, we observe that on average, under automatic generated test patterns, faults in the same fan out free region (FFR) account for only 6% of all possible fault pairs, but their share in total indistinguishable faults is 70%, faults in different FFRs but with the same observation points account for 4% of all fault pairs, but their share in total indistinguishable faults is 22%. Exploiting this fact that faults in the same FFRs are harder to be distinguished, we propose an Automatic Diagnostic Pattern Generation (ADPG) method named Substantial Fault Pairs at-A-Time (SFPAT)-ADPG. By applying a transformed circuit and a new fault list to an existing Automatic Test Pattern Generation (ATPG) tool, we generate the compressed test patterns which are also the diagnostic patterns with high distinguish ability for the original circuit. Experiments on ISCAS'89 and ITC'99 benchmark circuits show the effectiveness of the proposed SFPAT-ADPG method.

关键词： Circuit faults Automatic test pattern generation Benchmark testing Logic gates Transforms Integrated circuit modeling

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Trusted connection system based on virtual machine architecture

Trusted connection system based on virtual machine architect...

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International Conference on Computer Science and Information technology (CSIT)

作者： Kai Zhang Ying Song Hai-feng Fang Yu-zhong Sun Chinese Academy and Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Chinese Academy of Sciences Beijing Beijing CN

With the rapid development of virtualization technology, virtual machine (VM) is widely used by cloud computing - the more and more popular computing paradigm. Thus, in order to guarantee the security of cloud computing, it is necessary to securely identify the kernel of VM, the software stack running on VM and the hardware platform which VM relies on. This paper designs a system of trusted connection based on virtual machine architecture and implements a system prototype. Our system not only can securely measure and identify the kernel of VM, the software stack running on VM and the hardware platform which VM relies on, but also can realize isolations to untrusted VMs. There are three main parts in our system: trusted chain, attestation and isolation. The experiments described in this paper prove that our system ensures trusted connection of VMs and achieves isolations to untrusted VMs. The performance of our system is also analyzed and evaluated. According to the analysis results, our system is practical in terms of performance.

关键词： Variable speed drives Scalability Isolators Clouds Fires

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Design of Low-Cost High-Performance Floating-Point Fused Multiply-Add with Reduced Power

Design of Low-Cost High-Performance Floating-Point Fused Mul...

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International Conference on VLSI Design

作者： Zichu Qi Qi Guo Ge Zhang Xiangku Li Weiwu Hu Chinese Academy and Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Chinese Academy of Sciences Beijing Beijing CN

ISBN: (纸本)9781424455416

This paper presents a floating-point fused multiply-add (FMA) unit with low-cost and low power techniques. To improve the performance, two single-precision operations can be performed concurrently with one double-precision datapath, which is very useful in multimedia and even scientific applications. Moreover, to reduce the additional area costs for supporting two single-precision operations in parallel, multiple double-precision units, i.e., the multiplier, shifter and adder, are reused as much as possible. A modified dual-path algorithm is proposed by classifying the exponent difference into three cases and implementing them with close and far paths, which can reduce latency and facilitate lowering power consumption by enabling only one of the two paths. In addition, in case of FADD instructions, the multiplier in the first stage is bypassed and kept in stable mode, which can significantly improve FADD instruction performance and lower power consumption. The overall FMA unit has a latency of 4 cycles while the FADD operation has 3 cycles. Each cycle has a time delay of about 0.66 ns in the ST 65 nm CMOS technology. Compared with the conventional double-precision FMA, about 13% delay is reduced and about 22% area is increased, which is acceptable since two single-precision results can be generated simultaneously.

关键词： Costs Energy consumption CMOS technology Hardware Throughput Very large scale integration Laboratories Computer architecture Delay effects Roundoff errors

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Adaptive Inference-based Learning and Rule Generation Algorithms in Fuzzy Neural Network for Failure Prediction

Adaptive Inference-based Learning and Rule Generation Algori...

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The 2010 International Conference on Intelligent systems and Knowledge Engineering(第五届智能系统与知识工程国际会议)

作者： Vahid Behbood Jie lu Guangquan Zhang Decision Systems & E-Service Intelligence Research Laboratory Center for Quantum Computing and Intelligent System School of Software Faculty of Engineering and Information Technology University of Technology Sydney Sydney POBOX123 Broadway NSW2007 Australia

Creating an applicable and precise failure prediction system is highly desirable for decision makers and regulators in the finance industry. This study develops a new Failure Prediction (FP) approach which effectively integrates a fuzzy logic-based adaptive inference system with the learning ability of a neural network to generate knowledge in the form of a fuzzy rule base. This FP approach uses a preprocessing phase to deal with the imbalanced data-sets problem and develops a new Fuzzy Neural Network (FNN) including an adaptive inference system in the learning algorithm along with its network structure and rule generation algorithm as a means to reduce prediction error in the FP approach.

关键词： Accuracy Inference algorithms Fuzzy neural networks Prediction algorithms Pragmatics Artificial neural networks Clustering algorithms

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Object rigidity and reflectivity identification based on motion analysis

Object rigidity and reflectivity identification based on mot...

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IEEE International Conference on Image Processing

作者： Di Zang Paul R. Schrater Katja Doerschner Department of Computer Science and Engineering University of Minnesota USA Key Laboratory of Embedded System and Service Computing Ministry of Education University of Tongji China National Research Center of Magnetic Resonance and Department of Psychology Bilkent University Turkey

Rigidity and reflectivity are important properties of objects, identifying these properties is a fundamental problem for many computer vision applications like motion and tracking. In this paper, we extend our previous work to propose a motion analysis based approach for detecting the object's rigidity and reflectivity. This approach consists of two steps. The first step aims to identify object rigidity based on motion estimation and optic flow matching. The second step is to classify specular rigid and diffuse rigid objects using structure from motion and Procrustes analysis. We show how rigid bodies can be detected without knowing any prior motion information by using a mutual information based matching method. In addition, we use a statistic way to set thresholds for rigidity classification. Presented results demonstrate that our approach can efficiently classify the rigidity and reflectivity of an object.

关键词： Optical imaging Adaptive optics Mutual information Shape Computer vision Integrated optics Object recognition

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Intelligent and cooperative manufacturing planning

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International Journal of Manufacturing Research 2010年第1期5卷 39-57页

作者： Li, Wei Dong Gao, Liang Faculty of Engineering and Computing Coventry University Coventry United Kingdom State Key Laboratory of Digital Manufacturing Equipment and Technology School of Mechanical Science and Engineering Huazhong University of Science and Technology Wuhan Hubei China Department of Industrial and Manufacturing System Engineering Huazhong University of Science and Technology China

In this research, several intelligent strategies have been developed to build up cooperative Process Planning and Scheduling (CPPS). Three game theory-based strategies have been introduced to analyse the cooperative integration of the two processes in a systematic way. To address the multiple constraints in the CPPS problem, a fuzzy logic-based Analytical Hierarchical Process (AHP) technique has been applied. In the meantime, modern heuristic algorithms have been developed and applied to the CPPS problem to identify optimal or near-optimal solutions from the vast search space efficiently. Experiments have been conducted and results show the objectives of the research have been achieved. Copyright © 2010 Inderscience Enterprises Ltd.

关键词： Heuristic algorithms

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A modified wind vector retrieval algorithm for polarimetric scatterometer

A modified wind vector retrieval algorithm for polarimetric ...

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IEEE International Symposium on Geoscience and Remote Sensing (IGARSS)

作者： Xuetong Xie Mingsen Lin Zhou Huang Juhong Zou Dongxuan Tian Lixia Liu Xiaoning Wang Shiwei Dong ATR State Key Laboratory National University of Defense Technology Changsha China National Satellite Ocean Application Service Beijing China Institute of Remote Sensing and Geographic Information System Peking University Beijing China Institute of Space Radio Technology National Key Laboratory of Space Microwave Technology Xi'an China

Experiments and theoretical analysis demonstrate that the polarimetric scatterometer has the potential in enhancing the accuracy of the wind vector retrieval. However, currently, there is no special wind vector retrieval algorithm for the polarimetric scatterometer. Based on the distribution characteristic of the objective function, a modified wind vector retrieval algorithm was designed for the conically scanning polarimetric scatterometer in this paper. Simulation experiments indicated that this algorithm could further improve the retrieval precision of the polarimetric scatterometer in comparison with the traditional algorithm, especially in the nadir- and outer-swath. By extending the wind direction range for the first and second ambiguity in the nadir- and outer-swath, the algorithm can effectively reduce the uncertainty of the wind direction solutions with error magnitude of 0° to 15°. Up to 2° improvement in wind direction retrieval can be achieved in the nadir track.

关键词： Radar measurements Spaceborne radar Wind speed Algorithm design and analysis Oceans Filtering algorithms Accuracy

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High performance comparison-based sorting algorithm on many-core GPUs

High performance comparison-based sorting algorithm on many-...

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International Symposium on Parallel and Distributed Processing (IPDPS)

作者： Xiaochun Ye Dongrui Fan Wei Lin Nan Yuan Paolo Ienne Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China School of Computer and Communication Sciences Ecole Polytechnique Fédérale de Lausanne Lausanne Switzerland

Sorting is a kernel algorithm for a wide range of applications. In this paper, we present a new algorithm, GPU-Warpsort, to perform comparison-based parallel sort on Graphics Processing Units (GPUs). It mainly consists of a bitonic sort followed by a merge sort. Our algorithm achieves high performance by efficiently mapping the sorting tasks to GPU architectures. Firstly, we take advantage of the synchronous execution of threads in a warp to eliminate the barriers in bitonic sorting network. We also provide sufficient homogeneous parallel operations for all the threads within a warp to avoid branch divergence. Furthermore, we implement the merge sort efficiently by assigning each warp independent pairs of sequences to be merged and by exploiting totally coalesced global memory accesses to eliminate the bandwidth bottleneck. Our experimental results indicate that GPU-Warpsort works well on different kinds of input distributions, and it achieves up to 30% higher performance than previous optimized comparison-based GPU sorting algorithm on input sequences with millions of elements.

关键词： Sorting High performance computing Bandwidth Parallel architectures Computer architecture Kernel Application software Multicore processing Graphics processing unit

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