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MT-profiler: A parallel dynamic analysis framework based on two-stage sampling 1

Lecture Notes in Computer Science

作者： Yu, Zhibin Zhang, Weifu Tu, Xuping Service Computing Technology and System Lab. School of Computer Science and Technology Huazhong University of Science and Technology Wuhan 430074 China

ISBN: (数字)9783642241512

ISBN: (纸本)9783642241505

Dynamic instrumentation systems offer a valuable solution for program profiling and analysis, architectural simulation, and bug detection. However, the performance of target programs suffers great losses when they are instrumented by these systems. This issue is mainly caused by the resource contention between the target programs and the instrumentation systems. As multi-core processors are becoming more and more prevalent in modern computing environments, more hardware resource parallelism is provided for software to exploit. In this paper, we propose to leverage the abundant computing resources of multi-core systems to accelerate program instrumentation. We design and implement a Multi-Threaded Profiling framework named MT-Profiler to dynamically characterize parallel programs. The framework creates instrumenting and analysis code slices which can run along with application threads in parallel on different cores. To further reduce the overhead of dynamic instrumentation, MT-profiler employs two-stage sampling scheme with several optimizations. It is implemented on DynamoRIO which is an open-source dynamic instrumentation and runtime code manipulation system. The performance of our MT-Profiler is evaluated by using the NPB3.3 OPENMP test suite. The results demonstrate that the MT-Profiler obtains 3 to 17 times speedup compared with the DynamoRIO perfect profiler while the average accuracy is over 80%. © 2011 Springer-Verlag.

关键词： Open source software

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Extended and improved slicing technologies for Petri nets

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High technology Letters 2013年第1期19卷 98-104页

作者： Yu, Wangyang Yan, Chungang Ding, Zhijun Fang, Xianwen Department of Computer Science and Technology Tongji University Shanghai 201804 China Key Lab. of Embedded System and Service Computing Ministry of Education Tongji University Shanghai 201804 China

Petri net is an important tool to model and analyze concurrent systems, but Petri net models are frequently large and complex, and difficult to understand and modify. Slicing is a technique to remove unnecessary parts with respect to a criterion for analyzing programs, and has been widely used in specification level for model reduction, but researches on slicing of Petri nets are still limited. According to the idea of program slicing, this paper extends slicing technologies of Petri nets to four kinds of slices, including backward static slice, backward dynamic slice, forward static slice and forward dynamic slice. Based on the structure properties, the algorithms of obtaining two kinds of static slice are constructed. Then, a new method of slicing backward dynamic slice is proposed based on local reachability graph which can locally reflect the dynamic properties of Petri nets. At last, forward dynamic slice can be obtained through the reachability marking graph under a special marking. The algorithms can be used to reduce the size of Petri net, which can provide the basic technical support for simplifying the complexity of formal verification and analysis. © by HIGH technology LETTERS PRESS.

关键词： Petri nets

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Modeling and monitoring of online shopping business processes based on system behavior patterns

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Journal of Computational Information systems 2013年第12期9卷 4691-4698页

作者： Yu, Wangyang Yan, Chungang Ding, Zhijun Zhong, Junzhu Department of Computer Science and Technology Tongji University Shanghai 201804 China Key Lab. of Embedded System and Service Computing Ministry of Education Tongji University Shanghai 201804 China

Online shopping integrating third-party payment platforms (TPPs) has rapidly developed recently. The integration leads to new security problems derived from complex interactions among Application Programming Interfaces (APIs), and the detection of such defects in application-level is costly and difficult. To deal with these security issues at the online stages, this paper presents a framework of modeling and monitoring online shopping business processes from the point of legal behavior patterns. We present Online Shopping Net (OSN) to model the normal business process, and make it as the legal behavior pattern used to monitor system behaviors. Then, a monitor based on OSN is constructed. The system behaviors beyond the legal behavior pattern would be alarmed and blocked. It is a novel attempt to guarantee the security of online shopping from the point of behaviors and online monitoring. Using the active defense tactics, we can effectively prevent the illegal behaviors of the users at application-level instead of constantly fixing bugs of applications. As a case study, we simulate an e-commerce site and a TPP, and the monitor can effectively prevent the malicious behaviors appearing recently. © 2013 by Binary Information Press.

关键词： Application programming interfaces (API)

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CDA-GNN: A Chain-driven Accelerator for Efficient Asynchronous Graph Neural Network 24

CDA-GNN: A Chain-driven Accelerator for Efficient Asynchrono...

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61st ACM/IEEE Design Automation Conference, DAC 2024

作者： Yu, Hui Zhang, Yu He, Ligang He, Donghao Li, Qikun Zhao, Jin Liao, Xiaofei Jin, Hai Gu, Lin Liu, Haikun National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology China Department of Computer Science University of Warwick United Kingdom

ISBN: (纸本)9798400706011

Asynchronous Graph Neural Network (AGNN) has attracted much research attention because it enables faster convergence speed than the synchronous GNN. However, existing software/hardware solutions suffer from redundant computation overhead and excessive off-chip communications for AGNN due to irregular state propagations along the dependency chains between vertices. This paper proposes a chain-driven asynchronous accelerator, CDA-GNN, for efficient AGNN inference. Specifically, CDA-GNN proposes a chain-driven asynchronous execution approach into novel accelerator design to regularize the vertex state propagations for fewer redundant computations and off-chip communications and also designs a chain-aware data caching method to improve data locality for AGNN. We have implemented and evaluated CDA-GNN on a Xilinx Alveo U280 FPGA card. Compared with the cutting-edge software solutions (i.e., Dorylus and AMP) and hardware solutions (i.e., BlockGNN and FlowGNN), CDA-GNN improves the performance of AGNN inference by an average of 1,173x, 182.4x, 10.2x, and 7.9x and saves energy by 2,241x, 242.2x, 12.4x, and 8.9x, respectively. © 2024 Copyright is held by the owner/author(s). Publication rights licensed to ACM.

关键词： Graph neural networks

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Description and verification of dynamic software architectures for distributed systems

Journal of Software

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Journal of Software 2010年第7期5卷 721-728页

作者： Xu, Hongzhen Zeng, Guosun Chen, Bo Department of computer Science and Technology Tongji University Shanghai 201804 China Department of Computer Science and Technology East China Institute of Technology Fuzhou Jiangxi Province 344000 China Embedded System and Service Computing Key Lab of Ministry of Education Shanghai 201804 China

Continuing growth and increasing complexity of distributed software systems make them be more flexible, adaptive and easily extensible. Dynamic evolution or reconfiguration of distributed software systems is one possible solution to meet these demands. However, there are some challenges for building dynamically evolving distributed software systems at runtime, where dynamic software architectures for them is one of the most crucial problems. In this paper, we proposed a formal method of describing and verifying dynamic software architectures for distributed systems using hypergraph grammars. We firstly gave out reconfiguration production rules and operations for software architectures based on hypergraph grammars, and then described dynamic reconfiguration of software architectures for distributed systems according to those rules. At last we verified the invariant property of dynamic software architectures for those systems using model checking, and gave out corresponding verification algorithms. © 2010 ACADEMY PUBLISHER.

关键词： Dynamic models

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Independent global constraints-aware web service composition optimization

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Information technology Journal 2009年第2期8卷 181-187页

作者： Fang, Xianwen Jiang, Changjun Fan, Xiaoqin Department of Computer Science and Technology Tongji University Shanghai 201804 China Key Lab of Embedded System and Service Computing Ministry of Education Shanghai 201804 China Department of Information and Computer Science Anhui University of Science and Technology Huainan Anhui 232001 China

In semi-automatic service composition, developers should construct the process model according to concrete application requirement and then the instance services are bound automatically for every abstract task and make the composite service with optimal performance. This study presents independent global constrains-aware Web service composition method based on associate Petri net (APN) and genetic algorithm (GA). Firstly, an APN modeling methods which can describe multi-attribute multi-constraint relations and associate relation between component services is proposed. Secondly, combining with the properties of APN, GA is used to search a legal firing sequence with the biggest trust value in the APN model and the composite service corresponding to the legal firing sequence is the optimal solution. Finally, the experimental simulation is given out. Theoretical analysis and experimental results indicate that this method owns both lower computation cost and higher success ratio of service composition. © 2009 Asian Network for Scientific Information.

关键词： Web services

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Behavior-aware Trustworthiness Study of Networked Software

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International Journal of Computational Intelligence systems 2010年第5期3卷 542-552页

The essence characteristics of software trustworthiness are software execution effect and behavior can be anticipated, which is an important index of software quality. Under the open and dynamic environments, some uncertainty factors cause the behavior of software to be uncontrolled, uncertainty and unpredictable. Behavior-aware networked software trustworthiness research methods are proposed in the paper. Firstly, we propose the analysis methods of the consistency between the inferred specification models with component specification model. Then, for analyzing the component interaction behavior, the behavior relativity analyzing method is presented based on Petri net. Finally, aimed to the outer factors, we analyze the behavioral congruence between theoretical composite models with dynamic behavior model based on running logs. Theoretical analysis and the example analysis indicated that this method is benefit to analyze the trustworthiness of networked software. © 2010, the authors.

关键词： consistency networked software Petri net software behavior trustworthiness

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Nightwatch: Integrating lightweight and transparent cache pollution control into dynamic memory allocation systems

Nightwatch: Integrating lightweight and transparent cache po...

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2015 USENIX Annual Technical Conference, USENIX ATC 2015

作者： Guo, Rentong Liao, Xiaofei Jin, Hai Yue, Jianhui Tan, Guang Service Computing Technology and System Lab School of Computer Science and Technology Huazhong University of Science and Technology China Auburn University United States SIAT Chinese Academy of Sciences China

ISBN: (纸本)9781931971225

Cache pollution, by which weak-locality data unduly replaces strong-locality data, may notably degrade application performance in a shared-cache multicore machine. This paper presents NightWatch, a cache management subsystem that provides general, transparent and lowoverhead pollution control to applications. NightWatch is based on the observation that data within the same memory chunk or chunks within the same allocation context often share similar locality property. NightWatch embodies this observation by online monitoring current cache locality to predict future behavior and restricting potential cache polluters proactively. We have integrated NightWatch into two popular allocators, tcmalloc and ptmalloc2. Experiments with SPEC CPU2006 show that NightWatch improves application performance by up to 45% (18% on average), with an average monitoring overhead of 0.57% (up to 3.02%). © 2015 USENIX Annual Technical Conference.

关键词： Cache memory

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RAHP: A Redundancy-aware Accelerator for High-performance Hypergraph Neural Network 57

RAHP: A Redundancy-aware Accelerator for High-performance Hy...

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57th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2024

作者： Yu, Hui Zhang, Yu He, Ligang Zhao, Yingqi Li, Xintao Xin, Ruida Zhao, Jin Liao, Xiaofei Liu, Haikun He, Bingsheng Jin, Hai School of Computer Science and Technology Huazhong University of Science and Technology Natl. Eng. Res. Ctr. for Big Data Technology and System Service Computing Technology and System Lab Cluster and Grid Computing Lab Wuhan430074 China University of Warwick Department of Computer Science United Kingdom National University of Singapore Singapore

ISBN: (纸本)9798350350579

Hypergraph Neural Network (HyperGNN) has emerged as a potent methodology for dissecting intricate multilateral connections among various entities. Current software/hardware solutions leverage a sequential execution model that relies on hyperedge and vertex indices for conducting standard matrix operations for HyperGNN inference. Yet, they are impeded by the dual challenges of redundant computation and irregular memory access overheads. This is primarily due to the frequent and repetitive access and updating of a number of feature vectors corresponding to the same hyperedges and vertices. To address these challenges, we propose the first redundancy-aware accelerator, RAHP, which enables high performance execution of HyperGNN inference. Specifically, we present a redundancy-aware asynchronous execution approach into the accelerator design for HyperGNN to reduce redundant computations and off-chip memory accesses. To unveil opportunities for data reuse and unlock the parallelism that existing HyperGNN solutions fail to capture, it prioritizes vertices with the highest degree as roots, prefetching other vertices along the hypergraph structure to capture the common vertices among multiple hyperedges, and synchronizing the computations of hyperedges and vertices in real-time. By such means, this facilitates the concurrent processing of relevant hyperedge and vertex computations of the common vertices along the hypergraph topology, resulting in smaller redundant computations overhead. Furthermore, by efficiently caching intermediate results of the common vertices, it curtails memory traffic and off-chip communications. To fully harness the performance potential of our proposed approach in the accelerator, RAHP incorporates a topology-driven data loading mechanism to minimize off-chip memory accesses on the fly. It is also endowed with an adaptive data synchronization scheme to mitigate the effects of conflicting updates of both hyperedges and vertices. Moreover, RAHP emplo

关键词： accelerator HyperGNN redundancy-aware

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Superpage-Friendly Page Table Design for Hybrid Memory systems 6th

Superpage-Friendly Page Table Design for Hybrid Memory Syste...

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6th International Conference of Pioneering Computer Scientists, Engineers and Educators, ICPCSEE 2020

作者： Wang, Xiaoyuan Liu, Haikun Liao, Xiaofei Jin, Hai National Engineering Research Center for Big Data Technology and System Huazhong University of Science and Technology Wuhan430074 China Service Computing Technology and System Lab Huazhong University of Science and Technology Wuhan430074 China Cluster and Grid Computing Lab Huazhong University of Science and Technology Wuhan430074 China School of Computer Science and Technology Huazhong University of Science and Technology Wuhan430074 China

ISBN: (纸本)9789811579806

Page migration has long been adopted in hybrid memory systems comprising dynamic random access memory (DRAM) and non-volatile memories (NVMs), to improve the system performance and energy efficiency. However, page migration introduces some side effects, such as more translation lookaside buffer (TLB) misses, breaking memory contiguity, and extra memory accesses due to page table updating. In this paper, we propose superpage-friendly page table called SuperPT to reduce the performance overhead of serving TLB misses. By leveraging a virtual hashed page table and a hybrid DRAM allocator, SuperPT performs address translations in a flexible and efficient way while still remaining the contiguity within the migrated pages. © 2020, Springer Nature Singapore Pte Ltd.

关键词： Energy efficiency

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