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RE-SEGNN:recurrent semantic evidence-aware graph neural network for temporal knowledge graph forecasting

Science China(Information Sciences) 2025年第2期68卷 103-119页

作者： Wenyu CAI Mengfan LI Xuanhua SHI Yuanxin FAN Quntao ZHU Hai JIN National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and Technology

Temporal knowledge graph(TKG) reasoning, has seen widespread use for modeling real-world events, particularly in extrapolation settings. Nevertheless, most previous studies are embedded models, which require both entity and relation embedding to make predictions, ignoring the semantic correlations among different entities and relations within the same timestamp. This can lead to random and nonsensical predictions when unseen entities or relations occur. Furthermore, many existing models exhibit limitations in handling highly correlated historical facts with extensive temporal depth. They often either overlook such facts or overly accentuate the relationships between recurring past occurrences and their current counterparts. Due to the dynamic nature of TKG, effectively capturing the evolving semantics between different timestamps can be *** address these shortcomings, we propose the recurrent semantic evidenceaware graph neural network(RE-SEGNN), a novel graph neural network that can learn the semantics of entities and relations simultaneously. For the former challenge, our model can predict a possible answer to missing quadruples based on semantics when facing unseen entities or relations. For the latter problem, based on an obvious established force, both the recency and frequency of semantic history tend to confer a higher reference value for the current. We use the Hawkes process to compute the semantic trend, which allows the semantics of recent facts to gain more attention than those of distant facts. Experimental results show that RE-SEGNN outperforms all SOTA models in entity prediction on 6 widely used datasets, and 5 datasets in relation prediction. Furthermore, the case study shows how our model can deal with unseen entities and relations.

关键词： knowledge graph reasoning temporal knowledge graph Hawkes process semantic evidence

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Cost-Effective Edge Data Caching with Failure Tolerance and Popularity Awareness

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IEEE Transactions on Mobile computing 2025年第06期24卷 5357-5369页

作者： Luo, Ruikun Zhang, Zujia He, Qiang Xu, Mengxi Chen, Feifei Dai, Xiaohai Wu, Song Jin, Hai Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology China Deakin University School of Information Technology GeelongVIC3125 Australia

In the mobile edge computing environment, caching data in edge storage systems can significantly reduce data retrieval latency for users while saving the costs incurred by cloud-edge data transmissions for app vendors. Existing edge data caching (EDC) methods prioritize popular data and aim to minimize users' data retrieval latency and system storage costs jointly. However, these EDC methods often rely on the assumption that data popularity always follows certain distributions. As a result, they cannot properly adapt to the fluctuations in data popularity due to user mobility or unexpected increases in user demands. Meanwhile, unlike cloud data centers, complex and fragile edge servers are more likely to experience physical failures or network outages, presenting new challenges for EDC strategies. Specifically, when an edge server fails or experiences an outage, cached data may become temporarily unavailable, leading to increased latency as requests are redirected to alternative servers or the cloud. In this paper, to enable uncertainty-aware edge data caching (uEDC), we first model the problem as a robust optimization problem and propose an optimal algorithm named uEDC-B to find the optimal uEDC solution. To address the high computational complexity of uEDC-B, we introduce an approximate algorithm named uEDC-L based on linear decision rules. Theoretical analysis and extensive experiments on a real-world dataset demonstrate that the proposed methods outperform two state-of-the-art approaches in handling the uncertainties in data popularity and edge server failure with a significant performance improvement of 59.27% in data retrieval latency and 55.07% in data caching cost. © 2002-2012 IEEE.

关键词： Mobile edge computing

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MetaHG: Enhancing HGNN systems Leveraging Advanced Metapath Graph Abstraction 25

MetaHG: Enhancing HGNN Systems Leveraging Advanced Metapath ...

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20th European Conference on Computer systems, EuroSys 2025, co-located 30th ACM International Conference on Architectural Support for Programming Languages and Operating systems, ASPLOS 2025

作者： He, Haiheng Liu, Haifeng Zheng, Long Huang, Yu Shen, Xinyang Huang, Wenkan Cao, Chuaihu Liao, Xiaofei Jin, Hai Xue, Jingling National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China School of Computer Science and Engineering University of New South Wales Australia

ISBN: (纸本)9798400711961

Heterogeneous Graph Neural Networks (HGNNs) are pivotal for extracting semantic and structural information from heterogeneous graphs. Traditional HGNN implementations often grapple with the challenges of excessive metapath instances, requiring substantial storage or incurring high instance-matching overhead. These methods typically suffer from redundant instance encoding and costly semantic graph construction. Addressing these issues, we introduce an advanced Metapath Graph (MG) abstraction that encapsulates the structural information of all metapath instances within a compact representation. This approach significantly reduces storage demands, eliminates redundant instance encodings, and foregoes the need for constructing semantic graphs, thereby facilitating rapid HGNN inference. Our software-based system, MetaHG, leverages layerwise encoding and aggregation to avoid redundancies without the necessity of semantic graphs. It incorporates a fast, lightweight partitioning method to efficiently manage large graphs. Distinctively, MetaHG seamlessly integrates with both dynamic HGNNs and homogeneous GNNs, unlike conventional systems. Comparative evaluations demonstrate that MetaHG surpasses the state-of-the-art BFS- and DFS-based HGNN systems, MAGNN and the software implementation of MetaNMP, by 42.5× and 4.53×, respectively, on average. © 2025 Copyright held by the owner/author(s).

关键词： Encoding (symbols)

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OHMiner: An Overlap-centric system for Efficient Hypergraph Pattern Mining 25

OHMiner: An Overlap-centric System for Efficient Hypergraph ...

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20th European Conference on Computer systems, EuroSys 2025, co-located 30th ACM International Conference on Architectural Support for Programming Languages and Operating systems, ASPLOS 2025

作者： Qi, Hao Luo, Kang He, Ligang Zhang, Yu Cai, Minzhi Dai, Jingxin He, Bingsheng Jin, Hai Zhang, Zhan Zhao, Jin Yue, Hengshan Yu, Hui Liao, Xiaofei National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology China Department of Computer Science University of Warwick United Kingdom National University of Singapore Singapore Zhejiang Lab China Jilin University China

ISBN: (纸本)9798400711961

Hypergraph Pattern Mining (HPM) aims to identify all the instances of user-interested subhypergraphs (patterns) in hypergraphs, which has been widely used in various applications. However, existing solutions either need significant enumeration overhead because they extend subhypergraphs at the granularity of vertices, or suffer from massive redundant computations because they often need to repeatedly fetch and process the same incident hyperedges for different vertices. This paper presents an overlap-centric system named OHMiner to efficiently support HPM. OHMiner proposes an overlap-centric execution model to determine the subhypergraphs isomorphism through computing and comparing overlaps among hyperedges using set operations. This model aims to efficiently handle the vertices that collectively share the same incident hyperedges. To automatically and precisely retrieve an arbitrary pattern’s overlapping semantics without performing redundant set computations, OHMiner further proposes a redundancy-free compiler, which constructs an Overlap Intersection Graph (OIG) for the pattern, optimizes the OIG, and generates an overlap-centric execution plan to guide the procedure of HPM. Moreover, OHMiner designs an overlap-centric parallel execution engine, which adopts an incremental overlap-pruned approach to fast validate candidates for HPM. Additionally, it proposes a degree-aware data store to support efficient generation of candidates. Through evaluating OHMiner on a broad range of real-world hypergraphs with various patterns, our experimental results show that OHMiner outperforms the state-of-the-art HPM system by 5.4×-22.2×. © 2025 Copyright held by the owner/author(s).

关键词： Compiler

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Ciphertext-Policy Attribute-Based Encryption with Short Keys

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Chinese Journal of Electronics 2025年第4期23卷 655-660页

作者： Peng Xu Yong Tang Wenbin Jiang Hai Jin Deqing Zou Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China

Ciphertext-policy attribute-based encryption (CP-ABE) allows a user with some attributes to decrypt the ciphertexts associated with these attributes. Though several CP-ABE schemes with the constant size ciphertext were proposed to reduce the communication cost, their master public and secret keys still have the size linear in the total number of attributes. These schemes are unpractical for the attribute-scalable and many-attributes scenario. A new CP-ABE scheme is proposed. Each attribute is mapped to a mathematical value by a combination method. The master public and secret keys of the proposed CP-ABE scheme have the size linear in the binary size of a hash function's range. It has the comparable performance with existing schemes in the aspects like the time costs of encryption and decryption, the expressiveness of access policy and the provable security.

关键词： Costs Encryption

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AccelES: Accelerating Top-K SpMV for Embedding Similarity via Low-bit Pruning 31

AccelES: Accelerating Top-K SpMV for Embedding Similarity vi...

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31st IEEE International Symposium on High Performance Computer Architecture, HPCA 2025

作者： Zhai, Jiaqi Shi, Xuanhua Huang, Kaiyi Ye, Chencheng Hu, Weifang He, Bingsheng Jin, Hai Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Wuhan430074 China National University of Singapore School of Computing 119077 Singapore

ISBN: (纸本)9798331506476

In the realm of recommendation systems, achieving real-time performance in embedding similarity tasks is often hindered by the limitations of traditional Top-K sparse matrix-vector multiplication (SpMV) methods, which suffer from high latency due to inefficient memory access patterns. This paper identifies these critical gaps and introduces AccelES, a novel approach that significantly enhances the efficiency of Top-K SpMV. Our method employs a two-stage calculation scheme: the first stage utilizes a compact, low-bit dataset to quickly identify the most relevant entries, while the second stage performs full-precision calculations solely on this pruned subset, thereby minimizing computational overhead. Furthermore, AccelES incorporates innovative matrix representations, Ultra-CSR and Random-CSR, which optimize memory bandwidth utilization. Experimental results demonstrate that AccelES accelerates performance, surpassing state-of-the-art FPGA, GPU, and CPU solutions by factors of 3.4×, 2.5×, and 153.3×, respectively, under controlled conditions. These advancements not only enhance processing speed but also significantly improve real-time performance in recommendation systems, establishing AccelES as a pivotal contribution to the field of Top-K sparse matrix-vector multiplication. © 2025 IEEE.

关键词： Embeddings

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FFCI: A Camera and IMU Sensors Based Multi-modal Neural Network for Activity Recognition in Smart Factory

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IEEE Transactions on Consumer Electronics 2025年

作者： Wang, Yujue Niu, Xin Lv, Xianwei Yu, Chen Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Wuhan430074 China

Worker activity recognition is an important aspect of the construction of smart factory. The development of deep neural networks and the widespread distribution of sensors in the smart factory have brought opportunities for the recognition of workers' activities. The existing methods based on camera and IMU sensors respectively have problems of visual occlusion and difficulty in recognition of similar activities, which result in the reduction of recognition accuracy. Therefore, we propose a feature-level fusion based on camera and IMU sensor (FFCI) for activity recognition in smart factory. The FFCI employs an optimized multi-modal fusion strategy to integrate the visual information and the action information of workers' activities. In order to verify the effectiveness of FFCI, we define a simple yet fine-grained assembly task and collect six common operations. Furthermore, we add visual occlusion and similar activity data to get closer to the smart factory. Finally, we evaluate the FFCI on the collected dataset and achieve a recognition accuracy of 98.17%, demonstrating its effectiveness in accurately classifying workers' activities. © 1975-2011 IEEE.

关键词： Factory automation

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Seer: Accelerating Block chain Transaction Execution by Fine-Grained Branch Prediction 51st

Seer: Accelerating Block chain Transaction Execution by Fine...

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51st International Conference on Very Large Data Bases, VLDB 2025

作者： Zhang, Shijie Cheng, Ru Liu, Xinpeng Xiao, Jiang Jin, Hai Li, Bo National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan430074 China Department of Computer Science and Engineering Hong Kong University of Science and Technology Hong Kong

Increasingly popular decentralized applications (dApps) with complex application logic incur significant overhead for executing smart contract transactions, which greatly limits public block chain performance. Pre-executing transactions off the critical path can mitigate substantial I/O and computation costs during execution. However, pre-execution does not yield any state transitions, rendering the system state inconsistent with actual execution. This inconsistency can lead to deviations in pre-execution paths when processing smart contracts with multiple state-related branches, thus diminishing pre-execution effectiveness. In this paper, we develop Seer, a novel public block chain execution engine that incorporates fine-grained branch prediction to fully exploit pre-execution effectiveness. Seerpredicts state-related branches using a two-level prediction approach, reducing inconsistent execution paths more efficiently than executing all possible branches. To enable effective reuse of pre execution results, Seer employs checkpoint-based fast-path execution, enhancing transaction execution for both successful and unsuccessful predictions. Evaluations with realistic block chain workloads demonstrate that Seer delivers an average of 27.7× transaction-level speedup and an overall 20.6× speedup in the execution phase over vanilla Ethereum, outperforming existing block chain execution acceleration solutions. © 2025, VLDB Endowment, All rights reserved.

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MeG2: In-Memory Acceleration for Genome Graphs Analysis 23

MeG2: In-Memory Acceleration for Genome Graphs Analysis

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Proceedings of the 60th Annual ACM/IEEE Design Automation Conference

作者： Yu Huang Long Zheng Haifeng Liu Zhuoran Zhou Dan Chen Pengcheng Yao Qinggang Wang Xiaofei Liao Hai Jin National Engineering Research Center for Big Data Technology and System/Services Computing Technology and System Lab/Cluster and Grid Computing Laboratory Huazhong University of Science and Technology Wuhan China and Zhejiang Lab Hangzhou China National Engineering Research Center for Big Data Technology and System/Services Computing Technology and System Lab/Cluster and Grid Computing Laboratory Huazhong University of Science and Technology Wuhan China

ISBN: (纸本)9798350323481

Genome graphs analysis has emerged as an effective means to enable mapping DNA fragments (known as reads) to the reference genome. It replaces the traditional linear reference with a graph-based representation to augment the genetic variations and diversity information, significantly improving the quality of genotyping. The in-depth characterization of genome graphs analysis uncovers that it is bottlenecked by the irregular seed index access and the intensive alignment operation, stressing both the memory system and computing *** on these observations, we propose MeG2, a lightweight, commodity DRAM-compliant, processing-in-memory architecture to accelerate genome graphs analysis. MeG2 is specifically integrated with the capabilities of both near-memory processing and bitwise in-situ computation. Specifically, MeG2 leverages the low access latency of near-memory processing with the index-centric offload mechanism to alleviate the irregular memory access in the seeding procedure, and harnesses the row-parallel capacity of in-situ computation with the distance-aware technique to exploit the intensive computational parallelism in the alignment process. Results show that MeG2 outperforms the CPU-, GPU-, and ASIC-based genome graphs analysis solutions by 502× (30.2×), 272× (15.1×), and 5.5× (8.3×) for short (long) reads, while reducing energy consumption by 1628× (85.6×), 1443× (77.1×), and 7.8× (11.7×), respectively. We also demonstrate that MeG2 offers significant improvements over existing PIM-based genome sequence analysis accelerators.

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Proceedings of the 60th Annual ACM/IEEE Design Automation Conference

作者： Jin Zhao Yu Zhang Jian Cheng Yiyang Wu Chuyue Ye Hui Yu Zhiying Huang Hai Jin Xiaofei Liao Lin Gu Haikun Liu National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab Huazhong University of Science and Technology Wuhan China and Zhejiang-HUST Joint Research Center for Graph Processing Zhejiang Lab Hangzhou China National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab Huazhong University of Science and Technology Wuhan China

ISBN: (纸本)9798350323481

Temporal graph processing is used to handle the snapshots of the temporal graph, which concerns changes in graph over time. Although several software/hardware solutions have been designed for efficient temporal graph processing, they still suffer from serious irregular data access due to the uncoordinated graph traversal. To overcome these limitations, this paper proposes SaGraph, a domain-specific hardware accelerator to support the efficient processing of temporal graph. Specifically, temporal graph processing shows strong data access similarity, i.e., most graph accesses of the processing of different snapshots are the same and usually refer to a small fraction of vertices. SaGraph can dynamically coordinate the graph traversals and adaptively cache the vertex states to fully exploit the data access similarity for smaller data access overhead. We implemented and evaluated SaGraph on a Xilinx Alveo U280 FPGA card. Compared with the cutting-edge software and hardware solutions, SaGraph achieves 8.5×-157.3×, 4.2×-16.1× speedups and 34.7×-423.6×, 5.3×-14.7× energy savings, respectively.

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