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SATO: Straighten Any 3D Tubular Object

IEEE Transactions on Medical Imaging 2025年

作者： Zhou, Yanfeng Zhou, Jiaheng Wang, Zichen Yang, Ge Shenzhen University School of Artificial Intelligence Shenzhen 518060 China Shenzhen University National Engineering Laboratory for Big Data System Computing Technology Shenzhen 518060 China Medical UltraSound Image Computing Lab Shenzhen 518060 China University of Chinese Academy of Sciences School of Artificial Intelligence Beijing China Chinese Academy of Sciences Institute of Automation Beijing China

3D tubular objects have complex spatial shapes. Direct volume visualization cannot intuitively display their morphological characteristics and surface abnormalities. Straightening reformation is an effective visualization method for tubular objects. It uses a swept frame to sample cross sections along the centerline of the tubular object to generate straightening result. So far, however, current methods cannot visualize the full 3D view and fail to interface with downstream morphological analysis. Furthermore, current swept frames impose strict restrictions on the shape of tubular objects and are computationally expensive. In this study, we propose a novel swept frame based on vector rotation and construct an automatic straightening reformation pipeline. Our method is applicable to various tubular objects and can be efficiently executed recursively while ensuring that the straightening results have no rotation bias. Extensive experiments on eight different tubular objects and quantitative evaluation on various downstream applications demonstrate the effectiveness and universality of our straightening pipeline. © 1982-2012 IEEE.

关键词： curved planar reformation Straighten swept frame tubular object visualization

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TCSloT: Text Guided 3D Context and Slope Aware Triple Network for Dental Implant Position Prediction

TCSloT: Text Guided 3D Context and Slope Aware Triple Networ...

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IEEE International Conference on Bioinformatics and Biomedicine (BIBM)

作者： Xinquan Yang Jinheng Xie Xuechen Li Xuguang Li Linlin Shen Yongqiang Deng College of Computer Science and Software Engineering Shenzhen University Shenzhen China Show Lab National University of Singapore Singapore National Engineering Laboratory for Big Data System Computing Technology Shenzhen University Shenzhen China Department of Stomatology Shenzhen University General Hospital Shenzhen China

In implant prosthesis treatment, the surgical guide of implant is used to ensure accurate implantation. However, such design heavily relies on the manual location of the implant position. When deep neural network has been proposed to assist the dentist in locating the implant position, most of them take a single slice as input, which do not fully explore 3D contextual information and ignores the influence of implant slope. In this paper, we design a Text Guided 3D Context and Slope Aware Triple Network (TCSloT) to integrate the perception of contextual information from multiple adjacent slices and awareness of variation of implant slopes. A Texture Variation Perception (TVP) module is correspondingly design to process the multiple slices and capture the texture variation among slices and a Slope-Aware Loss (SAL) is proposed to dynamically assign adaptive weights for the regression head. Additionally, we design a conditional text guidance (CTG) module to integrate the text condition (i.e., left, middle and right) from the CLIP to assist the implant position prediction. Extensive experiments on a dental implant dataset through five-fold cross-validation, demonstrated that the proposed TCSloT achieves superior performance than existing methods.

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Optimizing non-coalesced memory access for irregular applications with GPU computing

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Frontiers of Information technology & Electronic Engineering 2020年第9期21卷 1285-1301页

作者： Ran ZHENG Yuan-dong LIU Hai JIN National Engineering Research Center for Big Data Technology and System Huazhong University of Science and TechnologyWuhan 430074China Services Computing Technology and System Lab Huazhong University of Science and TechnologyWuhan 430074China Cluster and Grid Computing Lab Huazhong University of Science and TechnologyWuhan 430074China School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China

General purpose graphics processing units(GPGPUs)can be used to improve computing performance considerably for regular ***,irregular memory access exists in many applications,and the benefits of graphics processing units(GPUs)are less substantial for irregular *** recent years,several studies have presented some solutions to remove static irregular memory ***,eliminating dynamic irregular memory access with software remains a serious challenge.A pure software solution without hardware extensions or offline profiling is proposed to eliminate dynamic irregular memory access,especially for indirect memory *** reordering and index redirection are suggested to reduce the number of memory transactions,thereby improving the performance of GPU *** improve the efficiency of data reordering,an operation to reorder data is offloaded to a GPU to reduce overhead and thus transfer *** concurrently executing the compute unified device architecture(CUDA)streams of data reordering and the data processing kernel,the overhead of data reordering can be *** these optimizations,the volume of memory transactions can be reduced by 16.7%-50%compared with CUSPARSE-based benchmarks,and the performance of irregular kernels can be improved by 9.64%-34.9%using an NVIDIA Tesla P4 GPU.

关键词： General purpose graphics processing units Memory coalescing Non-coalesced memory access data reordering

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iGniter: Interference-Aware GPU Resource Provisioning for Predictable DNN Inference in the Cloud

arXiv

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arXiv 2022年

作者： Xu, Fei Xu, Jianian Chen, Jiabin Chen, Li Shang, Ruitao Zhou, Zhi Liu, Fangming The Shanghai Key Laboratory of Multidimensional Information Processing School of Computer Science and Technology East China Normal University 3663 N. Zhongshan Road Shanghai200062 China The School of Computing and Informatics University of Louisiana at Lafayette 301 East Lewis Street LafayetteLA70504 United States The Guangdong Key Laboratory of Big Data Analysis and Processing School of Computer Science and Engineering Sun Yat-sen University 132 E. Waihuan Road Guangzhou510006 China The National Engineering Research Center for Big Data Technology and System The Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology 1037 Luoyu Road Wuhan430074 China

GPUs are essential to accelerating the latency-sensitive deep neural network (DNN) inference workloads in cloud datacenters. To fully utilize GPU resources, spatial sharing of GPUs among co-located DNN inference workloads becomes increasingly compelling. However, GPU sharing inevitably brings severe performance interference among co-located inference workloads, as motivated by an empirical measurement study of DNN inference on EC2 GPU instances. While existing works on guaranteeing inference performance service level objectives (SLOs) focus on either temporal sharing of GPUs or reactive GPU resource scaling and inference migration techniques, how to proactively mitigate such severe performance interference has received comparatively little attention. In this paper, we propose iGniter, an interference-aware GPU resource provisioning framework for cost-efficiently achieving predictable DNN inference in the cloud. iGniter is comprised of two key components: (1) a lightweight DNN inference performance model, which leverages the system and workload metrics that are practically accessible to capture the performance interference;(2) A cost-efficient GPU resource provisioning strategy that jointly optimizes the GPU resource allocation and adaptive batching based on our inference performance model, with the aim of achieving predictable performance of DNN inference workloads. We implement a prototype of iGniter based on the NVIDIA Triton inference server hosted on EC2 GPU instances. Extensive prototype experiments on four representative DNN models and datasets demonstrate that iGniter can guarantee the performance SLOs of DNN inference workloads with practically acceptable runtime overhead, while saving the monetary cost by up to 25% in comparison to the state-of-the-art GPU resource provisioning strategies. Copyright © 2022, The Authors. All rights reserved.

关键词： Deep neural networks

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Hardware-Based Address-Centric Acceleration of Key-Value Store

Hardware-Based Address-Centric Acceleration of Key-Value Sto...

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IEEE Symposium on High-Performance Computer Architecture

作者： Chencheng Ye Yuanchao Xu Xipeng Shen Xiaofei Liao Hai Jin Yan Solihin National Engineering Research Center for Big Data Technology and System/Services Computing Technology and System Lab/Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China North Carolina State University Raleigh North Carolina USA Computer Science University of Central Florida Florida USA

Efficiently retrieving data is essential for key-value store applications. A major part of the retrieving time is on data addressing, that is, finding the location of the value in memory that corresponds to a key. This paper introduces an address-centric approach to speed up the addressing by creating a shortcut for the translation of a key to the physical address of the value. The new technique is materialized with a novel in-memory table, STLT, a virtual-physical address buffer, and two new instructions. It creates a fast path for data addressing and meanwhile opens up opportunities for the use of simpler and faster hash tables to strike a better tradeoff between hashing conflicts and hashing overhead. Together, the new technique brings up to 1.4× speedups on key-value store application Redis and up to 13× speedups on some widely used indexing data structures, consistently outperforming prior solutions significantly.

关键词： Production data structures Acceleration Indexing

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Continual learning via inter-task synaptic mapping

arXiv

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arXiv 2021年

作者： Fubing, Mao Weiwei, Weng Pratama, Mahardhika Kien Yee, Edward Yapp National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab. Cluster and Grid Computing Lab. School of Computer Science and Technology Huazhong University of Science and Technology Wuhan430074 China School of Computer Science and Engineering Nanyang Technological University Singapore Singapore Singapore Institute of Manufacturing Technology A*Star Singapore Singapore

Learning from streaming tasks leads a model to catastrophically erase unique experiences it absorbs from previous episodes. While regularization techniques such as LWF, SI, EWC have proven themselves as an effective avenue to overcome this issue by constraining important parameters of old tasks from changing when accepting new concepts, these approaches do not exploit common information of each task which can be shared to existing neurons. As a result, they do not scale well to large-scale problems since the parameter importance variables quickly explode. An Inter-Task Synaptic Mapping (ISYANA) is proposed here to underpin knowledge retention for continual learning. ISYANA combines task-to-neuron relationship as well as concept-to-concept relationship such that it prevents a neuron to embrace distinct concepts while merely accepting relevant concept. Numerical study in the benchmark continual learning problems has been carried out followed by comparison against prominent continual learning algorithms. ISYANA exhibits competitive performance compared to state of the arts. Codes of ISYANA is made available in https://***/ContinualAL/ISYANAKBS. © 2021, CC BY-NC-SA.

关键词： Neurons

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Superpage-Friendly Page Table Design for Hybrid Memory systems 6th

Superpage-Friendly Page Table Design for Hybrid Memory Syste...

引用

6th International Conference of Pioneering Computer Scientists, Engineers and Educators, ICPCSEE 2020

作者： Wang, Xiaoyuan Liu, Haikun Liao, Xiaofei Jin, Hai National Engineering Research Center for Big Data Technology and System Huazhong University of Science and Technology Wuhan430074 China Service Computing Technology and System Lab Huazhong University of Science and Technology Wuhan430074 China Cluster and Grid Computing Lab Huazhong University of Science and Technology Wuhan430074 China School of Computer Science and Technology Huazhong University of Science and Technology Wuhan430074 China

ISBN: (纸本)9789811579806

Page migration has long been adopted in hybrid memory systems comprising dynamic random access memory (DRAM) and non-volatile memories (NVMs), to improve the system performance and energy efficiency. However, page migration introduces some side effects, such as more translation lookaside buffer (TLB) misses, breaking memory contiguity, and extra memory accesses due to page table updating. In this paper, we propose superpage-friendly page table called SuperPT to reduce the performance overhead of serving TLB misses. By leveraging a virtual hashed page table and a hybrid DRAM allocator, SuperPT performs address translations in a flexible and efficient way while still remaining the contiguity within the migrated pages. © 2020, Springer Nature Singapore Pte Ltd.

关键词： Energy efficiency

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GradSA: Gradient Sparsification and Accumulation for Communication-Efficient Distributed Deep Learning 15th

GradSA: Gradient Sparsification and Accumulation for Communi...

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15th International Conference on Green, Pervasive, and Cloud computing, GPC 2020

作者： Liu, Bo Jiang, Wenbin Zhao, Shaofeng Jin, Hai He, Bingsheng National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Lab Cluster and Grid Computing Lab Huazhong University of Science and Technology Wuhan China Wuhan National Laboratory for Optoelectronics Key Laboratory of Information Storage System Engineering Research Center of Data Storage Systems and Technology Huazhong University of Science and Technology Wuhan China Library Henan University of Economics and Law Zhengzhou China Department of Computer Science School of Computing National University of Singapore Singapore Singapore

ISBN: (纸本)9783030642426

Large-scale distributed deep learning is of great importance in various applications. For distributed training, the inter-node gradient communication often becomes the performance bottleneck. Gradient sparsification has been proposed to reduce the communication overhead. However, the sparsification only arbitrarily selects a small fraction of gradients, while the efficiency of selection dimension has been overlooked. Furthermore, gradient staleness is inevitable after applying the sparsification which will ultimately lead to model divergence. In this paper, we propose a staleness-compensated sparse stochastic gradient descent algorithm, GradSA, to improve the training efficiency. Layer-level gradients are sparsified to reduce the communication overhead, which conform to the characteristics of the network structure, and historical accumulation of the approximated gradients is utilized to speed up convergence. We demonstrate the model convergence acceleration and the efficiency of our layer-level selection over existing state-of-the-art works, such as DGC, TernGrad, and 8-Bit quantization. © 2020, Springer Nature Switzerland AG.

关键词： Efficiency

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Clairvoyance: Intelligent route planning for electric buses based on urban big data

arXiv

引用

arXiv 2021年

作者： Lu, Xiangyong Ota, Kaoru Dong, Mianxiong Yu, Chen Jin, Hai Graduate School of Information Sciences Tohoku University Sendai Japan Serviecs Computing Technology and System Lab Big Data Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan430074 China Department of Information and Electronic Engineering Muroran Institute of Technology Hokkaido Muroran Japan

Nowadays many cities around the world have introduced electric buses to optimize urban traffic and reduce the local carbon emissions. In order to cut the carbon emissions and maximize the utility of electric buses, it is important to choose suitable routes for them. Traditionally, route selection is on the basis of dedicated surveys, which are costly in time and labor. In this paper, we mainly focus attention on planning electric bus routes intelligently, depending on the unique needs of each region throughout the city. We propose Clairvoyance, a route planning system that leverages a deep neural network and a multilayer perceptron to predict the future people’s trips and the future transportation carbon emission in the whole city, respectively. Given the future information of people’s trips and transportation carbon emission, we utilize a greedy mechanism to recommend bus routes for electric buses that will depart in an ideal state. Furthermore, representative features of the two neural networks are extracted from the heterogeneous urban datasets. We evaluate our approach through extensive experiments on the real-world data sources in Zhuhai, China. The results show that our designed neural network-based algorithms are consistently superior to the typical baselines. Additionally, the recommended routes for electric buses are helpful in reducing the peak value of carbon emissions and making full use of electric buses in the city. Copyright © 2021, The Authors. All rights reserved.

关键词： Multilayer neural networks

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Why Do Developers Remove Lambda Expressions in Java? 21

Why Do Developers Remove Lambda Expressions in Java?

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IEEE International Conference on Automated Software Engineering (ASE)

作者： Mingwei Zheng Jun Yang Ming Wen Hengcheng Zhu Yepang Liu Hai Jin Hubei Engineering Research Center on Big Data Security School of Cyber Science and Engineering Huazhong University of Science and Technology Wuhan China National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Huazhong University of Science and Technology Wuhan China School of Electronic Information and Communications Huazhong University of Science and Technology Wuhan China The Hong Kong University of Science and Technology Hong Kong China Southern University of Science and Technology Shenzhen China Cluster and Grid Computing Lab School of Computer Science and Technology HUST Wuhan China

ISBN: (纸本)9781665447843

Java 8 has introduced lambda expressions, a core feature of functional programming. Since its introduction, there is an increasing trend of lambda adoptions in Java projects. Developers often adopt lambda expressions to simplify code, avoid code duplication or simulate other functional features. However, we observe that lambda expressions can also incur different types of side effects (i.e., performance issues and memory leakages) or even severe bugs, and developers also frequently remove lambda expressions in their implementations. Consequently, the advantages of utilizing lambda expressions can be significantly compromised by the collateral side effects. In this study, we present the first large-scale, quantitative and qualitative empirical study to characterize and understand inappropriate usages of lambda expressions. Particularly, we summarized seven main reasons for the removal of lambdas as well as seven common migration patterns. For instance, we observe that lambdas using customized functional interfaces are more likely to be removed by developers. Moreover, from a complementary perspective, we performed a user study over 30 developers to seek the underlying reasons why they remove lambda expressions in practice. Finally, based on our empirical results, we made suggestions on scenarios to avoid lambda usages for Java developers and also pointed out future directions for researchers.

关键词： Java Codes Computer bugs Market research Functional programming Open source software Software engineering

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