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34th ACM Web Conference, WWW 2025

作者： Gui, Yi Wan, Yao Li, Zhen Zhang, Zhongyi Chen, Dongping Zhang, Hongyu Su, Yi Chen, Bohua Zhou, Xing Jiang, Wenbin Zhang, Xiangliang Huazhong University of Science and Technology Wuhan China Chongqing University Chongqing China Hubei University of Automotive Technology Shiyan China Rabbitpre AI Shenzhen China University of Notre Dame Notre Dame United States National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster Grid Computing Lab School of Computer Science and Technology China

ISBN: (纸本)9798400712746

Automating the synthesis of User Interfaces (UIs) plays a crucial role in enhancing productivity and accelerating the development lifecycle, reducing both development time and manual effort. Recently, the rapid development of Multimodal Large Language Models (MLLMs) has made it possible to generate front-end Hypertext Markup Language (HTML) code directly from webpage designs. However, real-world webpages encompass not only a diverse array of HTML tags but also complex stylesheets, resulting in significantly lengthy code. The lengthy code poses challenges for the performance and efficiency of MLLMs, especially in capturing the structural information of UI designs. To address these challenges, this paper proposes UICopilot, a novel approach to automating UI synthesis via hierarchical code generation from webpage designs. The core idea of UICopilot is to decompose the generation process into two stages: first, generating the coarse-grained HTML hierarchical structure, followed by the generation of fine-grained code. To validate the effectiveness of UICopilot, we conduct experiments on a real-world dataset, i.e., WebCode2M. Experimental results demonstrate that UICopilot significantly outperforms existing baselines in both automatic evaluation metrics and human evaluations. Specifically, statistical analysis reveals that the majority of human annotators prefer the webpages generated by UICopilot over those produced by GPT-4V. © 2025 Copyright held by the owner/author(s).

关键词： Web Design

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Heterogeneous differential privacy for vertically partitioned databases

Heterogeneous differential privacy for vertically partitione...

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作者： Xia, Yang Zhu, Tianqing Ding, Xiaofeng Jin, Hai Zou, Deqing National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Lab Cluster and Grid Computing Lab Huazhong University of Science and Technology Wuhan China Deakin University Victoria Australia

Existing privacy-preserving approaches are generally designed to provide privacy guarantee for individual data in a database, which reduces the utility of the database for data analysis. In this paper, we propose a novel differential privacy mechanism to preserve the heterogeneous privacy of a vertically partitioned database based on attributes. We first present the concept of privacy label, which characterizes the privacy information of the database and is instantiated by the classification. Then, we use an information-based method to systematically explore the dependencies between all attributes and the privacy label. We finally assign privacy weights to every attribute and design a heterogeneous mechanism according to the basic Laplace mechanism. Evaluations using real datasets demonstrate that the proposed mechanism achieves a balanced privacy and utility. © 2019 John Wiley & Sons, Ltd.

关键词： Database systems

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FedAA: A Reinforcement Learning Perspective on Adaptive Aggregation for Fair and Robust Federated Learning

arXiv

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arXiv 2024年

作者： He, Jialuo Chen, Wei Zhang, Xiaojin National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan430074 China School of Microelectronics and Communication Engineering Chongqing University Chongqing400044 China School of Software Engineering Huazhong University of Science and Technology Wuhan430074 China

Federated Learning (FL) has emerged as a promising approach for privacy-preserving model training across decentralized devices. However, it faces challenges such as statistical heterogeneity and susceptibility to adversarial attacks, which can impact model robustness and fairness. Personalized FL attempts to provide some relief by customizing models for individual clients. However, it falls short in addressing server-side aggregation vulnerabilities. We introduce a novel method called FedAA, which optimizes client contributions via Adaptive Aggregation to enhance model robustness against malicious clients and ensure fairness across participants in non-identically distributed settings. To achieve this goal, we propose an approach involving a Deep Deterministic Policy Gradient-based algorithm for continuous control of aggregation weights, an innovative client selection method based on model parameter distances, and a reward mechanism guided by validation set performance. Empirically, extensive experiments demonstrate that, in terms of robustness, FedAA outperforms the state-of-the-art methods, while maintaining comparable levels of fairness, offering a promising solution to build resilient and fair federated systems. Our code is available at https://***/Gp1g/FedAA. Copyright © 2024, The Authors. All rights reserved.

关键词： Federated learning

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RAHP: A Redundancy-aware Accelerator for High-performance Hypergraph Neural Network

RAHP: A Redundancy-aware Accelerator for High-performance Hy...

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IEEE/ACM International Symposium on Microarchitecture (MICRO)

作者： Hui Yu Yu Zhang Ligang He Yingqi Zhao Xintao Li Ruida Xin Jin Zhao Xiaofei Liao Haikun Liu Bingsheng He Hai Jin National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China Department of Computer Science University of Warwick United Kingdom National University of Singapore Singapore

ISBN: (数字)9798350350579

ISBN: (纸本)9798350350586

Hypergraph Neural Network (HyperGNN) has emerged as a potent methodology for dissecting intricate multilateral connections among various entities. Current software/hardware solutions leverage a sequential execution model that relies on hyperedge and vertex indices for conducting standard matrix operations for HyperGNN inference. Yet, they are impeded by the dual challenges of redundant computation and irregular memory access overheads. This is primarily due to the frequent and repetitive access and updating of a number of feature vectors corresponding to the same hyperedges and vertices. To address these challenges, we propose the first redundancy-aware accelerator, RAHP, which enables high performance execution of HyperGNN inference. Specifically, we present a redundancy-aware asynchronous execution approach into the accelerator design for HyperGNN to reduce redundant computations and off-chip memory accesses. To unveil opportunities for data reuse and unlock the parallelism that existing HyperGNN solutions fail to capture, it prioritizes vertices with the highest degree as roots, prefetching other vertices along the hypergraph structure to capture the common vertices among multiple hyperedges, and synchronizing the computations of hyperedges and vertices in real-time. By such means, this facilitates the concurrent processing of relevant hyperedge and vertex computations of the common vertices along the hypergraph topology, resulting in smaller redundant computations overhead. Furthermore, by efficiently caching intermediate results of the common vertices, it curtails memory traffic and off-chip communications. To fully harness the performance potential of our proposed approach in the accelerator, RAHP incorporates a topology-driven data loading mechanism to minimize off-chip memory accesses on the fly. It is also endowed with an adaptive data synchronization scheme to mitigate the effects of conflicting updates of both hyperedges and vertices. Moreover, RAHP emplo

关键词： Computational modeling Neural networks Memory management Loading Energy conservation Vectors Software Topology Synchronization Standards

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DarkSAM: fooling segment anything model to segment nothing 24

DarkSAM: fooling segment anything model to segment nothing

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Proceedings of the 38th International Conference on Neural Information Processing systems

作者： Ziqi Zhou Yufei Song Minghui Li Shengshan Hu Xianlong Wang Leo Yu Zhang Dezhong Yao Hai Jin National Engineering Research Center for Big Data Technology and System and Services Computing Technology and System Lab and Cluster and Grid Computing Lab and School of Computer Science and Technology Huazhong University of Science and Technology School of Cyber Science and Engineering Huazhong University of Science and Technology School of Software Engineering Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System and Services Computing Technology and System Lab and Hubei Engineering Research Center on Big Data Security and Hubei Key Laboratory of Distributed System Security and School of Cyber Science and Engineering Huazhong University of Science and Technology School of Information and Communication Technology Griffith University

ISBN: (纸本)9798331314385

Segment Anything Model (SAM) has recently gained much attention for its outstanding generalization to unseen data and tasks. Despite its promising prospect, the vulnerabilities of SAM, especially to universal adversarial perturbation (UAP) have not been thoroughly investigated yet. In this paper, we propose DarkSAM, the first prompt-free universal attack framework against SAM, including a semantic decoupling-based spatial attack and a texture distortion-based frequency attack. We first divide the output of SAM into foreground and background. Then, we design a shadow target strategy to obtain the semantic blueprint of the image as the attack target. DarkSAM is dedicated to fooling SAM by extracting and destroying crucial object features from images in both spatial and frequency domains. In the spatial domain, we disrupt the semantics of both the foreground and background in the image to confuse SAM. In the frequency domain, we further enhance the attack effectiveness by distorting the high-frequency components (i.e., texture information) of the image. Consequently, with a single UAP, DarkSAM renders SAM incapable of segmenting objects across diverse images with varying prompts. Experimental results on four datasets for SAM and its two variant models demonstrate the powerful attack capability and transferability of DarkSAM. Our codes are available at: https://***/CGCL-codes/DarkSAM.

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Unlearnable 3D point clouds: class-wise transformation is all you need 24

Unlearnable 3D point clouds: class-wise transformation is al...

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Proceedings of the 38th International Conference on Neural Information Processing systems

作者： Xianlong Wang Minghui Li Wei Liu Hangtao Zhang Shengshan Hu Yechao Zhang Ziqi Zhou Hai Jin National Engineering Research Center for Big Data Technology and System and Services Computing Technology and System Lab and Hubei Engineering Research Center on Big Data Security and Hubei Key Laboratory of Distributed System Security and School of Cyber Science and Engineering Huazhong University of Science and Technology School of Software Engineering Huazhong University of Science and Technology Hubei Engineering Research Center on Big Data Security and Hubei Key Laboratory of Distributed System Security and School of Cyber Science and Engineering Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System and Services Computing Technology and System Lab and Cluster and Grid Computing Lab and School of Computer Science and Technology Huazhong University of Science and Technology

ISBN: (纸本)9798331314385

Traditional unlearnable strategies have been proposed to prevent unauthorized users from training on the 2D image data. With more 3D point cloud data containing sensitivity information, unauthorized usage of this new type data has also become a serious concern. To address this, we propose the first integral unlearnable framework for 3D point clouds including two processes: (i) we propose an unlearnable data protection scheme, involving a class-wise setting established by a category-adaptive allocation strategy and multi-transformations assigned to samples; (ii) we propose a data restoration scheme that utilizes class-wise inverse matrix transformation, thus enabling authorized-only training for unlearnable data. This restoration process is a practical issue overlooked in most existing unlearnable literature, i.e., even authorized users struggle to gain knowledge from 3D unlearnable data. Both theoretical and empirical results (including 6 datasets, 16 models, and 2 tasks) demonstrate the effectiveness of our proposed unlearnable framework. Our code is available at https://***/CGCL-codes/UnlearnablePC.

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CPSAA: Accelerating Sparse Attention using Crossbar-based Processing-In-Memory Architecture

arXiv

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arXiv 2022年

作者： Li, Huize Jin, Hai Zheng, Long Liao, Xiaofei Huang, Yu Liu, Cong Xu, Jiahong Duan, Zhuohui Chen, Dan Gui, Chuangyi National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China

The attention-based neural network attracts great interest due to its excellent accuracy enhancement. However, the attention mechanism requires huge computational efforts to process unnecessary calculations, significantly limiting the system’s performance. To reduce the unnecessary calculations, researchers propose sparse attention to convert some dense-dense matrices multiplication (DDMM) operations to sampled dense-dense matrix multiplication (SDDMM) and sparse matrix multiplication (SpMM) operations. However, current sparse attention solutions introduce massive off-chip random memory access since the sparse attention matrix is generally unstructured. We propose CPSAA, a novel crossbar-based processing-in-memory (PIM)-featured sparse attention accelerator to eliminate off-chip data transmissions. First, we present a novel attention calculation mode to balance the crossbar writing and crossbar processing latency. Second, we design a novel PIM-based sparsity pruning architecture to eliminate the pruning phase’s off-chip data transfers. Finally, we present novel crossbar-based SDDMM and SpMM methods to process unstructured sparse attention matrices by coupling two types of crossbar arrays. Experimental results show that CPSAA has an average of 89.6×, 32.2×, 17.8×, 3.39×, and 3.84× performance improvement and 755.6×, 55.3×, 21.3×, 5.7×, and 4.9× energy-saving when compare with GPU, FPGA, SANGER, ReBERT, and ReTransformer. Copyright © 2022, The Authors. All rights reserved.

关键词： Memory architecture

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Design and Simulation of Multi-tiered Heterogeneous Memory Architecture

Design and Simulation of Multi-tiered Heterogeneous Memory A...

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International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication systems (MASCOTS)

作者： Jinyuan Hu Haikun Liu Hai Jin Xiaofei Liao National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China

Heterogeneous memory systems have become increasingly popular in recent years. Because heterogeneous storage media often show significantly different characteristics in terms of bandwidth, latency, capacity, and energy consumption, it is still challenging to best utilize them for cost-efficient and energy-efficient heterogeneous memory systems. In this paper, we propose a simulation framework for multi-tiered heterogeneous memory architectures based on GEM5 and DRAMsim3 simulators. We design a heterogeneous memory controller to architect Non-Volatile Memory (NVM) as main memory, and architect both Dynamic Random Access Memory (DRAM) and High-Bandwidth Memory (HBM) as a hybrid cache of NVM. Specifically, HBM, DRAM, and NVM are managed in a single (flat) address space. However, we use an address remapping table to maintain the mappings between NVM pages and HBM/DRAM pages, and logically manage HBM/DRAM/NVM as a three-tiered hybrid memory system. We also design a hardware-supported hot page monitor based on Majority Element Algorithm (MEA) to identify the hottest pages in the DRAM, and a dynamic threshold adjustment scheme for hot page migration to balance the memory bandwidth between DRAM and HBM. Our multi-tiered heterogeneous memory architecture can take advantage of the large capacity of NVM, the low latency of DRAM, and the high bandwidth of HBM concurrently. Experimental results show that our tiered memory architecture can improve application performance by an average of $2.5\times$ compared with an NVM-only architecture, and up to 57.4% compared with a DRAM-only architecture. Moreover, the performance gap between our HBM/DRAM/NVM architecture and a HBM-only architecture is less than 10%.

关键词： Analytical models Nonvolatile memory Heuristic algorithms Computational modeling Memory architecture Random access memory Computer architecture

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Fast and Scalable Gate-Level Simulation in Massively Parallel systems

Fast and Scalable Gate-Level Simulation in Massively Paralle...

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IEEE International Conference on Computer-Aided Design

作者： Haichuan Hu Zichen Xu Yuhao Wang Fangming Liu Services Computing Technology and System Lab Cluster and Grid Computing Lab National Engineering Research Center for Big Data Technology and System School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China School of Mathematics and Computer Science Nanchang University Nanchang China Pengcheng Laboratory Shenzhen China

The natural bijection between a proposed circuit design and its graph representation shall allow any graph optimization algorithm deploying into many-core systems efficiently. However, this process suffers from the exponentially growing overhead and heavy memory footprint with the signal propagation. To conquer the unique challenge, we systematically study the simulation with millions of gates, and identify that the processing complexity could grow exponentially from the signal inputs, the skewness of the computational graph stays. Thus, we present ZhouBi, a fast and scalable gate-level simulation framework to fully exploit the parallelism from many-core systems. ZhouBi contributes in threefolds, (I) a graph representation that colors gate-level netlists and identifies skew partitions based on the graph skewness; (II) A set of heuristic algorithms that picks opportunistic and conservative algorithms to accelerate the simulation; (III) A system facility that supports selective mapping between simulation and many-core, providing a tradeoff between the risk of concurrent simulation fail and performance gain. We have prototyped ZhouBi and evaluated it with practical baselines. ZhouBi can achieve a 27.6× performance gain, as compared to the state-of-the-practice Veriwell without compromising any correctness. Our framework supports large graphs enabling scale-out gate-level simulations for chip design.

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WebCode2M: A Real-World Dataset for Code Generation from Webpage Designs 25

WebCode2M: A Real-World Dataset for Code Generation from Web...

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34th ACM Web Conference, WWW 2025

作者： Gui, Yi Li, Zhen Wan, Yao Shi, Yemin Zhang, Hongyu Su, Yi Chen, Bohua Chen, Dongping Wu, Siyuan Zhou, Xing Jiang, Wenbin Jin, Hai Zhang, Xiangliang Huazhong University of Science and Technology Wuhan China Peking University Beijing China Chongqing University Chongqing China Hubei University of Automotive Technology Shiyan China Rabbitpre AI Shenzhen China University of Notre Dame Notre Dame United States National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster Grid Computing Lab School of Computer Science and Technology China

ISBN: (纸本)9798400712746

Automatically generating webpage code from webpage designs can significantly reduce the workload of front-end developers, and recent Multimodal Large Language Models (MLLMs) have shown promising potential in this area. However, our investigation reveals that most existing MLLMs are constrained by the absence of high-quality, large-scale, real-world datasets, resulting in inadequate performance in automated webpage code generation. To fill this gap, this paper introduces WebCode2M, a new dataset comprising 2.56 million instances, each containing a design image along with the corresponding webpage code and layout details. Sourced from real-world web resources, WebCode2M offers a rich and valuable dataset for webpage code generation across a variety of applications. The dataset quality is ensured by a scoring model that filters out instances with aesthetic deficiencies or other incomplete elements. To validate the effectiveness of WebCode2M, we introduce a baseline model based on the Vision Transformer (ViT), named WebCoder, and establish a benchmark for fair comparison. Additionally, we introduce a new metric, TreeBLEU, to measure the structural hierarchy recall. The benchmarking results demonstrate that our dataset significantly improves the ability of MLLMs to generate code from webpage designs, confirming its effectiveness and usability for future applications in front-end design tools. Finally, we highlight several practical challenges introduced by our dataset, calling for further research. © 2025 Copyright held by the owner/author(s).

关键词： Web Design

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