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IEEE International Conference on Progress in Informatics and computing (PIC)

作者： Liu, Zhiwu Ma, Ruhui Zhou, Fanfu Yang, Yindong Qi, Zhengwei Guan, Haibing School of Electronic and Electric Engineering Shanghai Jiao Tong University Shanghai 200240 China School of Electronic and Electric Engineering Shanghai Key Laboratory of Scalable Computing and Systems Shanghai Jiao Tong University Shanghai 200240 China

ISBN: (纸本)9781424467860

As more and more software applications are migrating from local desktops to remote data centers, efficient data centers management is becoming increasingly important. The management of data centers has been facing a key challenge how to trade-off power consumption and Quality of Service (QoS) of applications. To deal with this challenge, there has been a lot of ongoing efforts on power-aware and QoS-aware application deployment. Based on these works, we present I/O-Intensive and CPU-Intensive applications hybrid deployment to optimize resource utilization within virtualization environments. In this work, we investigate the resources allocation between virtual machines where I/O and CPU-Intensive applications reside, to achieve power-aware applications hybrid deployment. To demonstrate the problem of I/O and CPU resource in virtualization environment, we use Xen as the Virtual Machine Monitor to do experiments. Under different resource allocation configurations, we evaluate power efficiency up to 2 %∼12%, compared to the default deployment. We also can conclude the more CPU resource that the CPU-Intensive application in the hybrid deployment applications need to satisfy QoS, the more power efficiency improvement that hybrid deployment can bring. ©2010 IEEE.

关键词： Virtualization

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A new approach to reorganize code layout of software cache in Dynamic Binary Translator

A new approach to reorganize code layout of software cache i...

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International Symposium on Parallel Architectures, Algorithms, and Programming

作者： He, Yunchao Chen, Kai Gu, Jinghui Deng, Haipeng Liang, Alei Guan, Haibing School of Software Shanghai Jiao Tong University Shanghai China School of Information Security Engineering Shanghai Jiao Tong University Shanghai China School of Electronic Information and Electrical Engineering Shanghai Jiao Tong University Shanghai China Shanghai Key Laboratory of Scalable Computing and Systems Shanghai China

ISBN: (纸本)9780769543123

Dynamic Binary Translation(DBT) is widely used, but it suffers from substantial overhead. Several methods are taken to improve its performance, such as linking/chaining, building superblock according to profiling and/or tracing. Reorganizing code layout of software cache can also improve performance on the ground that the execution stream will be more approximate to its control flow. Once the target code in software cache is reframed properly, hot code will be gathered together and well organized. Because of exact prediction and improved locality, the execution stream will concentrate on a small area with less control transfer. In this paper, we designed a new approach using dynamic-static combined framework to reorganize code layout of software cache. Then we compare it with another two conventional types of code layout in detail. Experimental result shows that our method can significantly cut down the overhead. The overall run time reduced by about 30% on average. Finally, we analyze the reason why reorganizing code layout can improve the performance of dynamic binary translator from several different perspectives. © 2010 IEEE.

关键词： Codes (symbols)

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Efficient online trace building using code replication

Efficient online trace building using code replication

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International Conference on Grid and Cloud computing

作者： Deng, Haipeng Chen, Kai Liu, Bo He, Yunchao Zhou, Kan Yang, Yindong Liang, Alei Guan, Haibing School of Software Shanghai Jiao Tong University China Department of Computer Science and Engineering Shanghai Jiao Tong University China School of Information Security Engineering Shanghai Jiao Tong University China Shanghai Key Laboratory of Scalable Computing and Systems China

ISBN: (纸本)9780769543130

Hot trace building plays an important role in enhancing the performance of dynamic binary translators, since in most cases 10% of code takes 90% of execution time of the whole program. Hot traces can promote the code position to make better the locality of the code;therefore programs can achieve a better performance. Thus how to build qualified and long hot traces is the key point. Considering the situation when one single basic block is needed by more than two hot traces, code replication can help build hot traces with cost of expansion of code size. In this paper, a code replication method to help with building hot traces as well as code positioning is presented, and experiments have been done to evaluate the details of changes that code replication brings to the system, like trace fragment length, memory size expansion, etc. With this method, a performance promotion by 0.5%-3.5% against the original trace building method has been achieved. © 2010 IEEE.

关键词： Virtual machine

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Performance tuning towards a KVM-based low latency virtualization system

Performance tuning towards a KVM-based low latency virtualiz...

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2nd International Conference on Information Engineering and Computer Science, ICIECS 2010

作者： Zuo, Baojing Chen, Kai Liang, Alei Guan, Haibing Zhang, Jun Ma, Ruhui Yang, Hongbo School of Software Shanghai Jiao Tong University Shanghai 200240 China School of Information Security Engineering Shanghai Jiao Tong University Shanghai 200240 China Department of Computer Science and Engineering Shanghai Key Laboratory of Scalable Computing and Systems Shanghai Jiao Tong University Shanghai 200240 China

ISBN: (纸本)9781424479412

Utilizing virtualization technology to combine real-time operating system (RTOS) and off-the-shelf time-sharing general purpose operating system (GPOS) is attracting much more interest recently. Such combination has the potential to provide a large application base, and to guarantee timely deterministic response to real-time applications, yet there is no convincible experimental result about its real-time property. In this paper, we analyze the interrupt latency of RTOS running on Linux KVM based on some preliminary tunings, and find out System Management Interrupt (SMI) is the main factor which makes the maximum latency unideal, so we propose a method to limit the worst-case interrupt latency in an acceptable interval. Furthermore, we also find out that boosting priority may result in wastes of CPU resources when RTOS is not executing real-time tasks, so we design a co-scheduling mechanism to improve the CPU throughput of the GPOS system. ©2010 IEEE.

关键词： Virtualization

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Real-time Enhancement for Xen Hypervisor

Real-time Enhancement for Xen Hypervisor

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IEEE/IFIP International Conference on Embedded and Ubiquitous computing, EUC

作者： Peijie Yu Mingyuan Xia Qian Lin Min Zhu Shang Gao Zhengwei Qi Kai Chen Haibing Guan School of Software Shanghai Jiaotong University China School of Electronic Information and Electrical Engineering Shanghai Key Laboratory of Scalable Computing and Systems Shanghai Jiaotong University China School of Electronic Information and Electrical Engineering Shanghai Jiaotong University China Shanghai Key Laboratory of Scalable Computing and Systems Shanghai Jiaotong University China

System virtualization, which provides good isolation, is now widely used in server consolidation. Meanwhile, one of the hot topics in this field is to extend virtualization for embedded systems. However, current popular virtualization platforms do not support real-time operating systems such as embedded Linux well because the platform is not real-time ware, which will bring low-performance I/O and high scheduling latency. The goal of this paper is to optimize the Xen virtualization platform to be real-time operating system friendly. We improve two aspects of the Xen virtualization platform. First, we improve the xen scheduler to manage the scheduling latency and response time of the real-time operating system. Second, we import multiple real-time operating systems balancing method. Our experiment demonstrates that our enhancement to the Xen virtualization platform support real-time operating system well and the improvement to the real-time performance is about 20%.

关键词： Real time systems Kernel Linux Virtual machine monitors Driver circuits Virtual machining

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Counter designs in quantum-dot cellular automata

Counter designs in quantum-dot cellular automata

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2010 10th IEEE Conference on Nanotechnology, NANO 2010

作者： Kong, Kun Shang, Yun Lu, Ruqian Institute of Mathematics Academy of Mathematics and Systems Science CAS Beijing 100190 China Shanghai Key Lab. of Intelligent Information Processing Fudan University Shanghai 200433 China CAS Key Lab. of IIP Institute of Computing Technology CAS Beijing 100190 China

ISBN: (纸本)9781424470334

In this paper, we present a new method for the design of an n-bit synchronous binary up counter in quantum-dot cellular automata (QCA). This method is based on the JK flip-flop which almost always produces the simplest combinational logic in traditional sequential circuits. We implement a new QCA architecture for the JK flip-flop. Compared to the existing QCA JK flip-flop, the majority gate count, cell count, clock cycle count, and area of our QCA JK flip-flop are reduced by 57.1%, 88.1%, 55.6%, and 92.0%, respectively. Based on our QCA JK flip-flop, a method of extending state cells is proposed to design the QCA layout of the n-bit counter, such that all the clock cycle counts between any two state cells become 1. This feature can ensure that one count just takes one clock cycle, in existing methods, however, one count needs to take n-1 clock cycles. Comparisons indicate that, by applying our method, the hardware requirements (i.e., complexity and area) for QCA n-bit counter can be greatly reduced. ©2010 IEEE.

关键词： Design

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Enhance Information Flow Tracking with Function Recognition

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China Communications 2010年第6期7卷 24-29页

作者： Zhou Kan Huang Shiqiu Huang Shan Qi Zhengwei Gu Jian Guan Haibing School of software Shanghai Jliao Tong University Shanghai 200240 P. R. China Key Lab of Information Network Security Ministry of Public Security Department of Computer Science ＆ Engineering Shanghai Jiao Tong University Shanghai 200240 P. R China Shanghai Key Laboratory of Scalable Computing ＆ System Shanghai P. R. China

With the spread use of the computers, a new crime space and method are presented for criminals. Thus computer evidence plays a key part in criminal cases. Traditional computer evidence searches require that the computer specialists know what is stored in the given computer. Binary-based information flow tracking which concerns the changes of control flow is an effective way to analyze the behavior of a program. The existing systems ignore the modifications of the data flow, which may be also a malicious behavior. Thus the function recognition is introduced to improve the information flow tracking. Function recognition is a helpful technique recognizing the function body from the software binary to analyze the binary code. And that no false positive and no false negative in our experiments strongly proves that our approach is effective.

关键词： function recognition information flow tracking program behavior e-evidence.

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A Translation Framework for Virtual Execution Environment on CPU/GPU Architecture

A Translation Framework for Virtual Execution Environment on...

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International Symposium on Parallel Architectures, Algorithms and Programming (PAAP)

作者： Guoxing Dong Kai Chen Erzhou Zhu Yichao Zhang Zhengwei Qi Haibing Guan School of Software Shanghai Jiaotong University Shanghai China School of Information Security Engineering Shanghai Jiaotong University Shanghai China Department of Computer Science and Engineering Shanghai Key Laboratory of Scalable Computing and Systems Shanghai Jiaotong University Shanghai China

GPUs are many-core processors with tremendous computational power. However, as automatic parallelization has not been realized yet, developing high-performance parallel code for GPUs is still very challenging. The paper presents a novel translation framework designed for virtual execution environment based on CPU/GPU architecture. It addresses two major challenges of taking advantage of general purpose computation on graphics processing units (GPGPU) to improve performance: no rewriting the existing source code and resolving binary compatibility issues between different GPUs. The translation framework uses semi-automatic parallelization technology to port existing code to explicitly parallel programming models. It not only offers a mapping strategy from X86 platform to CUDA programming model, but also synchronizes the execution between the CPU and the GPUs. The input to our translation framework is parallelizable part of the program within binary code. With an additional information related to the parallelizable part, the translation framework transforms the sequential code into PTX code and execute it on GPUs. Experimental results on several programs from CUDA SDK Code Samples and Parboil Benchmark Suite show that our translation framework could achieve very high performance, even up to several tens of times speedup over the X86 native version.

关键词： Graphics processing unit Registers Kernel Instruction sets Driver circuits Programming Computer architecture

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Performance Tuning Towards a KVM-Based Low Latency Virtualization System

Performance Tuning Towards a KVM-Based Low Latency Virtualiz...

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International Conference on Information Engineering and Computer Science (ICIECS)

作者： Baojing Zuo Kai Chen Alei Liang Haibing Guan Jun Zhang Ruhui Ma Hongbo Yang School of Software Shanghai Jiaotong University Shanghai China School of Information Security Engineering Shanghai Jiaotong University Shanghai China Department of Computer Science and Engineering Shanghai Key Laboratory of Scalable Computing and Systems Shanghai Jiaotong University Shanghai China

Utilizing virtualization technology to combine real-time operating system(RTOS)and off-the-shelf time-sharing general purpose operating system (GPOS)is attracting much more interest *** combination has the potential to provide a large application base,and to guarantee timely deterministic response to real-time applications,yet there is no convincible experimental result about its real-time *** this paper,we analyze the interrupt latency of RTOS running on Linux KVM based on some preliminary tunings,and find out System Management Interrupt (SMI) is the main factor which makes the maximum latency unideal, so we propose a method to limit the worst-case interrupt latency in an acceptable ***,we also find out that boosting priority may result in wastes of CPU resources when RTOS is not executing real-time tasks,so we design a co-scheduling mechanism to improve the CPU throughput of the GPOS system.

关键词： Linux Real time systems Kernel Tuning Throughput Hardware

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An integrated computing environment for bio-molecular networks

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Journal of Convergence Information Technology 2010年第4期5卷

作者： Xie, Jiang Mao, Guoyong Zhang, Shilin Zhang, Wu School of Computer Engineering and Science Shanghai University Shanghai 200072 China Institute of Systems Biology Shanghai University Shanghai 200444 China Changzhou Key lab for Research and Application of Software Technology Changzhou 213002 China High Performance Computing Center Shanghai University Shanghai 200072 China

With the development of systems biology, more and more researchers focus on the study of bio-molecular networks. In recent years, researchers in different fields have accumulated a large number of biological experimental data and algorithms for analysis and calculation of bio-molecular networks, but these data and methods are relatively independent, difficult to be utilized by biologists. Based on PSE-Bio, a problem solving environment for bioinformatics, this paper describes an integrated computing environment for bio-molecular networks in order to achieve molecular homology analysis, bio-molecular network building, querying, statistics and visualization.

关键词： Bioinformatics

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