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IEEE International Conference on Systems, Man and Cybernetics

作者： N. Ansari H. Agustiawan Center of Communications and Signal Processing Department of Electrical and Computer Engineering New Jersey Institute of Technology Newark NJ USA

Results of combining the shape recognition method of N. Ansari and E.J. Delp (1989) and two motion estimation algorithms presented by R.Y. Tsai and T.S. Huary (1981, 1982) to perform motion and structure estimation of a rigid planar object from landmark matching are presented. From all numerical experiments that have been tried, the recognition algorithm can handle the landmark matching tasks well if the object follows a relatively small rigid motion such that the normal of the object surface is not almost perpendicular to the optical axis. Due to the nonlinearity of the computation procedure of the combined algorithm and roundoff error generated by the computer, the estimated parameters deviate up to 10% from the predefined parameters. The combined algorithm is, however, convenient, inexpensive and not shaken by missing or extraneous landmarks in the second view as long as there are more than three landmark corresponding pairs.< >

关键词： Motion estimation signal processing algorithms Probes Equations Shape measurement Optical signal processing Roundoff errors Parameter estimation Layout Matrices

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Performance Evaluation of a Buffer less NxN Synchronous Clos ATM Switch with Priorities and Space Preemption

Performance Evaluation of a Buffer less NxN Synchronous Clos...

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1991 IEEE International Conference on Communications - Communications: Rising to the Heights, ICC 1991

作者： Nilsson, Arne A. Lai, Fuyung Perros, Harry G. Department of Electrical and Computer Engineering North Carolina State University RaleighNC27695-7914 United States Center for Communications and Signal Processing North Carolina State University RaleighNC27695-7914 United States Department of Computer Science North Carolina State University RaleighNC27695-7914 United States

ISBN: (纸本)0780300068

We consider a synchronized bufferless Clos ATM switch with input cell processor queues. The arrival process to each input port of the switch is assumed to be bursty and it is modeled by an Interrupted Bernoulli Process. Two classes of cells are considered. Service in an input cell processor queue is head-of-line without preemption. In addition, space preemption is used. That is, a high priority cell arriving to a full queue takes the space occupied by the low priority cell with the least waiting time in the queue but not the one in service. Each cell processor queue is modeled as a pri-ority IBP/Geo/l/K+1 queue with space preemption. We present an exact analysis of the priority queue. The results obtained are then used in an approximation algorithm for the analysis of the ATM switch. © 1991 IEEE.

关键词： Cells

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Use of PARADISE: a meta-tool for visualizing parallel systems

Use of PARADISE: a meta-tool for visualizing parallel system...

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International Symposium on Parallel processing

作者： J.A. Kohl T.L. Casavant Parallel Processing Laboratory Department of Electrical and Computer Engineering University of Iowa Iowa IA USA

Addresses the problem of creating software tools for visualizing the dynamic behavior of parallel applications and systems. PARADISE (PARallel Animated Debugging and Simulation Environment) approaches this problem by providing a meta-tool environment for generating custom visual analysis tools. PARADISE is a meta-tool because it is a tool which is utilized to create other tools. The authors focus on the user's view of the use of PARADISE for constructing tools which analyze the interaction between parallel systems and parallel applications. An example of its use, involving the PASM Parallel processing System, is given.< >

关键词： Visualization Algorithm design and analysis Image analysis Parallel processing Laboratories Cities and towns Animation Computational modeling Analytical models Concurrent computing

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A neural network based VLSI vector quantizer for real-time image compression

A neural network based VLSI vector quantizer for real-time i...

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1991 Data Compression Conference, DCC 1991

作者： Fang, Wai-Chi Sheu, Bing J. Chen, Oscal T.-C. Department of Electrical Engineering Signal and Image Processing Institute University of Southern California Los AngelesCA90089-0271 United States Jet Propulsion Laboratory California Institute of Technology 4800 Oak Grove Drive PasadenaCA91109 United States

ISBN: (纸本)0818692022

A trainable VLSI neuroprocessor for adaptive vector quantization based upon the frequency-sensitive competitive learning algorithm has been developed for high-speed high-ratio image compression applications. Simulation results show that such an algorithm is capable of producing goodquality reconstructed image at high compression ratios of more than 20. This neural network-based vector quantization design includes a fully parallel vector quantizer and a pipelined codebook generator which obtains a time complexity O(1) for each quantization vector. A 5x5-dimentional vector quantizer prototype chip has been designed, fabricated and tested. It contains 64 inner-product neural units and an extendable winner-take-all block. This mixed-signal chip occupies a compact silicon area of 4.6 x 6.8 mm2 in a 2.0-μm scalable CMOS technology. It provides a computing capability as high as 3.33 billion connections per second. It can achieve a speedup factor of 750 compared with a SUN-3/60 for a compression ratio of 33. Real-time adaptive VQ on industrial 1,024 × 1,024 pixel images is feasible using an extended array of such neuroprocessor chips. An industrial-scale chip of 125 mm2 size to achieve 104 billion connections per second for the 1024-codevector vector quantizer can be fabricated in a 1-μm CMOS technology. © 1991 IEEE.

关键词： Vector quantization

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Performance evaluation of a bufferless N*N synchronous Clos ATM switch with priorities and space preemption

Performance evaluation of a bufferless N*N synchronous Clos ...

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IEEE International Conference on Communications (ICC)

作者： A.A. Nilsson F. Lai H.G. Perros Department of Electrical and Computer Engineering and Center of Communications and Signal Processing North Carolina State University Raleigh NC USA Department of Computer Science and Center of Communications and Signal Processing North Carolina State University Raleigh NC USA

A synchronized bufferless Clos ATM (asynchronous transfer mode) switch with input cell processor queues is considered. The arrival process to each input port of the switch is assumed to be bursty and it is modeled by an interrupted Bernoulli process. Two classes of cells are considered. Service in an input cell processor queue is head-of-line without preemption. In addition, space preemption is used. That is, a high priority cell arriving to a full queue takes the space occupied by the low priority cell with the least waiting time in the queue but not the one in service. Each cell processor queue is modeled as a priority IBP/Geo/1/K+1 queue with space preemption. An exact analysis of the priority queue is presented. The results obtained are then used in an approximation algorithm for the analysis of the ATM switch.< >

关键词： Switches Asynchronous transfer mode Communication switching Multiprocessor interconnection networks signal processing B-ISDN computer architecture Delay effects Queueing analysis signal processing algorithms

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Automatic custom layout of analog ICs using constraint-based module generation

Automatic custom layout of analog ICs using constraint-based...

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Custom Integrated Circuits Conference (CICC)

作者： D.J. Chen B.J. Sheu Department of Electrical Engineering and Computer Science and Signal and Image Processing Institute University of Southern California Los Angeles CA USA

A systematic method for automatic custom layout of analog integrated circuits is presented. This method uses analog circuit recognition and critical net analysis techniques to derive proper layout constraints for analog circuit performance optimization. Constraint-driven analog floorplanning and routing techniques are developed to generate custom layouts which incorporate the layout constraints. This method can be applied to handle a wide variety of analog circuit modules as well as analog subsystems. Experimental results on CMOS operational amplifiers and a comparator are presented.< >

关键词： Analog circuits Circuit synthesis Routing Automation Degradation Circuit noise Coupling circuits Circuit analysis signal generators signal processing

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System identification from frequency samples of the bispectrum

System identification from frequency samples of the bispectr...

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International Conference on Acoustics, Speech, and signal processing (ICASSP)

作者： H.M. Valenzuela Department of Electrical and Computer Engineering Spatial and Temporal Signal Processing Center Pennsylvania State University University Park PA USA

A system identification technique for general noncausal, nonminimal-phase autoregressive moving-average (ARMA) processes is presented. The technique combines rational modeling from frequency response samples with system identification from higher-order statistics information. The formulation is based on samples of the bispectrum along a straight line on the frequency plane, referred to as a bispectrum slice. The identification is carried out in two steps; first a rational model of the bispectrum slice is obtained via solution of two uncoupled systems of equations and, subsequently, the coefficients of the underlying ARMA model are obtained by using closed-form expressions. The method is verified through simulations.< >

关键词： System identification Transfer functions Additive noise Frequency response signal processing Higher order statistics Gaussian noise Equations Frequency domain analysis Noise robustness

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Tree structures for time-frequency signal analysis

Tree structures for time-frequency signal analysis

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International Conference on Acoustics, Speech, and signal processing (ICASSP)

作者： A.N. Akansu Y. Liu Department of Electrical and Computer Engineering Center of Communication and Signal Processing Research New Jersey Institute of Technology Newark NJ USA

The popular orthonormal decomposition techniques such as block transforms and filter banks for multiresolution signal representation are unified. Their comparative performance results based on signal energy compaction are presented for image and AR(1) sources. It is observed that the filter banks with computationally efficient filtering algorithms and irregular tree structures are potential competitors to the block transforms, particularly for image processing and coding applications.< >

关键词： Tree data structures Time frequency analysis signal analysis Filter bank Energy resolution signal resolution signal representations Compaction Filtering algorithms Image processing

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SCALED AND SCALING-FREE McCLELLAN TRANSFORMATIONS FOR THE DESIGN OF 2-D DIGITAL FILTERS

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Journal of Circuits, Systems and computers 1991年第1期1卷 105-124页

作者： N. NAGAMUTHU M. N. S. SWAMY Centre for Signal Processing and Communications (CENSIPCOM) Department of Electrical and Computer Engineering Concordia University Montreal Quebec H3G 1M8 Canada

In this paper, the scaling problem of McClellan transformation used for the design 2-D digital filters with elliptical and circular cutoff contours is critically analyzed. Several new and extremely simple formulas for calculating the maximum and minimum values of the transformation function are presented. Using these extreme values, simple formulas for scaling factors and scaled McClellan transformations are derived for the various cases of each type of contour. Using the necessary and sufficient conditions for a scaling-free transformation, the scaling-free McClellan transformations are also derived. It is shown that the number of independent coefficients in them to be optimized varies from 0 to 2 depending on the case, compared to 3 in the original transformation. They are very useful in deriving analytical expressions for the transformation coefficients, and the 2-D filters designed by employing them have a smaller number of multiplications per output sample and hence, attractive for real-time applications. A new scaling formula is presented and some of its properties and effects on the derived formulas are discussed. The major advantage of this new formula is that from the unscaled transformation coefficients for a given type of 2-D filter, we can generate the scaled transformation coefficients for a different type of 2-D filter. Some examples are presented to demonstrate the usefulness of the derived formulas.

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Configuring stack filters by the LMS algorithm

Configuring stack filters by the LMS algorithm

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IEEE Workshop on Neural Networks for signal processing

作者： N. Ansari Y. Huang J.-H. Lin Center of Communications and Signal Processing Department of Electrical and Computer Engineering New Jersey Institute of Technology Newark NJ USA Department of Electrical Engineering University of Delaware Newark DE USA

Stack filters are a class of sliding-window nonlinear digital filters that possess the weak superposition property (threshold decomposition) and the ordering property known as the stacking property. They have been demonstrated to be robust in suppressing noise. A new method based on the least means squares (LMS) algorithm is developed to adaptively configure a stack filter. Experimental results are presented to demonstrate the effectiveness of the proposed method to noise suppression.< >

关键词： Least squares approximation signal processing algorithms Stacking Adaptive filters Adaptive signal processing Filtering Digital signal processing Noise robustness Working environment noise signal processing

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