An adaptive VLSI neuroprocessor based on vector quantization algorithm has been developed for real-time high-ratio image compression applications. This VLSI neural-network-based vector quantization (NNVQ) module combi...
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An adaptive VLSI neuroprocessor based on vector quantization algorithm has been developed for real-time high-ratio image compression applications. This VLSI neural-network-based vector quantization (NNVQ) module combines a fully parallel vector quantizer with a pipelined codebook generator for a broad area of data compression applications. The NNVQ module is capable of producing good-quality reconstructed data at high compression ratios more than 20. The vector quantizer chip has been designed, fabricated, and tested. It contains 64 inner-product neural units and a high-speed extendable winner-take-all block. This mixed-signal chip occupies a compact silicon area of 4.6*6.8 mm/sup 2/ in a 2.0- mu m scalable CMOS technology. The throughput rate of the 2- mu m NNVQ module is 2 million vectors per second and its equivalent computation power is 3.33 billion connections per second.< >
The convergence behavior of type-0 through type-3 stack filters is investigated. It is shown that stack filters of type-0 through type-2 all possess the convergence property; that is, they filter any input signal to a...
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The convergence behavior of type-0 through type-3 stack filters is investigated. It is shown that stack filters of type-0 through type-2 all possess the convergence property; that is, they filter any input signal to a root after consecutive passes of the filter under any appending strategy. A counterexample is given to show that not all type-3 stack filters have this convergence property. The rate of convergence for convergent stack filters is also shown. It is shown that stack filters of type-0 will take at most a single pass to filter any input signal to a root. The rate of convergence of type-1 and type-2 stack filters is shown to be linear in the length of the input signal.< >
The frequency-sensitive competitive learning (FSCL) algorithm and its associated VLSI neuroprocessor have been developed for adaptive vector quantisation (AVQ). Simulation results show that the FSCL algorithm is capab...
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The frequency-sensitive competitive learning (FSCL) algorithm and its associated VLSI neuroprocessor have been developed for adaptive vector quantisation (AVQ). Simulation results show that the FSCL algorithm is capable of producing a good-quality codebook for AVQ at high compression ratios of more than 20 in real time. This VLSI neural-network-based vector quantization design includes a fully parallel vector quantizer and a pipelined codebook generator to provide an effective data compression scheme. It provides a computing capability as high as 3.33 billion connections per second. Its performance can achieve a speedup of 750 compared with SUN-3/60 and a compression ratio of 33 at a signal-to-noise ratio of 23.81 dB.< >
A trainable VLSI neuroprocessor for adaptive vector quantization based upon the frequency-sensitive competitive learning algorithm has been developed for high-speed high-ratio image compression applications. Simulatio...
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A trainable VLSI neuroprocessor for adaptive vector quantization based upon the frequency-sensitive competitive learning algorithm has been developed for high-speed high-ratio image compression applications. Simulation results show that such an algorithm is capable of producing good-quality reconstructed image at compression ratios of more than 20. This design includes a fully parallel vector quantizer and a pipelined codebook generator which obtains a time complexity O(1) for each quantization vector. A 5*5-dimensional vector quantizer prototype chip has been designed, fabricated and tested. It contains 64 inner-product neural units and an extendable winner-take-all block. This mixed-signal chip occupies a compact Si area of 4.6*6.8 mm/sup 2/ in 2.0- mu m scalable CMOS technology.< >
The goal of this research is to develop a multi-layer feedforward neural network architecture which can distinguish targets (in this case, mines) from background clutter in sidescan sonar images. The network is to be ...
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The goal of this research is to develop a multi-layer feedforward neural network architecture which can distinguish targets (in this case, mines) from background clutter in sidescan sonar images. The network is to be implemented on a hardware neurocomputer currently in development at CSDL, with the goal of eventual real-time performance in the field. A variety of neural network architectures are developed, simulated, and evaluated in an attempt to find the best approach for this particular application. It has been found that classical statistical feature extraction is outperformed by a much less computationally expensive approach that simultaneously compresses and filters the raw data by taking a simple mean.< >
The authors develop a path metric for sequential search based on the linear model. The metric forms the heart of an edge-linking algorithm that combines edge elements enhanced by an optimal filter. From a starting nod...
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The authors develop a path metric for sequential search based on the linear model. The metric forms the heart of an edge-linking algorithm that combines edge elements enhanced by an optimal filter. From a starting node, transitions are made to the goal nodes by a maximum likelihood metric. This metric requires only local calculations on the search space and its use in edge linking provides more accurate results than other linking techniques.< >
The application of electron beam lithography for the fabrication of x‐ray masks is essential in the development of x‐ray lithography technology. In this paper we present experimental results on the patterning of sub...
The application of electron beam lithography for the fabrication of x‐ray masks is essential in the development of x‐ray lithography technology. In this paper we present experimental results on the patterning of submicron (2–0.25 μm) features into a single‐layer negative e‐beam resist and then subsequent transfer of these patterns onto a 0.4 μm‐thick tungsten film by reactive ion etching. To study the dependence of the proximity effect on the substrate material, a comparison of linewidths and sidewall profiles of electron beam resist images on silicon, silicon dioxide on silicon, and tungsten on silicon wafers has been established.
Several algorithms for segmenting multifrequency synthetic aperture radar (SAR) complex data into regions of similar and homogeneous backscattering characteristics are presented. The image model is composed of two mod...
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Several algorithms for segmenting multifrequency synthetic aperture radar (SAR) complex data into regions of similar and homogeneous backscattering characteristics are presented. The image model is composed of two models, one for the multifrequency complex amplitudes (i.e., speckle), and the other for the region labels. The speckle model is derived from SAR physics. The corresponding analysis illustrates the importance of having a good knowledge of the characteristics of the SAR imaging and processing systems to correctly model the high order statistics of speckle. The region model, on the other hand, uses a multilevel Ising model (a Markov random field) to represent the grouping of pixels into regions. The two models are combined using Bayes' rule to define an optimal region labeling of the scene given the multifrequency complex amplitudes. Two alternatives are presented that can be implemented on an optimization network. The performance of the segmentation technique is illustrated.< >
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