A systematic approach to automatic layout generation for the emerging mixed analog-digital VLSI neural systems is described. A macro-cell layout methodology based on a hierarchical floorplanning and placement procedur...
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A systematic approach to automatic layout generation for the emerging mixed analog-digital VLSI neural systems is described. A macro-cell layout methodology based on a hierarchical floorplanning and placement procedure, a constraint-driven analog module generator, and a priority-based block router have been exclusively developed for neural chip implementation. Special analog VLSI layout constraints are analyzed and properly incorporated into the layout generation on each level of the circuit hierarchy to achieve both high performance and overall area efficiency. The floorplans for single-layer fully-connected Hopfield neural chips and multiple-layer neural chips have been developed. Experimental results on a 16-neuron neural circuit are presented.< >
A technique to guide landmark matching known as hopping dynamic programming is described. The location of the model in the scene is estimated with a least-squares fit. A heuristic measure is then computed to decide if...
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A technique to guide landmark matching known as hopping dynamic programming is described. The location of the model in the scene is estimated with a least-squares fit. A heuristic measure is then computed to decide if the model is in the scene. The shape features of an object are the landmarks associated with the object. The landmarks of an object are defined as the points of interest of the object that have important shape attributes. Examples of landmarks are corners, holes, protrusions, and high-curvature points.< >
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