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检索条件"机构=Software Engineering of Embedded Systems"

共 159 条记录，以下是111-120 订阅

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Test-Case Generation for embedded Binary Code Using Abstract Interpretation 6

Test-Case Generation for Embedded Binary Code Using Abstract...

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6th Doctoral Workshop on Mathematical and engineering Methods in Computer Science, MEMICS 2010

作者： Reinbacher, Thomas Brauer, Jörg Horauer, Martin Steininger, Andreas Kowalewski, Stefan Embedded Computing Systems Group Institute of Computer Engineering Vienna University of Technology Treitlstrasse 3 ViennaA-1040 Austria Embedded Software Laboratory RWTH Aachen University Ahornstraße 55 AachenD-52074 Germany Department of Embedded Systems University of Applied Sciences Technikum Wien Höchstädtplatz 5 ViennaA-1200 Austria

ISBN: (纸本)9783939897224

This paper describes a framework for test-case generation for microcontroller binary programs using abstract interpretation techniques. The key idea of our approach is to derive program invariants a priori, and then use backward analysis to obtain test vectors that are executed on the target microcontroller. Due to the structure of binary code, the abstract interpretation framework is based on propositional encodings of the program semantics and SAT solving. © Thomas Reinbacher, Jörg Brauer, Martin Horauer, Andreas Steininger, and Stefan Kowalewski;licensed under Creative Commons License NC-ND

关键词： Binary codes

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Verification of Distributed embedded Real-Time systems and their Low-Level Implementations Using Timed CSP

Verification of Distributed Embedded Real-Time Systems and t...

引用

Asia-Pacific Conference on software engineering

作者： Bjorn Bartels Sabine Glesner Software Engineering Group Berlin Institute of Technology Berlin Germany Software Engineering for Embedded Systems Group Berlin Institute of Technology Berlin Germany

Process algebras like Timed CSP offer a convenient level of abstraction for the specification and verification of distributed embedded real-time systems. Complex systems can be specified in terms of interacting modules whose interaction can be analyzed using the mechanisms of the process algebra. In this paper, we present a development approach that supports the construction of distributed real-time systems by exploiting Timed CSP's concept of modularity. Individual system components are refined to their low-level implementations and shown to be a formally correct implementation of their respective Timed CSP specifications. Their interaction can then be analyzed by composing the individual process specifications. The key idea underlying the presented approach is a formal relation between timed process algebraic specifications and implementations given in a general purpose programming language.

关键词： Semantics Algebra Timing Hardware Registers Load modeling Data models

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Scalable multi-core simulation using parallel dynamic binary translation

Scalable multi-core simulation using parallel dynamic binary...

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International Conference on embedded Computer systems: Architectures, Modeling and Simulation (IC-SAMOS)

作者： Oscar Almer Igor Böhm Tobias Edler von Koch Björn Franke Stephen Kyle Volker Seeker Christopher Thompson Nigel Topham Institute of Computing Systems Architecture University of Edinburgh UK Software Engineering for Embedded Systems Group Technical University of Berlin Germany

In recent years multi-core processors have seen broad adoption in application domains ranging from embedded systems through general-purpose computing to large-scale data centres. Simulation technology for multi-core systems, however, lags behind and does not provide the simulation speed required to effectively support design space exploration and parallel software development. While state-of-the-art instruction set simulators (ISS) for single-core machines reach or exceed the performance levels of speed-optimised silicon implementations of embedded processors, the same does not hold for multi-core simulators where large performance penalties are to be paid. In this paper we develop a fast and scalable simulation methodology for multi-core platforms based on parallel and just-in-time (JIT) dynamic binary translation (DBT). Our approach can model large-scale multi-core configurations, does not rely on prior profiling, instrumentation, or compilation, and works for all binaries targeting a state-of-the-art embedded multi-core platform implementing the ARCompact instruction set architecture (ISA). We have evaluated our parallel simulation methodology against the industry standard Splash-2 and EEMBC MULTIBENCH benchmarks and demonstrate simulation speeds up to 25,307 Mips on a 32-core ×86 host machine for as many as 2048 target processors whilst exhibiting minimal and near constant overhead.

关键词： Program processors Multicore processing Random access memory Hardware Computational modeling Field programmable gate arrays Benchmark testing

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Safe automotive software

Safe automotive software

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Lecture Notes in Computer Science

作者： Heckemann, Karl Gesell, Manuel Pfister, Thomas Berns, Karsten Schneider, Klaus Trapp, Mario Fraunhofer Institute for Experimental Software Engineering Fraunhofer-Platz 1 67663 Kaiserslautern Germany Embedded Systems Group Department of Computer Science University of Kaiserslautern Germany Robotics Research Lab. Department of Computer Science University of Kaiserslautern Germany

ISBN: (纸本)9783642238659

For automotive manufacturers and tier-1 suppliers, the upcoming safety standard ISO 26262 results in new requirements for the development of embedded electronics and software. In particular, the variety of driver assistance systems that autonomously influence the driving dynamics of a vehicle may have a high risk potential and require development in accordance with the normative guidelines. But especially for those systems whose function is typically not based solely on hardware but on complex software algorithms, safety certification can be very complex or even impossible. In this paper the problems of development of vehicle systems according to ISO 26262 are described. Finally an approach for a safety-oriented reference architecture is presented that introduces adaptive software safety cages. This architecture enables application of formal verification methods. Supported by multisensor data fusion this allows to reduce safety requirements for vehicle control systems. © 2011 Springer-Verlag.

关键词： Control system synthesis

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Hardware support for efficient testing of embedded software

Hardware support for efficient testing of embedded software

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ASME 2011 International Design engineering Technical Conferences and Computers and Information in engineering Conference, IDETC/CIE 2011

作者： Reinbacher, Thomas Müller, Tobias Horauer, Martin Brauer, Jörg Kowalewski, Stefan Andreas Steininger ECS Group Inst. of Computer Engineering Vienna University of Technology Treitlstr. 3 1040 Vienna Austria Dept. of Embedded Systems Univ. of Applied Sciences Technikum Wien Hochstadtpl. 5 1200 Vienna Austria Embedded Software Laboratory RWTH Aachen University Ahornstr. 55 52074 Aachen Germany

ISBN: (纸本)9780791854808

Verification of software for embedded systems is crucial for ensuring a product's integrity. Formal approaches like static analysis and model checking are gaining momentum in this context. To make an exhaustive examination of the system's state space tractable in practice, these methods perform an abstraction and over-approximation of the possible behavior. As a side-effect, however, this leads to "false negatives" - property violations that exist only in the model and not on the real system. Ruling out such spurious property violations by manual valuation is a tedious and error-prone process. This paper reports on the concepts and design of a hardware unit to support the identification of false negatives. Our approach has several advantages: (i) It works on microcontroller binary code, thus avoiding the need for availability of high-level source code, and covering compiler bugs as well. (ii) Moving the verification directly to the target platform rules out modeling errors. (iii) The cases suspected to lead to spurious property violations can serve as very efficient test cases for a specific implementation later on. We illustrate principle and benefits of the proposed approach by a worked example. © 2011 by ASME.

关键词： Model checking

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Design and analysis of video parallel processing on a hierachical multiprocessor system on FPGA

Design and analysis of video parallel processing on a hierac...

引用

International Conference on E-Business and E-Government (ICEE)

作者： Da Li Yibin Hou Zhangqin Huang Chunhua Xiao Embedded Software and Systems Institute Beijing University of Technology Beijing China School of Electronics and Information Engineering Xi''an Jiaotong University Xi'an China

ISBN: (纸本)9781424486915

Recently there has been a growing interest in models and methods targeted towards the design of video stream parallel processing, and the applications tend to be highly bursty and dependent parallel. As a result, the most existing models are not suitable for dealing with such system design. In this paper, we present an Event Count Model (ECM) to capturing the timing properties of video stream processing in the hierarchical system structure; and we also use Continuous Markov Chain modeling and high level colored time Petri net to describe the multiprocessor system architecture and co-design of software and hardware. Simulations of the asynchronous and concurrent interactions of system, and formal co-verification approach with CPN Tools is proposed and a case of h.264 encoder on MPSoC is used for illustrate these explanations.

关键词： Computer architecture Streaming media Analytical models Timing embedded systems Hardware

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A framework of fuzzy dynamic scheduling for MPSoC architecture

A framework of fuzzy dynamic scheduling for MPSoC architectu...

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IEEE International Conference on Cyber Technology in Automation, Control, and Intelligent systems

This paper studied the real-time dynamic scheduling with inaccurate and uncertain characteristics on MPSoC systems. A fuzzy set model of MPSoC system is established first. The authors propose a new dynamic fuzzy heuristic scheduling to solve the scheduling problem and improve the multiple performances. The authors demonstrate through the experiments that the multi-fuzzy scheduling algorithm is an effective approach and it outperforms other original algorithms comprehensively.

关键词： Processor scheduling Dynamic scheduling Fuzzy sets Schedules Heuristic algorithms Optimal scheduling

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A Model-Driven Framework for the Development of Portable Real-Time embedded systems

A Model-Driven Framework for the Development of Portable Rea...

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IEEE International Conference on engineering of Complex Computer systems

作者： W. El Hajj Chehade A. Radermacher F. Terrier B. Selic S. Gérard CEA LIST Laboratory of model driven engineering for embedded systems Gif-sur-Yvette France Malina Software Corp Nepean Ontario Canada

One pillar of Model-Driven Development for real-time embedded software is the separation of concerns between application model and target platform. This requires definition of model transformations realizing the mapping of the application model onto the target platform. Real-Time and embedded systems design means coping with different target platforms and with heterogeneous constraints related to time, synchronization and memory footprint. However, different target platforms have APIs and implementation patterns that vary significantly so that it is necessary to develop several dedicated model transformations in order to achieve portability between them. Although this is one way to achieve portability, we show in this paper that the cost of portability can be reduced by providing domain-independent model transformations while still ensuring performance requirements are satisfied.

关键词： Unified modeling language Real time systems Connectors Java Processor scheduling Message systems Radiation detectors

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ENERGY SAVING SPECTRUM SELECTION IN COGNITIVE RADIO NETWORKS USING STOCHASTIC CONTROL THEORY

ENERGY SAVING SPECTRUM SELECTION IN COGNITIVE RADIO NETWORKS...

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2011 International Conference on Communications Technology and Applications(2011年通信技术与应用国际会议 ICCTA 2011)

作者： Mei Song Yinghe Wang Yifei Wei Li Wang Yong Li School of Electronic Engineering Beijing University of Posts and Telecommunications Beijing 100876 Embedded Software and Systems Institute Beijing University of Technology Beijing China

Spectrum selection is crucial in improving the performance of cognitive radio networks. Most of previous work on spectrum selection consider spectrum utilization ratio as system design criteria and ignore the energy issue. In this paper, we take a cross-layer design approach to select the optimal spectrum considering the time varying and stochastic nature of wireless channels. The proposed scheme selects one spectrum among different alternatives and sets the modulation and coding scheme and frame size in each time slot according to the channel state, which is modeled as finite-state Markov channel, with the objective of minimizing energy consumption. The procedure of spectrum access is formulated as a restless bandit problem, which can be solved using linear programming (LP) and primal-dual index heuristic algorithm. Simulation results are presented to show the performance improvement of the proposed scheme.

关键词： Energy saving spectrum selection cognitive radio markov decision process

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A framework of multi-characteristics fuzzy dynamic scheduling for parallel video processing on MPSoC architecture

A framework of multi-characteristics fuzzy dynamic schedulin...

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IEEE International Conference on Fuzzy systems (FUZZ-IEEE)

This paper addresses the inherent unreliability and instability of the multiple uncertain characteristics of complex embedded multiprocessor systems, such as MPSoC (multi-processor system on chip) systems. In this work, we propose a fuzzy sets description for the multiple uncertain characteristics of system, and using fuzzy set membership calculation to determine the scheduling priorities of tasks and resources, in order to improve the capability of concurrent executions of tasks. And also we present a method estimation of comprehensive analysis on the multiple performances in order to increase utilization factor and balancing loads on processors. Through simulation, we demonstrate that the fuzzy dynamic scheduling algorithm can handle wide variety requirements of multiple performances, and we also show an improved approach to solve its demerit of partial adjustment. We implemented a prototype MPSoC system, which utilizes the proposed fuzzy dynamic scheduling algorithm to allocating tasks onto the multiprocessors. And in our case studies, we design a parallel architecture h.264 encoder, running on a multicore MPSoC system on FPGA. The speedup ratio of this prototype application system is up to 12.69.

关键词： Processor scheduling Fuzzy sets Schedules Heuristic algorithms Dynamic scheduling Algorithm design and analysis

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