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Special Issue on Role of Inter-Disciplinary Research in Nanoscale Communication

Nano Communication Networks 2011年第1期2卷 1-3页

作者： Balasubramaniam, Sasitharan Teuscher, Christof Botvich, Dmitri Prina Mello, Adriele Telecommunication Software and Systems Group Waterford Institute of Technology Ireland Department of Electrical and Computer Engineering Portland State University Portland United States Telecommunication Software and Systems Group Waterford Institute of Technology Ireland CRANN - Naughton Institute Trinity College Dublin Ireland

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Incorporating real-world industrial testing projects in software testing courses: Opportunities, challenges, and lessons learned

Incorporating real-world industrial testing projects in soft...

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Conference on software engineering Education & Training (CSEE&T)

作者： Vahid Garousi Software Quality Engineering Research Group (SoftQual) Department of Electrical and Computer Engineering Schulich School of Engineering University of Calgary AB Canada

ISBN: (纸本)9781457703492

In order to effectively teach software engineering students how to solve real-world problems, if possible, students should have the chance of working with and testing “real-world” industrial software systems during their courses. In a previous article, we presented a comprehensive software-testing lab exercise repository in which real software systems and test tools were incorporated to give students the chance of learning industry-standard tools (such as JUnit and IBM Rational Functional Tester). As the next step in our on-going efforts to improve the learning experience of students in testing courses, we have incorporated “real-world” industrial testing projects in a graduate-level software testing course in the past three years (2008-2010). The experience and the outcomes of these industrial-caliber projects have been very satisfying to the stakeholders. We report in this article some details about those projects and also discuss the opportunities, challenges, and lessons learned in those projects.

关键词： software testing software systems Companies software engineering Collaboration

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Time-ordered event traces: A new debugging primitive for concurrency bugs

Time-ordered event traces: A new debugging primitive for con...

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25th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2011

作者： Dimitrov, Martin Zhou, Huiyang Software and Services Group Intel Corporation Chandler AZ United States Department of Electrical and Computer Engineering North Carolina State University Raleigh NC United States

ISBN: (纸本)9780769543857

Non-determinism makes concurrent bugs extremely difficult to reproduce and to debug. In this work, we propose a new debugging primitive to facilitate the debugging process by exposing this non-deterministic behavior to the programmer. The key idea is to generate a time-ordered trace of events such as function calls/returns and memory accesses across different threads. The architectural support for this primitive is lightweight, including a high-precision, frequency-invariant time-stamp counter and an event trace buffer in each processor core. The proposed primitive continuously records and timestamps the last N function calls/returns per core by default, and can also be configured to watch specific memory addresses or code regions through a flexible software interface. To examine the effectiveness of the proposed primitive, we studied a variety of concurrent bugs in large commercial software and our results show that exposing the time-ordered information, function calls/returns in particular, to the programmer is highly beneficial for diagnosing the root causes of these bugs. © 2011 IEEE.

关键词： Program debugging

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Robust embedded software design through early analysis of quality faults 11

Robust embedded software design through early analysis of qu...

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Proceedings of the 4th India software engineering Conference

作者： Das, Dipankar Chakrabarti, P.P. Sinha, Purnendu Electrical and Software Architecture Group GM India Science Lab. Bangalore 560066 India Department of Computer Science and Engineering Indian Institute of Technology Kharagpur Kharagpur 721302 India

ISBN: (纸本)9781450305594

While providing correct functionality has been the thrust of most software design efforts, embedded software poses several additional challenges. Among them is designing robust software which can tolerate inaccurate inputs (coming from degraded sensors), failure of software components, and wearing-out of electro-mechanical parts it controls. For this, a design space exploration is performed and several design options are evaluated for their ability to tolerate quality (or accuracy degradation) faults. While a model-based approach enables an early analysis of quality faults, modeling and analyzing the effects of quality faults is a challenge. In this work we propose a quality fault-tolerance analysis framework which is used on operation-level models of embedded software, and an abstraction of quality-faults suitable for this analysis. The proposed method consists of characterizing individual components of the model, and then using the pre-characterized behaviors to quickly evaluate the software design. Characterization is a one-time effort and results of the same can be reused when a new design is evaluated. This results in additional speedup of upto 6-10× faster evaluation of designs, thereby facilitating a quick early evaluation of design options.

关键词： software design

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MTF: A Scalable Exchange Format for Traces of High Performance Computing Systems

MTF: A Scalable Exchange Format for Traces of High Performan...

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IEEE Workshop on Program Comprehension

作者： Luay Alawneh Abdelwahab Hamou-Lhadj Software Behaviour Analysis Group Department of Electrical and Computer Engineering Concordia University Montreal QUE Canada

Execution traces generated from running high performance computing applications (HPC) may reach tens or hundreds of gigabytes. The trace data can be used for visualization, analysis of profiling information about the target system. However, in order to make the utilization of this data efficient, the trace needs to be represented in a structure that facilitates the access to its data. One important factor that should be considered when representing trace data is scalability; the trace met model should be able to represent the trace in a compact form that enables scalability of the analysis tools. Additionally, a trace file needs to be available in a format that is well-known in the software engineering area by making it open. In this paper, we propose a metamodel for representing dynamic information generated from HPC that use the MPI standard as the inter-process communication model. MPI Trace Format (MTF) is meant to meet the aforementioned requirements and is intended to facilitate the interoperability among different trace analysis tools.

关键词： Compaction High performance computing Message passing Scalability Program processors Arrays

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Pattern Recognition Techniques Applied to the Abstraction of Traces of Inter-Process Communication

Pattern Recognition Techniques Applied to the Abstraction of...

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(CSMR) European Conference on software Maintenance and Reengineering

作者： Luay Alawneh Abdelwahab Hamou-Lhadj Software Behaviour Analysis Group Department of Electrical and Computer Engineering Concordia University Montreal QUE Canada

The large number of processors in high performance computing and distributed applications is becoming a major challenge in the analysis of the way an application's processes communicate with each other. In this paper, we propose an approach that facilitates the understanding of large traces of inter-process communication by extracting communication patterns that characterize their main behavior. Two algorithms are proposed. The first one permits the recognition of repeating patterns in traces of MPI (Message Passing Interface) applications whereas the second algorithm searches if a given communication pattern occurs in a trace. Both algorithms are based on the n-gram extraction technique used in natural language processing. Unlike existing work, our approach operates on the trace as it is generated (i.e. on the fly) and does not require complex and computationally-expensive data structures. We show the effectiveness and efficiency of our approach in detecting communication patterns from large traces generated from two target systems.

关键词： Pattern matching software Algorithm design and analysis Topology Detection algorithms Message passing

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ReLACK: A Reliable VoIP Steganography Approach

ReLACK: A Reliable VoIP Steganography Approach

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International Conference on Secure System Integration and Reliability Improvement, SSIRI

作者： Mohammad Hamdaqa Ladan Tahvildari Software Technologies Applied Research (STAR) Group Department of Electrical and Computer Engineering University of Waterloo Waterloo Canada

VoIP steganography is a real-time network steganography, which utilizes VoIP protocols and traffic as a covert channel to conceal secret messages. Recently, there has been a noticeable increase in the interest in VoIP steganography due to the volume of VoIP traffic generated, which proved to be economically feasible to utilize. This paper discusses VoIP steganography challenges, compares the existing mechanisms, and proposes a new VoIP steganography approach. Current VoIP steganography techniques lack mechanisms to provide reliability without weakening the steganography system. Accordingly, this paper modifies the (k, n) threshold secret sharing scheme, which is based on Lagrange's Interpolation, and then applies a two phase approach on the LACK steganography mechanism to provide reliability and fault tolerance and to increase steganalysis complexity. The cost of reliability is a loss in bandwidth, therefore, the proposed approach also provides mechanisms to maximize packets utilization to mitigate the effect of adding redundancy.

关键词： Protocols Cryptography Reliability Receivers Codecs Polynomials Interpolation

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Time-Ordered Event Traces: A New Debugging Primitive for Concurrency Bugs

Time-Ordered Event Traces: A New Debugging Primitive for Con...

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International Symposium on Parallel and Distributed Processing (IPDPS)

作者： Martin Dimitrov Huiyang Zhou Software and Services Group Intel Corporation Chandler AZ USA Department of Electrical and Computer Engineering North Carolina State University Raleigh NC USA

关键词： computer bugs Instruction sets Debugging Engines Concurrent computing

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Exploring the Development of Micro-apps: A Case Study on the BlackBerry and Android Platforms

Exploring the Development of Micro-apps: A Case Study on the...

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IEEE International Workshop on Source Code Analysis and Manipulation

作者： Mark D. Syer Bram Adams Ying Zou Ahmed E. Hassan Software Analysis and Intelligence Laboratory(SAIL) School of Computing Queen's University Canada Software Reengeeniring Research Group Department of Electrical and Computer Engineering Queen's University Canada

The recent meteoric rise in the use of smart phones and other mobile devices has led to a new class of applications, i.e., micro-apps, that are designed to run on devices with limited processing, memory, storage and display resources. Given the rapid succession of mobile technologies and the fierce competition, micro-app vendors need to release new features at break-neck speed, without sacrificing product quality. To understand how different mobile platforms enable such a rapid turnaround-time, this paper compares three pairs of feature-equivalent Android and Blackberry micro-apps. We do this by analyzing the micro-apps along the dimensions of source code, code dependencies and code churn. BlackBerry micro-apps are much larger and rely more on third party libraries. However, they are less susceptible to platform changes since they rely less on the underlying platform. On the other hand, Android micro-apps tend to concentrate code into fewer files and rely heavily on the Android platform. On both platforms, code churn of micro-apps is very high.

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A framework for early stage quality-fault tolerance analysis of embedded control systems

A framework for early stage quality-fault tolerance analysis...

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International Conference on Dependable Systems and Networks (DSN)

作者： S. G. Vadlamudi P. P. Chakrabarti Dipankar Das Purnendu Sinha Department of Computer Science and Engineering Indian Institute of Technology Kharagpur Kharagpur India Electrical and Software Architecture Group General Motors India Science Laboratory Bangalore India

This work presents a static-analysis based method for analyzing the robustness of a given embedded control system design, in the presence of quality-faults in sensors, software components, and inter-connections. The method characterizes the individual components of the system by storing the relations between the precision of inputs and the precision of outputs in what we call, lookup tables (LUTs). A network of LUTs thus formed which represent the given control system is converted into a satisfiability modulo theory (SMT) instance, such that a satisfying assignment corresponds to a potential counterexample (the set of quality-faults which violate the given fault-tolerance requirements) or hot-spot in the design. Hot-spots obtained in this manner are counter-verified through simulation to filter the false-positives. Experimental results on the fault-tolerant fuel controller from Simulink automotive library demonstrate the efficacy of the proposed approach.

关键词： Sensors Degradation Fault tolerant systems Noise Fault tolerance Trajectory Table lookup

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