A new expression is proposed to analyze the linearization effectiveness of derivative superposition （DS） with large and small signal inputs, and different optimization methods of DS are found for different input mag...
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A new expression is proposed to analyze the linearization effectiveness of derivative superposition （DS） with large and small signal inputs, and different optimization methods of DS are found for different input magni tudes. A power amplifier driver （PAD） with largesignal optimized DS was implemented in 0.13/,m technology within a reconfigurable RF transmitter. The PAD is compatible with the GSM band at 900 MHz and the WCDMA band at 1.95 GHz, and it has a gain range of 44 dB with a step of 2 dB. Measurement results show that the over all OIP3 of the transmitter is better than 19 dBm, and the output referred 1dB compression point is better than 7.5 dBm.
A 1500 mA,10 MHz self-adaptive on-time （SOT） controlled buck DC-DC converter is presented. Both a low-cost ripple compensation scheme （RCS） and a self-adaptive on-time generator （SAOTG） are proposed to solve the...
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A 1500 mA,10 MHz self-adaptive on-time （SOT） controlled buck DC-DC converter is presented. Both a low-cost ripple compensation scheme （RCS） and a self-adaptive on-time generator （SAOTG） are proposed to solve the system stability and frequency variation problem. Meanwhile a self-adaptive power transistor sizing （SAPTS） technique is used to optimize the efficiency especially with a heavy load. The circuit is implemented in a 2P4M 0.35μm CMOS process. A small external inductor of 0.47 μH and a capacitor of 4.7 μF are used to lower the cost of the converter and keep the output ripple to less than 10 mV. The measurement results show that the overshoot of the load transient response is 8 mV @ 200 mA step and the dynamic voltage scaling （DVS） performance is a rise of 16/zs/V and a fall of 20 μs/V. With a SAPTS technique and PFM control, the efficiency is maintained at more than 81% for a load range of 20 to 1500 mA and the peak efficiency reaches 88.43%.
We verify the domain sideway motion around the peripheral regions of the crossed capacitors of top and bottom electrode bars without electrode *** avoid the crosstalk problem between adjacent memory cells,the safe dis...
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We verify the domain sideway motion around the peripheral regions of the crossed capacitors of top and bottom electrode bars without electrode *** avoid the crosstalk problem between adjacent memory cells,the safe distance between adjacent elements of Pt/SrBi_(2)Ta_(2)O_(9)/Pt thin−film capacitors is estimated to be 0.156µ***,the fatigue of Pt/SrBi_(2)Ta_(2)O_(9)/Pt thin-film capacitors is independent of the individual memory size due to the absence of etching damage.
The unipolar diode-like domain wall currents in LiNbO3 single-crystal nanodevices are not only attractive in terms of their applications in nonvolatile ferroelectric domain wall memory,but also useful in half-wave and...
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The unipolar diode-like domain wall currents in LiNbO3 single-crystal nanodevices are not only attractive in terms of their applications in nonvolatile ferroelectric domain wall memory,but also useful in half-wave and full-wave rectifier systems,as well as detector,power protection,and steady voltage *** traditional diodes,where the rectification functionality arises from the contact between n-type and p-type conductors,which are unchanged after off-line production,ferroelectric domain wall diodes can be reversibly created,erased,positioned,and shaped,using electric *** demonstrate such functionality using ferroelectric mesa-like cells,formed at the surface of an insulating X-cut LiNbO_(3) single *** the application of an in-plane electric field above a coercive field along the polar Z axis,the domain within the cell is reversed to be antiparallel to the unswitched bottom domain via the formation of a conducting domain *** wall current was rectified using two interfacial volatile domains in contact with two side Pt *** the nonvolatile inner domain wall,the interfacial domain walls disappear to turn off the wall current path after the removal of the applied electric field,or under a negative applied voltage,due to the built-in interfacial imprint *** novel devices have the potential to facilitate the random definition of diode-like elements in modern large-scale integrated circuits.
On the basis of novel properties of ferroelectric conducting domain walls,the domain wall nanoelectronics emerges and provides a brand-new dimension for the development of high-density,high-speed and energy-efficient ...
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On the basis of novel properties of ferroelectric conducting domain walls,the domain wall nanoelectronics emerges and provides a brand-new dimension for the development of high-density,high-speed and energy-efficient *** in-memory computing,three-terminal devices with both logic and memory functions such as transistors purely based on ferroelectric domain walls are urgently ***,a prototype ferroelectric domain-wall transistor with a well-designed coplanar electrode geometry is demonstrated on epitaxial Bi Fe O_(3)thin *** the logic function,the current switching between on/off states of the transistor depends on the creation or elimination of conducting domain walls between drain and source *** the data storage,the transistor can maintain nonvolatile on/off states after the write/erase operations,providing an innovative approach for the development of the domain wall nanoelectronics.
Ferroelectric domain walls appear as sub-nanometer-thick topological interfaces separating two adjacent domains in different orientations,and can be repetitively created,erased,and moved during programming into differ...
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Ferroelectric domain walls appear as sub-nanometer-thick topological interfaces separating two adjacent domains in different orientations,and can be repetitively created,erased,and moved during programming into different logic states for the nonvolatile memory under an applied electric field,providing a new paradigm for highly miniaturized low-energy electronic *** some specific conditions,the charged domain walls are conducting,differing from their insulating bulk *** the past decade,the emergence of atomic-layer scaling solid-state electronic devices is such demonstration,resulting in the rapid rise of domain wall *** review aims to the latest development of ferroelectric domain-wall memories with the presence of the challenges and opportunities and the roadmap to their future commercialization.
Sample-time error between channels degrades the resolution of time-interleaved analog-to-digital converters （TIADCs）.A calibration method implemented in mixed circuits with low complexity and fast convergence is pro...
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Sample-time error between channels degrades the resolution of time-interleaved analog-to-digital converters （TIADCs）.A calibration method implemented in mixed circuits with low complexity and fast convergence is proposed in this *** algorithm for detecting sample-time error is based on correlation and widely applied to wide-sense stationary input *** detected sample-time error is corrected by a voltage-controlled sampling *** experimental result of a 2-channel 200-MS/s 14-bit TIADC shows that the signal-to-noise and distortion ratio improves by 19.1 dB,and the spurious-free dynamic range improves by 34.6 dB for a 70.12-MHz input after *** calibration convergence time is about 20000 sampling intervals.
A single loop fourth-order delta-sigma modulator is presented for audio applications. A reconfigurable mechanism is adopted for two bandwidth-based modes （8 kHz/16 kHz）. Manufactured in the SM1C 0.13μm CMOS mixed s...
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A single loop fourth-order delta-sigma modulator is presented for audio applications. A reconfigurable mechanism is adopted for two bandwidth-based modes （8 kHz/16 kHz）. Manufactured in the SM1C 0.13μm CMOS mixed signal process, the chip consumes low power （153.6 μW） and occupies a core area of 0.98×0.46 mm2. The presented modulator achieves an 89.3 dB SNR and 90.2 dB dynamic range in 16 kHz mode, as well as a 90.2 dB SNR and 86 dB dynamic range in 8 kHz mode. The designed modulator shows a very competitive figure of merit among state-of-the-art low voltage modulators.
Due to the rise in the number of vehicles in the past few years,the frequency of traffic accident has increased as well,resulting in huge *** a means to improve traffic safety,advanced driver assistance system(ADAS)ha...
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ISBN:
(纸本)9781509066261;9781509066254
Due to the rise in the number of vehicles in the past few years,the frequency of traffic accident has increased as well,resulting in huge *** a means to improve traffic safety,advanced driver assistance system(ADAS)has gradually gained more ***,it is difficult for traditional traffic sign recognition algorithms to achieve high accuracy in the ADAS whose scenarios are various in the practical *** most current methods based on convolution neural network(CNN) for traffic sign recognition has large amount of parameters,making its implementation on resource-limited hardware platform *** this work,we present a FPGA-based convolution neural network module for the recognition of traffic signs in *** results shows that the accuracy rate of the model is 98.1%,the total number of parameters is 4.7 M,only accounting for 12.5% of Alex Net,and the number of calculation in single forward transmission is 703.2 M,which takes up 61.4% of Alex Net.
Placement is a critical task with high computation complexity in VLSI physical design. Modern analytical placers formulate the placement objective as a nonlinear optimization task, which suffers a long iteration time....
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