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15th IEEE International Conference on asic, asicON 2023

作者： Wu, Haoyu Lin, Liyu Sun, Haodong Zeng, Xiaoyang Chen, Yun Fudan University State Key Lab of ASIC & System Shanghai200433 China

ISBN: (纸本)9798350312980

The COordinate Rotation DIgital Computer (CORDIC) simplifies the elementary function using bit-shift operation and addition. However, the iteration increases with the accuracy and causes a long latency. In this paper, we propose a decision-based CORDIC hardware for arc tangent calculation, which introduce a comparator to determine the necessity of the rotation in every iteration. By bypassing the redundant processes, the proposed CORDIC achieve a higher accuracy. Besides, the regular structure is also friendly for folding implementation. Experiments show that compare with the conventional CORDIC, the decision-based CORDIC hardware has an improvement of 28.1% in accuracy. Synthesis results in 65nm technology shows that the proposed unfolding hardware consumes an area of 0.774mm2 and a power of 0.644mW under 65nm technology, which has an improvement of about 13.7% and 3% in comparison with the conventional CORDIC, and the folding structure has an area of 0.164mm2 and a power of 0.243mW. © 2023 IEEE.

关键词： arc tangent CORDIC Decision-Based

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Construction of mesoporous silica-implanted tungsten oxides for selective acetone gas sensing

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Chinese Chemical Letters 2024年第11期35卷 492-498页

作者： Jichun Li Zhengren Wang Yu Deng Hongxiu Yu Yonghui Deng Xiaowei Cheng Kaiping Yuan Department of Chemistry Shanghai Stomatological Hospital&School of StomatologyState Key Laboratory of Molecular Engineering of PolymersShanghai Key Laboratory of Molecular Catalysis and Innovative MaterialsiCHEMFudan UniversityShanghai 200433China Frontier Institute of Chip and System State Key Laboratory of ASIC and SystemFudan UniversityShanghai 200433China State Key Lab of Transducer Technology Shanghai Institute of Microsystem and Information Technology Chinese Academy of Sciences Shanghai 200050China

As a key biomarker for noninvasive diagnosis of diabetes,the selective detection of trace acetone in exhaled gas using a portable and low-cost device remains a great *** metal oxide(SMO)based gas sensors have drawn signification attention due to their potential in miniaturization,user-friendliness,high cost-effectiveness and selective real-time detection for noninvasive clinical ***,we propose a one-pot solvent evaporation induced tricomponent co-assembly strategy to design a novel ordered mesoporous SMO of silica-implanted WO_(3)(Si O_(2)/WO_(3))as sensing materials for trace acetone *** controlled co-assembly of silicon and tungsten precursors and amphiphilic diblock copolymer poly(ethylene oxide)-block-polystyrene(PEO-b-PS),and the subsequent thermal treatment enable the local lattice disorder of WO_(3)induced by the amorphous silica and the formation of ordered mesoporous Si O_(2)/WO_(3)hybrid walls with a unique metastableε-phase WO_(3)*** obtained mesoporous SiO_(2)/WO_(3)composites possess highly crystalline framework with large uniform pore size(12.0-13.3 nm),high surface area(99-113 m^(2)/g)and pore volume(0.17-0.23 cm^(3)/g).Typically,the asfabricated gas sensor based on mesoporous 2.5%Si O_(2)/WO_(3)exhibits rapid response/recovery rate(5/17 s),superior sensitivity(R_(air)/R_(gas)=105 for 50 ppm acetone),as well as high selectivity towards *** limit of detection is as low as 0.25 ppm,which is considerably lower than the thresh value of acetone concentration(>1.1 ppm)in the exhaled breath of diabetic patients,demonstrating its great prospect in real-time monitoring in diabetes ***,the mesoporous 2.5%Si O_(2)/WO_(3)sensor is integrated into a wireless sensing module connected to a smart phone,providing a convenient real-time detection of acetone.

关键词： Mesoporous materials ε-Tungsten oxide Silica-implanted Acetone sensing Real-time detection

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LTRNet: A Lightweight Topography Recognition Network 16

LTRNet: A Lightweight Topography Recognition Network

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16th IEEE International Conference on Solid-state and Integrated Circuit Technology, ICSICT 2022

作者： Liu, Yixuan Song, Tianhui Chen, Yun Fudan University The State Key Lab of Asic & System Shanghai China

ISBN: (数字)9781665469067

ISBN: (纸本)9781665469067

Topography recognition is essential for environmental science and ecological research. Conventionally, the deep-learning-based method will improve the recognition accuracy, but the large model size limits the application on the platform like UAVs (unmanned aerial vehicles). This paper proposes the LTRNet (Lightweight Topography Recognition Network) to improve accuracy and reduce computational complexity. Besides, we manually prepared a dataset located in China. 1545 DEM (digital elevation model) imagines are collected, including four categories of topography: city, hill, mountain, and plain. Experimental results on our dataset show that the LTRNet has an accuracy of 88.4% and only has a size of 0.58MB. © 2022 IEEE.

关键词： Topography

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Critical band-to-band-tunnelling based optoelectronic memory

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Light(Science & Applications) 2025年第3期14卷 757-766页

作者： Hangyu xu Runzhang Xie Jinshui Miao Zhenhan Zhang Haonan Ge Xumina Shi Min Luo Jinjin Wang Tangxin Li Xiao Fu Johnny CHo Peng Zhou Fang Wang Weida Hu State Key Laboratory of Infrared Physics Shanghai Institute of Technical PhysicsChinese Academy of Sciences500 Yu Tian Road200083ShanghaiChina University of Chinese Academy of Sciences BeijingChina ASIC&System State Key Laboratory School of MicroelectronicsFudan UniversityShanghaiChina Shanghai Research Institute for Intelligent Autonomous Systems Tongji University200092ShanghaiChina Department of Materials Science and Engineering and State Key Laboratory of Terahertz and Millimeter Waves City University of Hong KongKowloon TongHong Kong SARChina

Neuromorphic vision hardware,embedded with multiple functions,has recently emerged as a potent platform for machine *** realize memory in sensor functions,reconfigurable and non-volatile manipulation of photocarriers is highly ***,previous technologies bear mechanism challenges,such as the ambiguous optoelectronic memory mechanism and high potential barrier,resulting in a limited response speed and a high operating ***,for the first time,we propose a critical band-to-band tunnelling(BTBT)based device that combines sensing,integration and memory *** nearly infinitesimal barrier facilitates the tunnelling process,resulting in a broadband application range(94o nm).Furthermore,the observation of dual negative differential resistance(NDR)points confirms that the critical BTBT of photocarriers contributes to the sub-microsecond photomemory *** the photomemory speed,with no motion blur,is important for motion detection,the critical BTBT memory is expected to enable moving target tracking and recognition,underscoring its superiority in intelligentperception.

关键词： photocarrier manipulation optoelectronic memory mechanism machine visionto photomemory speed optoelectronic memory critical band band tunnelling neuromorphic vision hardware negative differential resistance

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A 3GHz Phase-Locked Loop Design for SerDes Application 16

A 3GHz Phase-Locked Loop Design for SerDes Application

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16th IEEE International Conference on Solid-state and Integrated Circuit Technology, ICSICT 2022

作者： Yang, Yuting Lyu, Bingrong Ye, Fan Ren, Junyan Fudan University State Key Lab. of Asic & System Shanghai China

ISBN: (数字)9781665469067

ISBN: (纸本)9781665469067

A 0.9V high performance 3GHz charge pump phase-locked loop (CP PLL) has been designed in TSMC 28nm CMOS technology, which features high accuracy charge pump (CP) and low phase noise LC voltage-controlled oscillator (LC-VCO). The nonideal effects and corresponding solutions for CP and LC-VCO are discussed in the paper. The post-layout simulation results show that the PLL could achieve 0.86ps rms jitter and 13mW power consumption at 3GHz. © 2022 IEEE.

关键词： Phase locked loops

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Conditional Cycle Termination RANSAC 17

Conditional Cycle Termination RANSAC

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17th IEEE International Conference on Solid-state and Integrated Circuit Technology, ICSICT 2024

作者： Jiang, Tong Huang, Yujie Peng, Liyuan Wang, Mingyu Li, Wenhong Jing, Minge Zeng, Xiaoyang Fudan University State Key Lab of ASIC & System Shanghai201203 China Shanghai ExploreX Technology Co. Ltd. Shanghai200120 China

ISBN: (纸本)9798350361834

In the field of computer vision, the acquired dataset usually contains a certain number of outliers and noise, which leads to errors in the estimated mathematical model. RANSAC estimates model parameters by randomly selecting a subset of the data, reducing the impact of these outliers and noise. However, for datasets with a high proportion of inliers, the traditional RANSAC has to perform a large number of cyclic modeling operations after finding the correct model. In this paper, a conditional termination verification strategy for RANSAC is presented. We boldly terminated the cycle operation early which reduced the amount of computation by 17.78% and increased the computation speed by 34.09%. © 2024 IEEE.

关键词： Conditional termination Inliers Model evaluation Outliers RANSAC

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S-SIFT: A Simple SIFT Algorithm with High Efficiency 17

S-SIFT: A Simple SIFT Algorithm with High Efficiency

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17th IEEE International Conference on Solid-state and Integrated Circuit Technology, ICSICT 2024

作者： Wang, Yixue Huang, Yujie Peng, Liyuan Wang, Mingyu Li, Wenhong Jing, Minge Zeng, Xiaoyang Fudan University State Key Lab of ASIC & System Shanghai200433 China Shanghai ExploreX Technology Co. Ltd. Shanghai200120 China

ISBN: (纸本)9798350361834

Finding distinctions and connections between multiple visual targets through the detection of keypoints has become one of the research hot-spots in the field of computer vision. SIFT has received wide recognition and attention for its powerful performance in image match. However, the original SIFT has high complexity and time-consuming problems. In this paper, we propose Simple SIFT (S-SIFT), an improved SIFT algorithm in which the construction of Gaussian pyramid and the order of detection steps have been changed. Through the collaborative improvement and optimization on the scale space and algorithm framework, a more efficient local keypoints detecting method is achieved. Experiments demonstrat that SSIFT guarantees satisfactory accuracy with a significant reduction in the computational overhead. Meanwhile, S-SIFT is robust to common image deformations such as rotation, scale change and affine. © 2024 IEEE.

关键词： Image matching

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Automated Design of Complex Analog Circuits with Multiagent Based Reinforcement Learning 23

Automated Design of Complex Analog Circuits with Multiagent ...

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Proceedings of the 60th Annual ACM/IEEE Design Automation Conference

作者： Jinxin Zhang Jiarui Bao Zhangcheng Huang Xuan Zeng Ye Lu State Key Lab. of ASIC & System School of Information Science and Technology Frontier Institute of Chip and System State Key Lab. of ASIC & System Microelectronics Department Fudan University Shanghai China

ISBN: (纸本)9798350323481

Despite the effort of analog circuit design automation, currently complex analog circuit design still requires extensive manual iterations, making it labor intensive and time-consuming. Recently, reinforcement learning (RL) algorithms have been demonstrated successfully for the analog circuit design optimization. However, a robust and highly efficient RL method to design analog circuits with complex design space has not been fully explored yet. In this work, inspired by multiagent planning theory as well as human expert design practice, we propose a multiagent based RL (MA-RL) framework to tackle this issue. Particularly, we (i) partition the complex analog circuits into several sub-blocks based on topology information and effectively reduce the complexity of design search space; (ii) leverage MA-RL for the circuit optimization, where each agent corresponds to a single sub-block, and the interactions between agents delicately mimic the best design tradeoffs between circuit sub-blocks by human experts; (iii) introduce the multiagent twin-delayed techniques to further boost training stability and accomplish higher performances. Experiments on two different analog circuit topologies and knowledge transfers between two technology nodes are demonstrated. It's shown that MA-RL framework can achieve the best FoM for complex analog circuits design. This work shines the light for future large scale analog circuit system design automation.

关键词： complex analog circuits

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A Fast and Resource-efficient GSOP Implementation for Optical Coherent Receivers 16

A Fast and Resource-efficient GSOP Implementation for Optica...

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16th IEEE International Conference on Solid-state and Integrated Circuit Technology, ICSICT 2022

作者： Zhang, Hongyi He, Siqi Lin, Liyu Chen, Yun Zeng, Xiaoyang Fudan University The State Key Lab of Asic & System Department of Microelectronics Shanghai200433 China

ISBN: (数字)9781665469067

ISBN: (纸本)9781665469067

In-phase/quadrature(I/Q) imbalance compensation is an important procedure in optical coherent systems, and the Gram-Schmidt orthogonalization procedure (GSOP) is one of the most widely used compensation algorithms. However, the division and square-root operations consume a lot of hardware resources, limiting the speed of FPGA implementation. This paper proposes a fast and resource-efficient GSOP implementation by converting square-root and division operations into linear fitting. We introduce the Newton iteration method to compensate for the accuracy degradation. The FPGA implementation shows that the throughput of the 128-way-parallel GSOP is up to 100Gbps at the frequency of 392MHz. © 2022 IEEE.

关键词： Iterative methods

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A High Throughput Fully Parallel FFT with CSD Constant Multiplier 16

A High Throughput Fully Parallel FFT with CSD Constant Multi...

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16th IEEE International Conference on Solid-state and Integrated Circuit Technology, ICSICT 2022

作者： He, Siqi Zhang, Hongyi Lin, Liyu Chen, Yun Zeng, Xiaoyang Fudan University The State Key Lab of Asic & System Department of Microelectronics Shanghai200433 China

ISBN: (数字)9781665469067

ISBN: (纸本)9781665469067

This paper presents a fully parallel FFT architecture. In order to build hardware-efficient rotators, constant twiddle factors are converted into Canonical Signed Digit (CSD) representation to facilitate the implementation of rotators as shift-and-add operations. In addition, the word length of input and twiddle factors are reduced to meet the accuracy requirement, which further reduces the resource overhead and improves throughput. Experimental results show that the maximum clock frequency of the proposed 128-point fully parallel FFT architecture is close to 650MHz, and the throughput is up to 83GS/s. © 2022 IEEE.

关键词： Fast Fourier transforms

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