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2nd International Conference on Mechanical engineering, Industrial Electronics and Informatization, MEIEI 2013

作者： Wang, Xiao Rui Wang, Qing Xian China National Digital Switching System Engineering and Technological Research Center Zhengzhou 450002 China State Key Laboratory of Mathematical Engineering and Advanced Computing Zhengzhou 450002 China

ISBN: (纸本)9783037858905

To deal with the problem of external storages management in multiple virtual machines environment, a system design scheme of external storages management is proposed with the idea of virtual memory management and protocol of object-based Network storage. Experiments showed that virtual partition could be created and repealed dynamic, the capability of partition could be increased dynamic with practical requirement, and write protection based partition could also be realized, flexibility of external storages management is enhanced greatly and usage efficiency also increased notably. © (2013) Trans Tech Publications, Switzerland.

关键词： Network security

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The Synchronization Treatment in Implementing Data-Parallel programming languages on CPUs

The Synchronization Treatment in Implementing Data-Parallel ...

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International Workshop on Intelligent Communication and Social Networks

作者： Feng Yue Jianmin Pang Rongcai Zhao Chao Dai State Key Laboratory of Mathematical Engineering and Advanced Computing

ISBN: (纸本)9781479909735

When implementing data-parallel programming languages such as CUDA, OpenCL on CPUs, synchronization must be simulated correctly. The basic method is thread-based, which means all thread must execute one instruction in turn before execute the next one. In this paper, we propose function splitting to treat synchronization in a coroutine style but not just thread-based. It splits the data-parallel function presented by low-level intermediate representation into several parts by simulating synchronization. We evaluate our method in translating PTX kernels to multi-core CPUs, the result of which shows this method could promotes performance by 15% compared to thread-based method. Our main contribution is a generous synchronization treatment that performs on low-level intermediate code given by a control flow graph in SSA form.

关键词： Data Parallelism Synchronization Thread Function Splitting Low-Level Intermediate Code SSA

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A cost model for automatic OpenMP parallelization

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Ruan Jian Xue Bao/Journal of Software 2014年 25卷 101-110页

作者： Li, Yan-Bing Zhao, Rong-Cai Liu, Xiao-Xian Zhao, Jie PLA Information Engineering University Zhengzhou450001 China State Key Laboratory of Mathematical Engineering and Advanced Computing Zhengzhou450001 China Logistics Information Center Guangzhou Military Region Joint Logistics Department Guangzhou510000 China

Existing OpenMP cost models does not give enough thought to the implementation details of OpenMP programs so they cannot be applied widely to different types of parallel loops. To solve this problem, this study extends the cost model in the most advanced product-level optimizing compiler Open64. Targeting single candidate parallel loop, it establishes a cost model suite for the OpenMP benefit analysis. Besides improving the original DOALL-loop faced cost model in the Open64 compiler, two additional models which are also designed for DOACROSS and DSWP (Decoupled Software Pipelining) loops respectively. The experimental results show that the proposed cost model suite can simulate the execution cost of parallel programs very well, and therefore can better support cost evaluation of OpenMP parallelization. ©2014 ISCAS.

关键词： Cost benefit analysis

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Research on Stream Cipher Model Based on Chaos Theory

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International Journal of Technology Management 2013年第2期 91-93页

作者： Sun Wenjie State Key Laboratory of Mathematical Engineering and Advanced Computing Zhengzhou Henan 102206

Chaos is a similar and random process which is very sensitive to initial value in deterministic system. It is a performance of nonlinear dynamical system with built-in randomness. Combined with the advantages and disadvantages of the present chaos encryption model, the paper proposes a chaotic stream cipher model based on chaos theory, which not only overcomes finite precision effect, but also improves the randomness of chaotic system and output sequence. The Sequence cycle theory generated by the algorithm can reach more than 10600 at least, which completely satisfies the actual application requirements of stream cipher system.

关键词： chaos theory stream cipher algorithm

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Method based on GSCPN for network vulnerability analysis

Journal of Software

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Journal of Software 2013年第8期8卷 2032-2038页

作者： Gao, Xiang Zhu, Yue-Fei Fei, Jin-Long Han, Tao State Key Laboratory of Mathematical Engineering and Advanced Computing Zhengzhou 450002 China

With the development of network security research, network attack modeling and analysis techniques have been paid more and more attention. A generalized stochastic colored Petri Net (GSCPN) Model is proposed. To each attack, a GSCPN model is constructed to describe the relation of components graphically. Algorithm to construct a composite attack and method for network vulnerability analysis are delivered also. The exploitation cost of vulnerabilities is estimated. The method is relatively simple, which is different from traditional method. The network example further validates the proposed method for network vulnerability analysis. © 2013 ACADEMY PUBLISHER.

关键词： Network security

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An Automatic Parallel-Stage Decoupled Software Pipelining Parallelization Algorithm Based on OpenMP

An Automatic Parallel-Stage Decoupled Software Pipelining Pa...

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IEEE International Conference on Trust, Security and Privacy in computing and Communications (TrustCom)

作者： Xiaoxian Liu Rongcai Zhao Lin Han Peng Liu State Key Laboratory of Mathematical Engineering and Advanced Computing Zhengzhou China

ISBN: (纸本)9781479914449

While multicore processors increase throughput for multi-programmed and multithreaded codes, many important applications are single threaded and thus do not benefit. Automatic parallelization techniques play an important role in migrating singe threaded applications to multicore platforms. Unfortunately, the prevalence of control flow, recursive data structures, and general pointer accesses in ordinary programs renders the traditional automatic parallelization techniques unsuitable. Parallel-Stage Decoupled Software Pipelining (PS-DSWP) is proposed to exploit fine-grained pipeline parallelism lurking in ordinary programs with the existence of all kinds of dependences, including arbitrary control dependences, at the instruction level. But it requires knowledge of architectural properties and hardware support of a communication channel and two special instructions. We propose an improved PS-DSWP algorithm based on OpenMP in this paper. It is implemented without relying on CPU architectures by using a high level intermediate representation. Moreover, the Program Dependence Graph (PDG) used in the algorithm is built based on the basic blocks, which exploits coarser-grained parallelism than the original PS-DSWP transformation with PDG based on instructions. OpenMP is employed in our algorithm to assign task and implement synchronization among threads while avoiding dependence on hardware support. We evaluate the loops with complex memory patterns and control flow, which cannot be dealt with by traditional techniques, on multicore platform. As a result, they can be parallelized and gain significant performance improvement with our algorithm. We obtain a maximum speedup as high as 2.07x and on average 1.39x with 5 threads.

关键词： Instruction sets Synchronization Pipeline processing Multicore processing Merging

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Convergence and Scalarization in Whole Function Vectorization

Convergence and Scalarization in Whole Function Vectorizatio...

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IEEE International Symposium on Dependable, Autonomic and Secure computing (DASC)

作者： Feng Yue Jianmin Pang Jiuzhen Jin Dai Chao State Key Laboratory of Mathematical Engineering and Advanced Computing Zhengzhou China

When implementing SPMD programs on multi core platforms, whole function vectorization is an important optimization method. SPMD program has drawback that lots of instructions across multi threads are redundant which is sustained in vectorization. This paper proposes to alleviate this overhead by detecting scalar operations and extract them out in vectorization instructions. An algorithm is designed to deal with control flow and data flow synchronously in which convergent and invariance analysis is employed to statically identify convergent execution and invariant values or instructions. Our algorithm is effectively on implementing SPMD programs on multi core platforms. The experiments show our method could improve the execution efficiency by 13.3%.

关键词： Convergence Optimization Algorithm design and analysis Vectors Instruction sets Graphics processing units Multicore processing

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One Wide-Sense Circuit Tree per Traffic Class Based Inter-domain Multicast

One Wide-Sense Circuit Tree per Traffic Class Based Inter-do...

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International Conference on Networking, Architecture, and Storage (NAS)

作者： Chen Yue Li Chaoling Huang Kaixiang Zhang Xiaobo State Key Laboratory of Mathematical Engineering and Advanced Computing Zhengzhou China

Traditional multicast protocol forms multicast trees rooted at different sources to forward packets. If the multicast sources and receivers are in different domains, these trees will produce a great number of multicast states in the backbone, resulting in poor scalability. Therefore, we propose a one Wide-Sense Circuit Tree per Traffic Class based inter-domain multicast (WSCT-TC), in which a Wide-Sense Circuit Tree (WSCT) is established for a class of multicast traffic. The WSCT is established in the backbone, along which multicast packets are forwarded by label switching. The spec of WSCT can be reconfigured according to the QoS (Quality of Service) requirement of multicast applications, to provide preferable QoS. Simulating experiment shows that WSCT-TC behaves better scalability.

关键词： Switches Receivers IP networks Quality of service Routing protocols Internet

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The Speedup Model for Manycore Processor

The Speedup Model for Manycore Processor

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International Conference on Information Science and Cloud computing Companion (ISCC-C)

作者： Nan Ye Ziyu Hao Xianghui Xie State Key Laboratory of Mathematical Engineering and Advanced Computing Wuxi China

ISBN: (纸本)9781479952465

Integrating a large number of simple cores on the chip to provide the desired performance and throughput, microprocessor has entered the many core era. In order to fully extract the ability of the many core processor, we propose speedup models for many core architecture in this paper. Under the assumption of Hill-Marty model, we deduce our formulas based on Gustafson's Law and Sun-Ni's Law. Then, compared with the Hill-Marty model, we theoretically analyze the best allocation under the given resources. Furthermore, we apply the conclusions of our models to evaluate current many core processors and predict concrete future architecture. Our results show that the many core architecture is capable of extensive scalability and being beneficial to promote the performance, especially heterogeneous one. By using simple analytical models, we provide a better understanding of architecture design and our work complement existing studies.

关键词： Computational modeling Computer architecture Complexity theory Analytical models Parallel processing Predictive models Resource management

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Embedding change rate estimation based on ensemble learning 13

Embedding change rate estimation based on ensemble learning

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1st ACM Workshop on Information Hiding and Multimedia Security, IH and MMSec 2013

作者： Li, Zhenyu Hu, Zongyun Luo, Xiangyang Lu, Bin State Key Laboratory of Mathematical Engineering and Advanced Computing Zhengzhou 450002 China Zhengzhou Institute of Information Science and Technology Zhengzhou 450002 China State Key Laboratory of Information Security Institute of Information Engineering Chinese Academy of Sciences Beijing 100093 China

ISBN: (纸本)9781450320818

In order to achieve higher estimation accuracy of the embedding change rate of a stego object, an ensemble learning-based estimation method is presented. First of all, a framework of embedding change rate estimation based on estimator ensemble is proposed. Then an algorithm of building the estimator ensemble, the core of the framework, is concretely described. Finally, a pruning method for estimator ensemble is proposed in consideration of both the diversity among the base estimators and accuracy of each of them. The experimental results for three modern steganographic algorithms (nsF5, PQ and PQt) indicate that the proposed method acquired better performance than the existed typical method. Furthermore, the pruned estimator ensemble with less base estimators maintained, even slightly improved the estimation accuracy, compared to the one without purning. © 2013 ACM.

关键词： Steganography

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