In this paper,the mechanisms of material removal in chemical mechanical polishing(CMP)processes are investigated in detail by the smoothed particle hydrodynamics(SPH)*** feature-scale behaviours of slurry flow,rough p...
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In this paper,the mechanisms of material removal in chemical mechanical polishing(CMP)processes are investigated in detail by the smoothed particle hydrodynamics(SPH)*** feature-scale behaviours of slurry flow,rough pad,wafer defects,moving solid boundaries,slurry-abrasive interactions,and abrasive collisions are modelled and *** with previous work on CMP simulations,our simulations incorporate more realistic physical aspects of the CMP process,especially the effect of abrasive concentration in the slurry *** preliminary results on slurry flow in CMP provide microscopic insights on the experimental data of the relation between the removal rate and abrasive concentration and demonstrate that SPH is a suitable method for the research of CMP processes.
In this work,we first systematically investigated the growth of AlO on M0S2 basal plane by atomic layer *** from the previous reports,we found that AlO growth are in forms of island-like clusters on basal plane of as-...
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In this work,we first systematically investigated the growth of AlO on M0S2 basal plane by atomic layer *** from the previous reports,we found that AlO growth are in forms of island-like clusters on basal plane of as-exfoliated M0S2 flakes,and within our measurement range,neither the growth temperature nor the pulse time has an obvious impact on *** order to achieve uniform growth of AlO,we applied
A low kickback noise and offset calibrated dynamic comparator used in a high speed capacitive 2-bit-per-cycle (2b/C) SAR ADC was presented. This paper discusses the sources of kickback noise and offset voltage of the ...
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ISBN:
(纸本)9781479932849
A low kickback noise and offset calibrated dynamic comparator used in a high speed capacitive 2-bit-per-cycle (2b/C) SAR ADC was presented. This paper discusses the sources of kickback noise and offset voltage of the dynamic comparator. And then the proposed comparator decreases the kickback noise to the range without affecting the performance of comparator. The next, a calibration unit is shown to decrease the offset voltage to σ± 0.5 mV with the range σ± 16 mV to meet the demand of the 8-b 2b/C SAR ADC. The proposed comparator is composed and simulated in 65 nm technology. The proposed comparator has 0.01 mV kickback noise at 7.9 mV differential input voltage and the calibration unit could calibrate the offset to -0.4±0.5 mV at 66 times Monte-Carlo simulations.
The low frequency noises from n+Si-HfO2-Ni resistive random access memory (RRAM) are measured. The normalized power spectra (SI/I2) in initial state (IS), in high resistance state (HRS), and in low resistance state (L...
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Spin-on-dopant and rapid thermal diffusion are used as the doping method for fabricating planar tunneling field effect transistor (TFET) in this paper to acquire abrupt doping profile and high surface doping concentra...
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ISBN:
(纸本)9781479932849
Spin-on-dopant and rapid thermal diffusion are used as the doping method for fabricating planar tunneling field effect transistor (TFET) in this paper to acquire abrupt doping profile and high surface doping concentration. Due to the heavy surface doping the on-current of TFET is enhanced. The ambipolar characteristics of TFET are also inhibited by reducing the drain doping concentration.
Ni(Pt)/Si-cap/SiGe solid phase reaction with various Si cap layer thickness and Ge content has been investigated in this paper. The results suggest that the Si-cap layer needs to be carefully optimized to achieve the ...
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Ni(Pt)/Si-cap/SiGe solid phase reaction with various Si cap layer thickness and Ge content has been investigated in this paper. The results suggest that the Si-cap layer needs to be carefully optimized to achieve the lowest sheet resistance (Rs). The thermal stability study shows that Ge atoms out-diffusion results in the strain relaxation and the decrease of Ge content of SiGe layer even after a low temperature post annealing, although the Rs apparently remain constant. After a higher temperature post annealing, the film agglomeration and Ge segregation cause a significant increase in Rs and decrease of compressive strain in SiGe layer.
Subthreshold characteristics of vertical tunneling field effect transistors(VTFETs) with an nC-pocket in the pC-source are studied by simulating the transfer characteristics with a commercial device *** types of sub...
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Subthreshold characteristics of vertical tunneling field effect transistors(VTFETs) with an nC-pocket in the pC-source are studied by simulating the transfer characteristics with a commercial device *** types of subthreshold characteristics are demonstrated for the device with different pocket thicknesses and doping *** diagram analysis shows that such a VTFET can be treated as a gate-controlled tunnel diode connected in series with a conventional n-channel metal-oxide-semiconductor *** VTFET can work either as a TFET or an n-MOSFET in the subthreshold region,depending on the turn-on sequence of these two *** our knowledge,this is the first time such a device model has been used to explain the subthreshold characteristics of this kind of VTFET and the simulation results demonstrate that such a device model is convictive and *** results indicate that the design of the nC pocket is crucial for such a VTFET in order to achieve ultra-steep turn-on characteristics.
Pd-Al2O3-Si capacitors with Ru nanocrystals are fabricated and electrically characterized for nonvolatile memory application. While keeping the entire insulator Al2O3 thickness fixed, the memory window has a strong de...
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Pd-Al2O3-Si capacitors with Ru nanocrystals are fabricated and electrically characterized for nonvolatile memory application. While keeping the entire insulator Al2O3 thickness fixed, the memory window has a strong dependence on the tunneling layer thickness under low operating voltages, whereas it has weak dependence under high operating voltages. As for the optimal configuration comprised of 6-nm tunneling layer and 22-nm blocking layer, the resulting memory window increases from 1.5 V to 5.3 V with bias pulse increasing from 10-5 s to 10-2 s under ±7 V. A ten-year memory window as large as 5.2 V is extrapolated at room temperature after ±8 V/1 ms programming/erasing pulses.
We develop a model for angular grating-based optical vortex emitters based on the cylindrical coupled-mode theory. The guided and radiated modes are calculated, and the impact of grating size on the radiation power is...
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The formation of N-type Ge shallow junction is investigated in this work. By combining carbon co-implantation and microwave annealing (MWA) method, the junction depth of 34 nm measured by secondary ion mass spectrosco...
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The formation of N-type Ge shallow junction is investigated in this work. By combining carbon co-implantation and microwave annealing (MWA) method, the junction depth of 34 nm measured by secondary ion mass spectroscopy (SIMS) as well as sheet resistance of 467 ohm/sq measured by Hall is achieved. Results show that the opitimal carbon implantation energy is 8 keV in that distributed carbon ions at such an energy can effectively trap vacancies and phosphorous into immobile clusters. The recrystallization of amorphous layer after MWA annealing is also studied by both ellipsometry and transmission electron microscopy (TEM).
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