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2010 IEEE International Interconnect Technology Conference, IITC 2010

作者： Ding, Shao-Feng Xie, Qi Waechtler, Thomas Lu, Hai-Sheng Schulz, Stefan E. Qu, Xin-Ping State Key Lab. of ASIC and System Department of Microelectronics Fudan University Shanghai 200433 China Department of Solid State Science Ghent University Krijgslaan 281/S1 B-9000 Ghent Belgium TU Chemnitz / ZfM and Fraunhofer ENAS Technologie-Campus 3 D-09126 Chemnitz Germany

ISBN: (纸本)9781424476763

The enhanced oxidation of Cu on Ru/diffusion barriers was observed. The in-situ X-ray diffraction results reveal that the Cu oxidation can be inhibited by doping C in either Ru adhesion layer or TaN barrier layer. The RuC/barrier becomes more robust with certain amount of C doped in Ru. ALD Cu2O on the RuC substrate was carried out and the effect of C on reduction of Cu oxide was observed. ©2010 IEEE.

关键词： Oxidation

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Characterization of Ultra-low k Porous Organosilica Thin Films

Characterization of Ultra-low k Porous Organosilica Thin Fil...

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2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

作者： Shuang Fu Ke-Jia Qian Wei Zhang Shi-Jin Ding Zhong-yong Fan Department of Material Science Fudan University Shanghai 200433 China State Key Laboratory of ASI State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai Department of Material Science Fudan University Shanghai 200433 China

ISBN: (纸本)9781424457977

Porous organosilica thin films using 1,2-bis (triethoxysily)ethane, triethoxymethylsilane and a poly (ethylene oxide)-poly(propylene oxide)-poly (ethylene oxide) triblock copolymer template have been prepared by spin-on technique. The films were characterized by cross-sectional scanning electron microscopy, x-ray diffraction and Fourier-transform infrared spectroscopy. After thermal treatment at 350 ℃ in N2 for two hours, the films show well ordered porous structure as well as uniform and crack-free surface. The dielectric constant (k) as low as 2.0 was obtained at 100k Hz, and kept good thermal stability up to 500 ℃. Meanwhile, the resulting lowk porous films also exhibit low leakage current densities, e.g., 3.0×10-8 A/cm2 at 1 MV/cm, and good mechanical properties with elastic modulus of 4.7 GPa and hardness of 0.56 GPa in the case of 500 ℃ annealing.

关键词： Fourier transform infrared spectroscopy Porous thin films Pore structure heat treatment Elastic Modulus porous membrane Mechanical properties Soundness

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The EL properties of well-aligned n-ZnO nanorods/p-GaN structure

The EL properties of well-aligned n-ZnO nanorods/p-GaN struc...

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2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

作者： Xin-Ping Qu Yu-Long Jiang Jia-Hong Wu Guo-Ping Ru Shao-Ren Deng Shu-Yi Liu Shu-Ti Li Tao Chen State Key Laboratory of ASIC and Systems Department of Microelectronics Fudan University Shanghai Institute of Opto-Electronic Materials and Technology South China Normal University Guangzhou S106 State Key Laboratory of ASIC and Systems Department of Microelectronics Fudan University Shanghai

ISBN: (纸本)9781424457977

Well-aligned ZnO nanorods were grown on the p-GaN substrate by a hydrothermal method and n-ZnO nanorods/p-GaN heterojunction LED structures were formed. The electroluminescence (EL) properties of this structure were studied under both forward and reverse bias. The nanorod LED device only has light output under reverse bias. The I-V characteristic results show that the nanosized junction can increase the carrier injection efficiency of the n-ZnO nanorods/p-GaN LED device.

关键词： Nanorods carrier injection SMIM10L2A gene Light emitting diodes Optical output water calorimetry Statistical Biases bias(electronics) Bias Bias Bias

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Design and Simulation of a High Resolution Ultrasonic Micro-Transducer Derived by LiNbO3

Design and Simulation of a High Resolution Ultrasonic Micro-...

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2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

作者： Jin-ying Zhang Xin-ming Ji Yi-ping Huang Julien Carlier Bertrand Nongaillard Wei-jiang Xu ASIC and System State Key Lab Department of Microelectronics Fudan University Shanghai 200433 P. ASIC and System State Key Lab Department of Microelectronics Fudan University Shanghai 200433 P. Department d'Opto-Acoustic-Electronique IEMN CNRS UMR 8520 Universite de Valenciennes et du Haina

ISBN: (纸本)9781424457977

A 100 MHz high resolution ultrasonic micro-transducer with a focal lens is designed for medical imaging based on monocrystalline lithium niobate (LiNbO3) 36°/Y-cut. Finite element analysis is used to characterize the impulse response of this transducer and the stationary wave propagation. The results show that the focal lens attributes a lot to the directivity and the resolution. The wave derived by LiNbO3 36°/Y-cut element demonstrates a better property compared with ZnO. The energy of transmitted wave at the focus is increased by 16.53％ and 314.7％ due to LiNbO3 and the matching layers, respectively.

关键词： Lenses Acoustics Transducers Biomedical imaging Zinc oxide Materials Finite element methods

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Capacitance-voltage characterization of fully silicided gated MOS capacitor

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Journal of Semiconductors 2009年第3期30卷 46-51页

作者：王保民茹国平蒋玉龙屈新萍李炳宗刘冉 State Key Laboratory of ASIC and System Department of MicroelectronicsFudan University

This paper investigates the capacitance-voltage （C-V） measurement on fully silicided （FUSI） gated metal-oxide-semiconductor （MOS） capacitors and the applicability of MOS capacitor models. When the oxide leakage current of an MOS capacitor is large, two-element parallel or series model cannot be used to obtain its real C-V characteristic. A three-element model simultaneously consisting of parallel conductance and series resistance or a four-element model with further consideration of a series inductance should be used. We employed the threeelement and the four-element models with the help of two-frequency technique to measure the Ni FUSI gated MOS capacitors. The results indicate that the capacitance of the MOS capacitors extracted by the three-element model still shows some frequency dispersion, while that extracted by the four-element model is close to the real capacitance, showing little frequency dispersion. The obtained capacitance can be used to calculate the dielectric thickness with quantum effect correction by NCSU C-V program. We also investigated the influence of MOS capacitor＇s area on the measurement accuracy. The results indicate that the decrease of capacitor area can reduce the dissipation factor and improve the measurement accuracy. As a result, the frequency dispersion of the measured capacitance is significantly reduced, and real C-V characteristic can be obtained directly by the series model. In addition, this paper investigates the quasi-static C-V measurement and the photonic high-frequency C-V measurement on Ni FUSI metal gated MOS capacitor with a thin leaky oxide. The results indicate that the large tunneling current through the gate oxide significantly perturbs the accurate measurement of the displacement current, which is essential for the quasi-static C-V measurement. On the other hand, the photonic high-frequency C-V measurement can bypass the leakage problem, and get reliable low-frequency C-V characteristic, which can be used to evaluat

关键词： FUSI C-V photonic high-frequency C-V MOS capacitor model

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Applications of tunneling FET in memory devices

Applications of tunneling FET in memory devices

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International Conference on Solid-state and Integrated Circuit Technology

作者： Song-Gan Zang Xin-Yan Liu Xi Lin Lei Liu Wei Liu David Wei Zhang Peng-Fei Wang Walter Hansch State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai China Oriental Semiconductor Company Limited Suzhou China Institute for Physics Universitaet der Bundeswehr Muenchen Neubiberg Germany

ISBN: (纸本)9781424457977

Because of the special p-i-n structure of the tunneling FET (TFET), many different composite transistors can be formed with careful device design by combining TFET with MOSFET. In this paper, we propose the special applications of TFET as memory devices. A novel capacitor-less DRAM cell based on floating junction gate (FJG) concept can be configured with TFET. In addition, several different memory cells containing TFET will be discussed.

关键词： Logic gates Nonvolatile memory PIN photodiodes Random access memory system-on-a-chip MOSFET circuits Junctions

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General switch box modeling and optimization for FPGA routing architectures

General switch box modeling and optimization for FPGA routin...

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IEEE International Conference on Field-Programmable Technology (FPT)

作者： Kejie Ma Lingli Wang Xuegong Zhou Sheldon X.-D. Tan Jiarong Tong State Key Laboratory of ASIC & System Fudan University Shanghai China Department of Electrical Engineering University of California Riverside CA USA

This paper explores the FPGA routing architecture based on a new concept of “general switch box (GSB)” to improve the performance of FPGA. Compared with the existing CB/SB routing architecture and CS-box architecture, the proposed GSB architecture has much larger exploration space. Experimental results with MCNC benchmark circuits show that the performance of FPGAs with GSB is about 24.3% better than the CB/SB architecture with the same segment distribution in terms of product of channel width and delay using 0.17% less routing switches for the single wire length. For the two types of wire segments, we propose an architecture with 13.3% performance improvement at the cost of about 0.8% increase in switch number compared to the single wire length GSB architecture.

关键词： Routing Wire Field programmable gate arrays Switches Tin Delay Pins

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Wideband reduced modeling of interconnect circuits by adaptive complex-valued sampling method 10

Wideband reduced modeling of interconnect circuits by adapti...

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Asia and South Pacific Design Automation Conference

作者： Hai Wang Sheldon X.-D. Tan Gengsheng Chen Department of Electrical Engineering University of California Riverside CA USA State Key Laboratory of ASIC & System Fudan University Shanghai China

ISBN: (纸本)9781605588377

In this paper, we propose a new wideband model order reduction method for interconnect circuits by using a novel adaptive sampling and error estimation scheme. We try to address the outstanding error control problems in the existing sampling-based reduction framework. In the new method, called WBMOR, we explicitly compute the exact residual errors to guide the sampling process. We show that by sampling along the imaginary axis and performing a new complex-valued reduction, the reduced model will match exactly with the original model at the sample points. We show theoretically that the proposed method can achieve the error bound over a given frequency range. Practically the new algorithm can help designers choose the best order of the reduced model for the given frequency range and error bound via adaptive sampling scheme. As a result, it can perform wideband accurate reductions of interconnect circuits for analog and RF applications. We compare several sampling schemes such as linear, logarithmic, and recently proposed re-sampling methods. Experimental results on a number of RLC circuits show that WBMOR is much more accurate than all the other simple sampling methods and the recently proposed re-sampling scheme with the same reduction orders. Compared with the real-valued sampling methods, the complex-valued sampling method is more accurate for the same computational costs.

关键词： Wideband Integrated circuit interconnections Sampling methods RLC circuits Error correction Radio frequency Computational efficiency Algorithm design and analysis Circuit noise Costs

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Investigation of Tunneling Field Effect Transistor Reliability

Investigation of Tunneling Field Effect Transistor Reliabili...

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2010 10th IEEE International Conference on Solid-state and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

作者： X. Y. Huang W. Cao Ming-Fu Li D. M. Huang G. F. Jiao H. Y. Yu Z. X. Chen D.-L. Kwong G Q. Lo N. Singh State Key Lab of ASIC and System Department of Microelectronics Fudan University Shanghai 200433 Institute of Microelectronics A*STAR (Agency for Science technology and Research) Singapore 11768 Institute of Microelectronics A*STAR (Agency for Science technology and Research) Singapore 11768

ISBN: (纸本)9781424457977

This paper summarizes our recent investigations of nano-wire n type tunneling field effect transistor (n-TFET) reliability by experimental measurements and physical analysis [1-3]. Large PBTI and HC degradations which are very different from those in conventional n-MOSFETs were observed. The results are interpreted by different degradation mechanism in TFET.

关键词： Stress Degradation Tunneling Logic gates Temperature measurement Silicon Electric fields

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A Folding Strategy for SAT solvers based on Shannon's expansion theorem

A Folding Strategy for SAT solvers based on Shannon's expans...

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IEEE International SOC Conference

作者： Siwat Saibua Po-Yu Kuo Dian Zhou Ming-e Jing Department of Electrical Engineering University of Texas Dallas Richardson TX USA State Key Laboratory of ASIC & System Fudan University Shanghai China

SAT problem has been an active research subject and many impressive SAT solvers have been proposed. Most of algorithms used in modern SAT solvers are based on tree structured searching strategy, combining with heuristic approaches to reduce the search space. In contrast to most existing solvers, we treat SAT problem as a logical optimization issue which can be solved by a logic minimizer. In this paper, we propose a Folding Strategy (FS) based on the Shannon's expansion theorem such that in every step, one variable is deducted and the size of search space is shrunk. The new method will find the solution after Karnaugh Map (K-Map) is folded no more than n (number of variables) times because search space is decreased by half in each folding step.

关键词： Boolean functions Algorithm design and analysis Minimization Runtime Equations Heuristic algorithms Robustness

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