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检索条件"机构=State Key Laboratory of Computer Architecture~ Institute of Computing Technology"
1773 条 记 录,以下是1561-1570 订阅
排序:
A heuristic algorithm for optimizing page selection instructions
A heuristic algorithm for optimizing page selection instruct...
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2010 2nd International Conference on Software technology and Engineering, ICSTE 2010
作者: Li, Qing'an He, Yanxiang Chen, Yong Wu, Wei Xu, Wenwen School of Computer Wuhan University Wuhan 430072 China State Key Laboratory of Software Engineering Wuhan University Wuhan 430072 China Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China
Page switching is a technique that increases the memory in microcontrollers without extending the address buses. This technique is widely used in the design of 8-bit MCUs. In this paper, we present an algorithm to red... 详细信息
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Performance-asymmetry-aware topology virtualization for defect-tolerant NoC-based many-core processors  10
Performance-asymmetry-aware topology virtualization for defe...
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Design, Automation and Test in Europe Conference and Exhibition
作者: Lei Zhang Yue Yu Jianbo Dong Yinhe Han Shangping Ren Xiaowei Li Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences China Department of Computer Science Illinois Institute of Technology USA
Topology virtualization techniques are proposed for NoC-based many-core processors with core-level redundancy to isolate hardware changes caused by on-chip defective cores. Prior work focuses on homogeneous cores with... 详细信息
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Outlier Detection for Learning-Based Optimizing Compiler
Outlier Detection for Learning-Based Optimizing Compiler
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Japan-China Joint Workshop on Frontier of computer Science and technology (FCST)
作者: Shun Long Weiheng Zhu Department of Computer Science Jinan University Guangzhou China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences China
Modern compilers use machine learning to find from their prior experience useful heuristics for new programs encountered in order to accelerate the optimization process. However, prior experience might not be applicab... 详细信息
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On synchronization and evaluation method of chipped many-core processor
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Jisuanji Xuebao/Chinese Journal of computers 2010年 第10期33卷 1777-1787页
作者: Xu, Wei-Zhi Song, Feng-Long Liu, Zhi-Yong Fan, Dong-Rui Yu, Lei Zhang, Shuai Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Acad. of Sci. Beijing 100190 China Graduate University of Chinese Acad. of Sci. Beijing 100039 China
Synchronization schemes are critical for on-chip multi-core and many-core processor to execute correctly and communicate cooperatively. The efficiency of the synchronization is very important for the processor. In thi... 详细信息
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Accelerating Lightpath setup via broadcasting in binary-tree waveguide in Optical NoCs  10
Accelerating Lightpath setup via broadcasting in binary-tree...
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Design, Automation and Test in Europe Conference and Exhibition
作者: Binzhang Fu Yinhe Han Huawei Li Xiaowei Li Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China
In this paper, we propose a binary-tree waveguide connected Optical-Network-on-Chip (ONoC) to accelerate the establishment of the lightpath. By broadcasting the control data in the proposed power-efficient binary-tree... 详细信息
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An abstraction-guided simulation approach using Markov models for microprocessor verification  10
An abstraction-guided simulation approach using Markov model...
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Design, Automation and Test in Europe Conference and Exhibition
作者: Tao Zhang Tao Lv Xiaowei Li Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China
In order to combine the power of simulation-based and formal techniques, semi-formal methods have been widely explored. Among these methods, abstraction-guided simulation is a quite promising one. In this paper, we pr... 详细信息
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A general method to make multi-clock system deterministic  10
A general method to make multi-clock system deterministic
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Design, Automation and Test in Europe Conference and Exhibition
作者: Menghao Su Yunji Chen Xiang Gao Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China
Nondeterminism of multi-clock systems often complicates various system validation processes such as post silicon debugging and at-speed testing, which has brought many difficulties to system designers and testers. The... 详细信息
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An on-chip clock generation scheme for faster-than-at-speed delay testing  10
An on-chip clock generation scheme for faster-than-at-speed ...
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Design, Automation and Test in Europe Conference and Exhibition
作者: Songwei Pei Huawei Li Xiaowei Li Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China
Faster-than-at-speed testing provides an effective way for detecting and debugging small delay defects in modern fabricated chips. However, the use of external automatic test equipment for faster-than-at-speed delay t... 详细信息
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Diagnosis of multiple arbitrary faults with mask and reinforcement effect  10
Diagnosis of multiple arbitrary faults with mask and reinfor...
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Design, Automation and Test in Europe Conference and Exhibition
作者: Jing Ye Yu Hu Xiaowei Li Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China
We propose a multiple-fault diagnosis method with high diagnosability, resolution, first-hit and short run time. The method has no assumption on fault models, thus can diagnose arbitrary faults. To cope with the multi... 详细信息
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Address Remapping for Static NUCA in NoC-Based Degradable Chip-Multiprocessors
Address Remapping for Static NUCA in NoC-Based Degradable Ch...
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Pacific Rim International Symposium on Dependable computing
作者: Ying Wang Lei Zhang Yinhe Han Huawei Li Xiaowei Li Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China
Large scale Chip-Multiprocessors (CMPs) generally employ Network-on-Chip (NoC) to connect the last level cache (LLC), which is generally organized as distributed NUCA (non-uniform cache access) arrays for scalability ... 详细信息
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