检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

988 篇 期刊文献
794 篇 会议
1 册 图书

馆藏范围

1,783 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

1,148 篇 工学
- 722 篇 计算机科学与技术...
- 492 篇 软件工程
- 193 篇 电子科学与技术（可...
- 166 篇 信息与通信工程
- 105 篇 控制科学与工程
- 94 篇 电气工程
- 89 篇 核科学与技术
- 86 篇 光学工程
- 83 篇 生物工程
- 79 篇 机械工程
- 71 篇 动力工程及工程热...
- 50 篇 材料科学与工程（可...
- 43 篇 化学工程与技术
- 38 篇 生物医学工程（可授...
- 37 篇 仪器科学与技术
- 33 篇 建筑学
- 30 篇 土木工程
- 22 篇 力学（可授工学、理...
744 篇 理学
- 427 篇 物理学
- 247 篇 数学
- 96 篇 生物学
- 59 篇 统计学（可授理学、...
- 57 篇 系统科学
- 52 篇 化学
196 篇 管理学
- 147 篇 管理科学与工程(可...
- 59 篇 图书情报与档案管...
- 41 篇 工商管理
41 篇 医学
- 34 篇 临床医学
- 30 篇 基础医学(可授医学...
21 篇 法学
18 篇 经济学
10 篇 农学
6 篇 军事学
4 篇 教育学
3 篇 文学
2 篇 哲学
2 篇 艺术学

主题

111 篇 hadron colliders
75 篇 computer archite...
41 篇 laboratories
39 篇 hardware
33 篇 computational mo...
33 篇 delay
31 篇 higgs bosons
31 篇 training
29 篇 w & z bosons
29 篇 deep learning
29 篇 circuit faults
25 篇 semantics
24 篇 benchmarking
23 篇 bandwidth
23 篇 wireless sensor ...
23 篇 costs
21 篇 quantum cryptogr...
21 篇 energy efficienc...
20 篇 neural networks
20 篇 top quark

机构

208 篇 state key labora...
191 篇 yerevan physics ...
162 篇 university of ch...
151 篇 centro brasileir...
150 篇 national and kap...
150 篇 istanbul technic...
149 篇 university of sp...
148 篇 universidad iber...
148 篇 indian institute...
146 篇 brunel universit...
146 篇 academy of scien...
143 篇 charles universi...
139 篇 università di to...
136 篇 infn sezione di ...
135 篇 imperial college...
135 篇 university of de...
134 篇 rwth aachen univ...
134 篇 department of ph...
133 篇 infn sezione di ...
132 篇 indian institute...

作者

112 篇 g. tonelli
112 篇 d. barney
112 篇 l. valencia palo...
112 篇 t. liu
112 篇 c. hensel
112 篇 a. garcia-bellid...
111 篇 a. babaev
111 篇 a. steen
111 篇 n. cartiglia
108 篇 v. karjavine
105 篇 n. colino
105 篇 f. moortgat
104 篇 b. clerbaux
104 篇 g. sultanov
103 篇 m. a. ciocci
103 篇 k. lamichhane
103 篇 s. maselli
102 篇 e. migliore
102 篇 p. avery
102 篇 l. silvestris

语言

1,685 篇 英文
74 篇 中文
28 篇 其他

检索条件"机构=State Key Laboratory of Computer Architecture~ Institute of Computing Technology"

共 1783 条记录，以下是1611-1620 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

A New Post-Silicon Debug Approach Based on Suspect Window

A New Post-Silicon Debug Approach Based on Suspect Window

引用

IEEE VLSI Test Symposium (VTS)

作者： Jianliang Gao Yinhe Han Xiaowei Li Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences

ISBN: (纸本)9781424437696

Bugs are tending to be unavoidable in the design of complex integrated circuits. It is imperative to identify the bugs as soon as possible by post-silicon debug. The main challenge for post-silicon debug is the observability of the internal signals. This paper exploits the fact that it is not necessary to observe the error free states. Then we introduce "suspect window" and present a method for determining its boundary. Based on suspect window, we propose a debug approach to achieve high observability by reusing scan chain. Since scan dumps take place only in suspect window, debug time is greatly reduced. Experimental results demonstrate the effectiveness of the proposed approach.

关键词： Post-silicon debug Suspect window Trace Scan Bug

来源：评论

学校读者我要写书评

暂无评论

Optimizing inter-domain communication

Optimizing inter-domain communication

引用

15th International Conference on Parallel and Distributed Systems, ICPADS '09

作者： Zang, Hongyong Sun, Yuzhong Gu, Kuiyan Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Graduate University of Chinese Academy of Sciences Beijing 100049 China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Dongxin Geology Research Institute of Shengli Oilfield Sinopec Dongying Shandong 257094 China

ISBN: (纸本)9780769539003

Virtual machine technology has played an important role in data center. Distributed services deployed in multiple virtual machines, may reside on one physical machine. This situation requires an efficient inter-domain communication channel with transparency and security principles ensured. Although current inter-domain mechanism has gained a much better performance compared to traditional inter-domain path offered by hypervisor, shared data channel size limitation and additional copy are still two restrains against a higher performance efficiency. In this paper, we give an analysis on these limitations, overcome these shortcomings, and achieve a higher efficient inter-domain communication channel. By applying virtual address protection mechanism during channel bootstrap, we enlarge the maximum size of shared data channel. By pointing network packet structure to the buffer in the shared data channel, we avoid an extra data copy on the receiver VM side. In our evaluation using a number of standard benchmarks, we have reduced the latency by nearly 40%, increased the throughput by approximately 45% and cut down more than 3500 CPU cycles per packet. © 2009 IEEE.

关键词： Virtual machine

来源：评论

学校读者我要写书评

暂无评论

A highly efficient inter-domain communication channel

A highly efficient inter-domain communication channel

引用

IEEE 9th International Conference on computer and Information technology, CIT 2009

作者： Zang, Hongyong Gu, Kuiyan Li, Yaqiong Sun, Yuzhong Meng, Dan Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Graduate University of Chinese Academy of Sciences Beijing 100049 China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Dongxin Geology Research Institute of Shengli Oilfield Sinopec Dongying Shandong 257094 China

ISBN: (纸本)9780769538365

With virtual machine technology, distributed services deployed in multiple cooperative virtual machines, such as multi-tier web services, may reside on one physical machine. This situation requires an efficient inter-domain communication channel, and meanwhile transparency and security should be guaranteed, for diverse existing distributed applications are serving on plenty of machines. In this paper, we have implemented a highly efficient inter-domain communication channel, called SChannel, with full transparency to both user applications and network protocol stack, and security between guest domains on Xen platform. Between two co-resident domains, SChannel establishes a twoway shared memory channel with elastic size, which is set up using static shared memory mechanism, instead of high-cost dynamic shared memory. Furthermore, SChannel avoids one additional copy from the shared data channel on the receiver domain side. In our evaluation using a number of standard benchmarks, SChannel increases the throughput 5 times than standard inter-domain mechanism offered by the hypervisor. Compared with other typical transparent inter-domain communication mechanism, SChannel achieves approximately 44.5% improvement of throughput, and reduces more than 3500 CPU cycles per packet. © 2009 IEEE.

关键词： Transparency

来源：评论

学校读者我要写书评

暂无评论

Software and Hardware Cooperate for 1-D FFT Algorithm Optimization on Multicore Processors

Software and Hardware Cooperate for 1-D FFT Algorithm Optimi...

引用

International Conference on computer and Information technology (CIT)

作者： Yongbin Zhou Junchao Zhang Dongrui Fan Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

Multicore architecture is becoming a promise to keep Moore's Law and brings a revolution in both research and industry which results new design space for software and architecture. Fast Fourier transform (FFT), computing intensive and bandwidth intensive, is one of the most popular and important applications in the world. Compared with the computing resource on multicore architecture, the on-chip memory resource is much more expensive because of the limitation of physical chip size. Efficient implementation of FFT algorithm on multicore with good scalability is a challenge for both software and hardware developers. In this paper, supported by the Godson-T architecture, an optimized implementation of 1-D FFT has been developed with matrix transpose conceal and computation/communication overlapping, which achieve more than 30% performance improvement as well as almost 1/3 L2 cache consumption reduce comparing with the base six-step FFT. The limitation of scalability is also analyzed and the conclusion is that on Godson-T when frequency and simultaneous data access happen, the limited access bandwidth of L2 cache is the bottleneck and result in the longer on-chip network latency.

关键词： Hardware Software algorithms Multicore processing computer architecture Bandwidth Scalability Moore's Law Aerospace industry computer industry Software design

来源：评论

学校读者我要写书评

暂无评论

Column-based RLE in row-oriented database

Column-based RLE in row-oriented database

引用

International Conference on Cyber-Enabled Distributed computing and Knowledge Discovery, CyberC

作者： Mingyuan An Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China

In database systems, disk I/O performance is usually the bottleneck of the whole query processing. Among many techniques, compression is one of the most important ones to reduce disk accesses so to improve system performance. RLE (run-length encoding) is one light-weight compression algorithm which incurs negligible CPU cost. A lot of work show that, although RLE is one of the most effective compression techniques in column-oriented systems, it is very hard to use due to bad value locality in row-oriented systems where values from multiple attributes are stored in the same page. We propose CRLE (Column-based RLE), one compression algorithm to apply RLE to row-oriented data storage. On row-oriented storage page, CRLE can exploit value locality in individual column and encode values from the same column in run-length format. Experiments show that CRLE can lead to very good compression ratio and performance in spite of row-oriented data storage.

关键词： Database systems System performance Encoding Compression algorithms Costs Memory Engines Laboratories computer architecture Query processing

来源：评论

学校读者我要写书评

暂无评论

Efficient binary translation system with low hardware cost

Efficient binary translation system with low hardware cost

引用

IEEE International Conference on computer Design: VLSI in computers and Processors, (ICCD)

作者： Weiwu Hu Qi Liu Jian Wang Songsong Cai Menghao Su Xiaoyu Li Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

Binary translation is one of the most important approaches for system migration. However, software binary translation systems often suffer from the inefficiency and traditional hardware-software co-designed virtual machines require the unavoidable re-design of the processor architecture. This paper presents a novel hardware-software co-designed method to accelerate the binary translation on an existing architecture. The hardware supports for source-architecture-only functions, partial decodes and binary translation system acceleration are proposed. These hardware supports help the binary translation system to achieve high performance and simplify the design of the binary translation software. In the meantime, the hardware cost is well controlled in a certain low level. These supports are implemented in Godson-3 processors to speedup the x86 binary translation to the native MIPS instruction set. Performance evaluations on RTL simulation and FPGA emulation platforms show that the proposed method can speedup most benchmark programs by nearly 10 times compared to pure software-based binary translation and achieves about 70% performance of the native program execution. The chip is fabricated in ST 65nm CMOS technology, and the physical design results show that the chip area cost is less than 5%.

关键词： Hardware Costs computer architecture Acceleration CMOS technology Software systems Virtual machining Decoding Software performance Field programmable gate arrays

来源：评论

学校读者我要写书评

暂无评论

Snooping and Ordering Ring - An Efficient Cache Coherence Protocol for Ring Connected CMP

Snooping and Ordering Ring - An Efficient Cache Coherence Pr...

引用

International Conference on Parallel and Distributed Systems (ICPADS)

作者： Fei Cao Zhiyong Liu Institute of Computing Technology Key Laboratory of Computer System and Architecture Chinese Academy and Sciences Beijing China

Ring is a promising on-chip interconnection for CMP. It is more scalable than bus and much simpler than packet-switched networks. The ordering property of ring can be used to optimize cache coherence protocol design. Existing ring protocols, such as the snooping ring protocol and the ring-order protocol need a retry and acknowledgement scheme or use the ordering property of the ring respectively to resolve conflict memory requests. A cache coherence protocol named SOR (Snooping and Ordering Ring) is developed for ring connected CMP in this paper. This protocol is based on the snooping ring protocol. But instead of using the acknowledgement and retry scheme, it uses the ordering property of the ring to resolve conflicts, thus can avoid unnecessary retries to improve performance and power efficiency. The L1 snooping results are sent with the requests instead of being delayed, so that many useless snoops can be avoided. Simulation result shows that the average probe slot transports and snoop operations can be reduced by SOR are 47% and 48.9%. The average and maximum performance improvements by SOR are 3.33% and 6%.

关键词： Broadcasting Bandwidth Delay Multiprocessing systems Energy consumption Access protocols Laboratories Concurrent computing Distributed computing computer architecture

来源：评论

学校读者我要写书评

暂无评论

A Synchronization-Based Alternative to Directory Protocol

A Synchronization-Based Alternative to Directory Protocol

引用

International Symposium on Parallel and Distributed Processing with Applications, ISPA

作者： He Huang Lei Liu Nan Yuan Wei Lin Fenglong Song Junchao Zhang Dongrui Fan Institute of Computing Technology Key Laboratory of Computer Systems and Architecture Chinese Academy and Sciences Beijing China

The efficient support of cache coherence is extremely important to design and implement many-core processors. In this paper, we propose a synchronization-based coherence (SBC) protocol to efficiently support cache coherence for shared memory many-core architectures. The unique feature of our scheme is that it doesnpsilat use directory at all. Inspired by scope consistency memory model, our protocol maintains coherence at synchronization point. Within critical section, processor cores record write-sets (which lines have been written in critical section) with bloom-filter function. When the core releases the lock, the write-set is transferred to a synchronization manager. When another core acquires the same lock, it gets the write-set from the synchronization manager and invalidates stale data in its local cache. Experimental results show that the SBC outperforms by averages of 5% in execution time across a suite of scientific applications. At the mean time, the SBC is more cost-effective comparing to directory-based protocol that requires large amount of hardware resource and huge design verification effort.

关键词： Protocols Coherence Distributed processing Application software Helium Laboratories Concurrent computing Distributed computing computer architecture Memory architecture

来源：评论

学校读者我要写书评

暂无评论

A Parallel Algorithm for computing Betweenness Centrality

A Parallel Algorithm for Computing Betweenness Centrality

引用

International Conference on Parallel Processing (ICPP)

作者： Guangming Tan Dengbiao Tu Ninghui Sun Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China

In this paper we present a multi-grained parallel algorithm for computing betweenness centrality, which is extensively used in large-scale network analysis. Our method is based on a novel algorithmic handling of access conflicts for a CREW PRAM algorithm. We propose a proper data-processor mapping, a novel edge-numbering strategy and a new triple array data structure recording the shortest path for eliminating conflicts to access the shared memory. The algorithm requires O(n+m) space and O((nm)/p) ( or O((nm+n 2 logn)/p)) time for unweighted (or weighted) graphs, and it is a work-optimal CREW PRAM algorithm. On current multi-core platforms, our algorithm outperforms the previous algorithm by 2-3 times.

关键词： Parallel algorithms Concurrent computing Proteins Phase change random access memory Complex networks Algorithm design and analysis Large-scale systems Parallel processing Fungi computer networks

来源：评论

学校读者我要写书评

暂无评论

Early Experiences with Write-Write Design of NFS over RDMA

Early Experiences with Write-Write Design of NFS over RDMA

引用

International Conference on Networking, architecture, and Storage (NAS)

作者： Bo Li Panyong Zhang Zhigang Huo Dan Meng National Research Center for Intelligent Computing Systems Institute of Computing Technology Key Laboratory of Computer System and Architecture Chinese Academy of Sciences China National Research Center for Intelligent Computing Systems Institute of Computing Technology Key Laboratory of Computer System and Architecture Chinese Academy and Sciences China

The network file system (NFS) protocol, as the de facto standard for sharing files in a distributed environment, has deployed Infiniband as the underlying transport of sunRPC, namely NFS over RDMA. In the current Read-Write design of NFS over RDMA, NFS write performance is limited for not fully utilizing the features of Infiniband. In this paper, we take on the challenge of enhancing the write performance of NFS. We propose and evaluate a new design of sunRPC over RDMA, namely Write-Write design. To guarantee the security of our design, we propose an HCA-based memory protection extension of Infiniband. Evaluations show that our Write-Write design increases the kernel-to-kernel RPC bandwidth by 15~27%. In real disk test, our Write-Write design gains 15%~22% in multi-client benchmarks compared with the Read-Write design.

关键词： Security Protection Bandwidth Scalability computer architecture computer networks Distributed computing File systems Benchmark testing Protocols

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共179页 << < 158 159 160 161 162 163 164 165 166 167 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：