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IEEE International Conference on Cluster computing

作者： Qiang Li Panyong Zhang Ninghui Sun Chinese Academy and Sciences China Chinese Academy of Sciences Beijing Beijing CN National Research Center of Intelligent Computing Systems Institute of Computing Technology Key Laboratory of Computer System and Architecture Chinese Academy and Sciences China

Heterogeneity is considered as a solution for supercomputers to scale to petascale. Many systems which are composed of general CPUs and special processing units such as Cells, GPGPUs and FPGAs have been implemented. In these systems, CPU needs interact with special processing units to process data together, thus communications between these heterogeneous processing units become a key problem, and the communication subsytem should provide low latency and high bandwidth. In this paper, we propose HPP-Controller, which is designed for connecting two different types of CPUs (AMD and Loongson) in one node. It connects heterogeneous CPUs on top of no-coherent HyperTransport (HT) fabric and supports Global Physical Address Space. We implement a FPGA-based prototype and evaluate it via experiments. Initial results show that HPP-Controller has low latency of 0.75 us and high bandwidth close to bandwith of HT links.

关键词： Joining processes Central Processing Unit Delay Bandwidth Supercomputers Petascale computing Control systems Field programmable gate arrays Access protocols Sun

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Modeling for Web Services Composition System with Restricted Resources

Modeling for Web Services Composition System with Restricted...

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International Conference on Advances in System Simulation, SIMUL

作者： Huaizhou Yang Zengzhi Li State key Laboratory of Networking and Switching Technology Beijing University of Posts and Telecommunications Beijing China Institute of Computer Architecture & Networks Xi'an Jiaotong University Xi'an China

The Web services composition system usually has restricted resources in many practical applications. The system performance is closely related to the system resource. Firstly, a basic generalized stochastic Petri net model, constructed via service composition plan or language mapping for the purpose of performance presented. Nevertheless, the basic model can not reflect the characteristics of system resource restriction exactly. Therefore, through analyzing the various resource restrictions in Web services composition system, a series of extended modeling rules and methods are presented in order to acquire exact performance analysis results. The experiments indicate the difference of performance analysis results between basic model in ideal situation and extended model with restricted resources.

关键词： Web services Performance analysis Petri nets Stochastic processes Service oriented architecture Laboratories Telecommunication switching System performance Artificial intelligence System recovery

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Parallelization of LU decomposition on the godson-Tv1 many-core architecture

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Jisuanji Xuebao/Chinese Journal of computers 2009年第11期32卷 2157-2167页

作者： Long, Guo-Ping Fan, Dong-Rui Key Laboratory of Computer Systems and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China

The many-core architecture is increasingly becoming a promising computing platform due to the advancement of semi-conductor technology. LU decomposition is a widely used kernel in both scientific and engineering computations. Although there are a lot of related works on traditional parallel architectures, there is still little work focusing on parallelizing it on many-core architectures. This paper investigates this problem from three aspects: load balancing, latency hiding and performance modeling. There are three contributions of this work: Firstly, a novel load balancing technique has been introduced to overcome the limitations of 2D scatter decomposition. Experimental results show that the proposed scheme achieves 20% performance improvement without optimization and 40% improvement after optimization. Secondly, an analytical performance model is presented. Quantitative experimental study shows that by carefully hiding memory latency through on chip memory hierarchy and for a selected block size, the upper bound of theoretical performance can be approximated by experiments. Experimental results also reveal two primary causes which make theoretical speedup hard to achieve: limited DRAM bandwidth and resource contention of on-chip network.

关键词： Parallel architectures

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Automatic Selection of Internal Observation Signals for Design Verification

Automatic Selection of Internal Observation Signals for Desi...

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IEEE VLSI Test Symposium (VTS)

作者： Tao Lv Hua-wei Li Xiao-wei Li Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences

ISBN: (纸本)9781424437696

As the design complexity increases dramatically, results of functional simulation are usually checked through only a part of signals during design verification. It is important, therefore, to consider the observability of internal signals for effective checking. This paper proposes a static observability analysis method to automatically select internal observation signals, which improves the quality of functional verification. A series of formulas are defined to evaluate observability of internal signals, and an algorithm is proposed to locate the sources of low-observability. Such sources, rather than general hard-to-observe signals, are desirable internal observation signals. Experimental results indicate that signals selected by this method can improve the observability of designs more than those randomly selected from hard-to-observe signals.

关键词： Internal observation signals Design verification Static analysis

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A Model Analyzing Method for OWL-S Services Composition Based on High Level Petri Net

A Model Analyzing Method for OWL-S Services Composition Base...

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International Symposium on Knowledge Acquisition and Modeling, KAM

作者： Shaoran Dong Zengzhi Li State key Laboratory of Networking and Switching Technology Beijing University of Posts and Telecommunications Beijing China Institute of Computer System Architecture and Network Xi''an Jiaotong University Xi'an China

To analyze model of Web services composition, firstly analyze and abstract dataflow and control construct in OWL-S process to build high level Petri net model, then describe Petri net in Poses++ language, at last simulate Petri net with Poses++ to check data type and deadlock and calculate service performance. The experiment shows that this model analyzing method is able to accomplish type checking and deadlock and performance analyzing.

关键词： Performance analysis Web services System recovery Data analysis Petri nets Ontologies OWL Analytical models Knowledge acquisition computer networks

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Particle Swarm Algorithm for the Quality of Service-Oriented Web Services Selection

Particle Swarm Algorithm for the Quality of Service-Oriented...

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International Symposium on Knowledge Acquisition and Modeling, KAM

作者： Hong Xia Zengzhi Li State key Laboratory of Networking and Switch Technology Beijing University of Posts and Telecommunications Beijing China Institute of Computer System Architecture and Network Xi''an Jiaotong University Xi'an Shaanxi China

Existing Web services composition technology, lack of services selecting. A particle swarm optimization algorithm based on the multi-objective optimization strategies was provided to address quality of services to choose the issue of global optimization. It is to transform Web services select the overall optimization problem with QoS into a multi-objective constrained optimization problem based on Qos, using multi-objective PSO intelligent theory, by a number of Qos parameters optimized at the same time, and ultimately produce a set of constraints to meet the Pareto optimal solution. The experimental results show the feasibility and efficiency of the algorithm.

关键词： Particle swarm optimization Web services Quality of service Constraint optimization Pareto optimization Service oriented architecture Switches Constraint theory Logic Optimization methods

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Verification Web Services Composition Based on OWL-S

Verification Web Services Composition Based on OWL-S

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International Symposium on Knowledge Acquisition and Modeling, KAM

In order to ensure the correctness and reliability of Web services composition based on OWL-S, verify the interaction protocol of Web services. It is provided that three lay architecture. Composition service based on OWL-S, GA model is the middle model and the Promela model is the verification model, SPIN as a model validator. The OWL-S composition Web services transform a top-down conversation protocol process into a GA model, use WAST tool into Promela model, the SPIN tool analysis and verification structure and performance of composition services. This method is flexibility and scalability which provide a solution for Web services composition model verification.

关键词： Web services XML Protocols state-space methods Scalability Service oriented architecture computer architecture Switches Automata Asynchronous communication

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Automated Design of Logic Circuits with a Increasable Evolution Approach

Automated Design of Logic Circuits with a Increasable Evolut...

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IEEE International Conference on High Performance computing and Communications (HPCC)

作者： Guoliang He Naixue Xiong Athanasios V. Vasilakos Yuanxiang Li Zhongzhi Shi State Key Laboratory of Software Engineering Wuhan University of China Wuhan China Key Laboratory of Intelligent Information Process Institute of Computing Technology Chinese Academy and Sciences Beijing China Department of Computer Science Georgia State University USA Department of Computer Science Saint Francis Xavier University Canada

Since the scalability of logic circuits is becoming larger and more complex, the auto-design is becoming more and more difficult. In order to improve automatic design and performance evaluation of logic circuits in efficiency and capability of optimization, multiobjective simulated annealing (MSA) based increasable evolution approach is designed to evolve logic circuits automatically with an extended matrix encoding method, which can be able to reflect the potential performance of a circuit and reduce the risk of deleting a circuit with a good developing potential during evolution is devised. In the process of evolution, each individual is renewedly associated to a corresponding objective in terms of a novel adaptive evaluation method at each generation. In experiments, complicated arithmetic circuits are designed to assess the performance of MSA against other algorithms. Results indicate that the proposed method could design logic circuits efficiently.

关键词： Logic circuits Encoding Hardware Scalability Circuit simulation Simulated annealing Genetic algorithms Laboratories computer science Arithmetic

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Energy Efficient TDMA Sleep Scheduling in Wireless Sensor Networks

Energy Efficient TDMA Sleep Scheduling in Wireless Sensor Ne...

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IEEE Annual Joint Conference: INFOCOM, IEEE computer and Communications Societies

作者： J. Ma W. Lou Y. Wu X.-Y. Li G. Chen Department of Computing Hong Kong Polytechnic University Hong Kong China Department of Computer Science Illinois Institute of Technology IL USA State Key Laboratory of Novel Software Technology Nanjing University Nanjing China

ISBN: (纸本)9781424435128

Sleep scheduling is a widely used mechanism in wireless sensor networks (WSNs) to reduce the energy consumption since it can save the energy wastage caused by the idle listening state. In a traditional sleep scheduling, however, sensors have to start up numerous times in a period, and thus consume extra energy due to the state transitions. The objective of this paper is to design an energy efficient sleep scheduling for low data-rate WSNs, where sensors not only consume different amounts of energy in different states (transmit, receive, idle and sleep), but also consume energy for state transitions. We use TDMA as the MAC layer protocol, because it has the advantages of avoiding collisions, idle listening and overhearing. We first propose a novel interference-free TDMA sleep scheduling problem called contiguous link scheduling, which assigns sensors with consecutive time slots to reduce the frequency of state transitions. To tackle this problem, we then present efficient centralized and distributed algorithms that use time slots at most a constant factor of the optimum. The simulation studies corroborate the theoretical results, and show the efficiency of our proposed algorithms.

关键词： Energy efficiency Time division multiple access Sleep Wireless sensor networks Interference Energy consumption Delay Processor scheduling Media Access Protocol Frequency

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Design of a flip-flop circuit within digital logic analyzer based on FPGA

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Harbin Gongye Daxue Xuebao/Journal of Harbin institute of technology 2009年第SUPPL. 1期41卷 58-62页

作者： Xiao, Ling-Li Xu, Ning Han, Yin-He School of Computer Science and Technology Wuhan University Of Technology Wuhan 430070 China System Architecture Key Laboratory Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China

With the wide application of EDA technique, the period for the development of electronic products has been shortened. That implements the software of the hardware design and reduces the costs. Based on the analysis of the principle of digital logic analyzer circuit, this paper discusses the working principles of its flip-flop circuit module and the implementation method of FPGA, and presents the program design and emulation result of part circuits.

关键词： Field programmable gate arrays (FPGA)

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