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检索条件"机构=State Key Laboratory of Computer Architecture~ Institute of Computing Technology"
1783 条 记 录,以下是1691-1700 订阅
排序:
A Case Study on At-Speed Testing for a Gigahertz Microprocessor
A Case Study on At-Speed Testing for a Gigahertz Microproces...
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IEEE International Workshop on Electronic Design, Test and Applications (DELTA)
作者: Da Wang Rui Li Yu Hu Huawei Li Xiaowei Li Chinese Academy and Sciences China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China STMicroelectronics Company Limited Shanghai China
This paper describes a low cost, high quality at-speed testing strategy implemented on a gigahertz microprocessor with multi-clock domains. The presented DFT method not only utilizes the internal phase-locked loops (P... 详细信息
来源: 评论
A HyperTransport-based personal parallel computer
A HyperTransport-based personal parallel computer
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IEEE International Conference on Cluster computing
作者: Xiaojun Yang Fei Chen Hailiang Cheng Ninghui Sun Institute of Computing Technology Chinese Academy and Sciences Beijing China Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Chinese Academy and Sciences Beijing China
Instead of all using commodity components, an approach building a personal parallel computer on top of a non-coherent HyperTransport (HT) fabric is presented in the paper. The advantage is to provide both lower cost a... 详细信息
来源: 评论
A novel hint-based I/O mechanism for centralized file server of cluster
A novel hint-based I/O mechanism for centralized file server...
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IEEE International Conference on Cluster computing
作者: Huan Chen Jin Xiong Ninghui Sun Chinese Academy of Sciences Beijing China Institute of Computing Technology Chinese Academy and Sciences Beijing China Key Laboratory of Computer Architecture and System Chinese Academy and Sciences Beijing China
In the medium and small cluster systems, the centralized file server such as NFS is the main approach to provide the storage service with low cost and easy management. However, when multiple parallel applications acce... 详细信息
来源: 评论
Observation Point Oriented Deterministic Diagnosis Pattern Generation (DDPG) for Chain Diagnosis
Observation Point Oriented Deterministic Diagnosis Pattern G...
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Asian Test Symposium (ATS)
作者: Fei Wang Yu Hu Yu Huang Jing Ye Xiaowei Li Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Mentor Graphics Corporation Marlborough MA USA
Scan is a widely used Design-for-Testability technique to improve test and diagnosis quality. Many defects may cause scan chains to fail. In this paper, an observation point oriented Deterministic Diagnostic Pattern G... 详细信息
来源: 评论
A service-oriented priority-based resource scheduling scheme for virtualized utility computing  08
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Proceedings of the 15th international conference on High performance computing
作者: Ying Song Yaqiong Li Hui Wang Yufang Zhang Binquan Feng Hongyong Zang Yuzhong Sun Key Lab. of Computer System and Architecture Inst. of Computing Techn. Chinese Academy of Sciences China and National Research Center for Intelligent Computing Systems ICT China and Graduate Univ. of Chinese Academy of Sciences China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences China and National Research Center for Intelligent Computing Systems ICT China
In order to provide high resource utilization and QoS assurance inutility computing hosting concurrently various services, this paper proposes aservice computing framework-RAINBOW for VM(Virtual Machine)-basedutility ... 详细信息
来源: 评论
Fast slide mark compact algorithm
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Tien Tzu Hsueh Pao/Acta Electronica Sinica 2008年 第10期36卷 1955-1960页
作者: Zou, Qiong Zhang, Long-Bing Department of Computer Science and Technology University of Science and Technology of China Hefei 230027 China Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China
Allocation order is the best for locality, which slide mark compact algorithm is based on. But traditional design made the algorithm's overhead too large. We proposed a fast slide mark compact algorithm, which red... 详细信息
来源: 评论
Capacity-shared heterogeneous CMP cache
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Jisuanji Yanjiu yu Fazhan/computer Research and Development 2008年 第5期45卷 877-885页
作者: Gao, Xiang Zhang, Longbing Hu, Weiwu Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Department of Computer Science and Technology University of Science and Technology of China Hefei 230027 China
The characteristics of advanced integrated circuit technologies require architects to look for new ways to utilize large numbers of gates and mitigate the effects of high interconnect delays. Chip multiprocessors (CMP... 详细信息
来源: 评论
Dependability evaluation system based on microprocessor function model
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Jisuanji Xuebao/Chinese Journal of computers 2008年 第3期31卷 391-399页
作者: Zhang, Shi-Jian Xu, Tong Zhang, Long-Bing Hu, Wei-Wu Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Graduate University Chinese Academy of Sciences Beijing 100039 China
With the widespread adoption of embedded microprocessor-based systems in safety critical applications, such as aircrafts, spaceships and nuclear power plants, how to rapidly and conveniently evaluate these fault-toler... 详细信息
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Multiple Coupling Effects Oriented Path Delay Test Generation
Multiple Coupling Effects Oriented Path Delay Test Generatio...
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26th IEEE VLSI Test Symposium (VTS 2008)
作者: Minjin Zhang Huawei Li Xiaowei Li Graduate School of Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Chinese Academy of Sciences Beijing China Academy of Sciences Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China
We propose a two-phase test generation method to generate patterns targeting maximal path delay caused by multiple crosstalk effects. A timing analysis method based on transition map is proposed to manage the timing i... 详细信息
来源: 评论
Deterministic Circular Self Test Path
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Tsinghua Science and technology 2007年 第S1期12卷 20-25页
作者: 文科 胡瑜 李晓维 Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences
Circular self test path (CSTP) is an attractive technique for testing digital integrated circuits(IC) in the nanometer era, because it can easily provide at-speed test with small test data volume and short test applic... 详细信息
来源: 评论