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International Conference on computer Supported Cooperative Work in Design

作者： Yingmeng Gao Jie Zhu Haiping Huang Chen Chen Nanjing University of Posts & Telecommunications Nanjing China State Key Laboratory Chinese of Computer Architecture Institute of Computing Technology Academy of Sciences Beijing China Jiangsu High Technology Reasearch Key Laboratory of Wireless Sensor Networks Nanjing China Nanjing University of Aeronautics and Astronautics Nanjing China

When it comes to the fifth generation, collaborative edge computing is preferred for offloading computation-intensive tasks of low-latency applications in Internet of Things. In this paper, we consider the partial task offloading problem where tasks can be divided into subtasks and offloaded to nearby devices. The flow scheduling problem is integrated in the offloading process, i.e., multiple and conflicting route paths are considered. We propose the latency-aware partial task offloading framework (LaPTOF) for the considered problem. LaPTOF integrates a weighted priority ranking strategy (WPRS) which generates multiple solutions with different weights on task arrival time and the task processing time. A feasible solution generation method (FSGM) is designed where the best offloaded proportion of tasks are computed, and the appropriate offloaded devices and offload paths are determined. The proposed LaPTOF has an advantage in providing a scheduling plan that minimizes total completion time of task offloading in a shorter duration. The experimental results show that the proposal is suitable for the considered problem compared with JPOFH and its variants on both effectiveness and efficiency.

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Precise and scalable evaluation on the robustness metric of neural networks as classifiers 2

Precise and scalable evaluation on the robustness metric of ...

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2nd International Conference on Electronics, Communications and Information technology, CECIT 2021

作者： Hu, Yangyi Institute for Quantum Information State Key Laboratory of High Performance Computing National University of Defense Technology College of Computer Science and Technology Changsha410073 China

ISBN: (纸本)9781665437578

It is well known that the minimum adversarial distortion associated with a specific sample x0 reflects the local robustness of neural networks. However, it is intractable to solve the optimization problem related to the minimum adversarial distortion for general neural network cause it is non-convex. Works have studied the lower bound or upper bound of the minimum adversarial distortion to give a robustness metrics for neural networks, such as CLEVER score and CW attack. In this paper, we provide a formal robustness guarantee to transform the robustness analysis into two sub-problems: (1), compute out the maximum of the objective function gt* (rt);(2), generate a sequence {rth} s.t. limn→∞ rth is the minimum adversarial distortion for targeted attack. Based on this transformation, we propose an efficient and effective algorithm to directly estimate the instance-specific minimum adversarial distortion on the norm of the input manipulation required to change the classifier decision. Experimental results on two data-sets, MNIST and CIFAR, show that our measure of robustness is between the lower bound given by CLEVER and the upper bound by CW, indicating our approach gives a precise measure of the robustness of neural network. In addition, the powerful mathematical technique Extreme Value Estimation enables our algorithm computationally feasible for large neural networks. To the best of our knowledge, our algorithm is the first attack-independent approach to directly evaluate the minimum adversarial distortion as a robustness metric for neural network. © 2021 IEEE.

关键词： Estimation

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Explicitly represent the boundary of ReLU NN as a classifier and measure its robustness 2

Explicitly represent the boundary of ReLU NN as a classifier...

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2nd International Conference on Electronics, Communications and Information technology, CECIT 2021

ISBN: (纸本)9781665437578

Adversarial examples pose a great threat to the application of neural network as a classifier in areas with high security requirements. Intuitively, the adversarial property of neural network is closely related to the boundary. However, works barely give a rigorous description of it. This paper for the first time studies the boundary of ReLU NN, which separates the sample space into distinct cells, each of which belongs to the same class. During the demonstration, we discuss the algebraic property of border points upon the separating boundary and the topological difference between border points and odd ones. We derive Theorem III.7 to give a rigorous, comprehensive and concise description on the boundary of ReLU NN. Furthermore, an algorithm, based on the description, is proposed to give a standard and exact metric for the local robustness of ReLU NN. This metric gives the local adversarial property of NN and reflects some aspects of its security performance, i.e. the nimimum distortion needed to craft an adversarial example. To the best of our knowledge, this is the first work proposed to give a rigorous and example-specific metric for the local robustness of ReLU NN. © 2021 IEEE.

关键词： computer vision

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Automation 5.0: The key to Systems Intelligence and Industry 5.0

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IEEE/CAA Journal of Automatica Sinica 2024年第8期11卷 1723-1727页

作者： Ljubo Vlacic Hailong Huang Mariagrazia Dotoli Yutong Wang Petros A.Ioannou Lili Fan Xingxia Wang Raffaele Carli Chen Lv Lingxi Li Xiaoxiang Na Qing-Long Han Fei-Yue Wang Institute of Intelligent and Integrated Systems and the School of Engineering and Built Environment Griffith UniversityNathanQLD 4111Australia Department of Aeronautical and Aviation Engineering The Hong Kong Polytechnic UniversityHong KongChina Department of Electrical and Information Engineering Polytechnic of Bari70126 BariItaly State Key Laboratory of Multimodal Artificial Intelligence Systems Institute of AutomationChinese Academy of SciencesBeijing 100190and also with the Qingdao Academy of Intelligent IndustriesQingdao 266114China Department of Electrical Engineering-Systems University of Southern CaliforniaLos AngelesCA 90007 USA School of Automation Beijing Institute of TechnologyBeijing 100081China State Key Laboratory of Multimodal Artificial Intelligence Systems Institute of AutomationChinese Academy of SciencesBeijing 100190 School of Artificial Intelligence University of Chinese Academy of SciencesBeijing 100049 Beijing Huairou Academy of Parallel Sensing Beijing 101499China School of Mechanical and Aerospace Engineering Nanyang Technological UniversitySingapore 639798Singapore Department of Electrical and Computer Engineering Purdue School of Engineering and TechnologyIndiana University-Purdue University IndianapolisIndianapolisIN 46202 USA Department of Engineering University of CambridgeCB21TN CambridgeU.K. School of Science Computing and Engineering TechnologiesSwinburne University of TechnologyMelbourne VIC 3122Australia State Key Laboratory for Management and Control of Complex Systems Chinese Academy of SciencesBeijing 100190 School of Artificial Intelligence University of Chinese Academy of SciencesBeijing 100049China Dazhou Artificial Intelligence Institute Dazhouand the Faculty of Innovation EngineeringMacao University of Science and TechnologyMacao 999078China

AUTOMATION has come a long way since the early days of mechanization,i.e.,the process of working exclusively by hand or using animals to work with *** rise of steam engines and water wheels represented the first generation of industry,which is now called Industry Citation:***,***,***,***,***,***,***,***,***,***,***,Q.-***,and F.-***,“Automation 5.0:The key to systems intelligence and Industry 5.0,”IEEE/CAA ***,vol.11,no.8,pp.1723-1727,Aug.2024.

关键词： Automation machinery intelligence

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Addressing Intermediate Verification Latency in Online Learning Through Immediate Pseudo-labeling and Oriented Synthetic Correction

Addressing Intermediate Verification Latency in Online Learn...

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International Joint Conference on Neural Networks (IJCNN)

作者： Zixin Zhong Liyan Song Fengzhen Tang Bo Yuan Department of Computer Science and Engineering Guangdong Provincial Key Laboratory of Brain-Inspired Intelligent Computation Southern University of Science and Technology Shenzhen China Faculty of Computing Harbin Institute of Technology Harbin China State Key Laboratory of Robotics Shenyang Institute of Automation Chinese Academy of Sciences Shenyang China

ISBN: (数字)9798350359312

ISBN: (纸本)9798350359329

In non-stationary data streams, the challenges of concept drift are further compounded by the issue of Intermediate Verification Latency (IVL), which can impede timely model adaptation. IVL refers to the finite delay between the arrival of data features and their corresponding labels. This delay could pose a significant challenge in adapting models to new concepts, ultimately hindering predictive performance. However, existing IVL approaches exhibit certain limitations. Some approaches passively wait for delayed labels, thereby overlooking temporarily unlabeled data. Other approaches employ pseudo-labeling for immediate model updates, but may risk losing valuable information when reverting model states to rectify previous pseudo-labeling mistakes. To overcome these limitations, we propose a novel approach called Micro-cluster based Immediate Pseudo-Labeling with Oriented Synthetic Correction (MIPLOSC). MIPLOSC leverages micro-cluster systems to effectively capture data distributions, thus facilitating its two core components: immediate pseudo-labeling and oriented synthetic correction. The immediate pseudo-labeling mechanism facilitates immediate utilization of temporarily unlabeled data, and the oriented synthetic correction mechanism enables finergrained rectification from previous erroneous pseudo-labels and concept drift, minimizing the loss of learned information. Experimental studies validated the effectiveness of MIPLOSC in addressing IVL, demonstrating its superiority over competing methods in both space consumption and predictive performance across varying degrees of label delay.

关键词： Adaptation models Costs Concept drift Noise Neural networks Predictive models Robustness

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FIRE: A Dataset for Feedback Integration and Refinement Evaluation of Multimodal Models

arXiv

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arXiv 2024年

作者： Li, Pengxiang Gao, Zhi Zhang, Bofei Yuan, Tao Wu, Yuwei Harandi, Mehrtash Jia, Yunde Zhu, Song-Chun Li, Qing Beijing Key Laboratory of Intelligent Information Technology School of Computer Science & Technology Beijing Institute of Technology China State Key Laboratory of General Artificial Intelligence BIGAI China State Key Laboratory of General Artificial Intelligence Peking University China Department of Electrical and Computer System Engineering Monash University Australia Guangdong Laboratory of Machine Perception and Intelligent Computing Shenzhen MSU-BIT University China Department of Automation Tsinghua University China

Vision language models (VLMs) have achieved impressive progress in diverse applications, becoming a prevalent research direction. In this paper, we build FIRE, a feedback-refinement dataset, consisting of 1.1M multi-turn conversations that are derived from 27 source datasets, empowering VLMs to spontaneously refine their responses based on user feedback across diverse tasks. To scale up the data collection, FIRE is collected in two components: FIRE-100K and FIRE-1M, where FIRE-100K is generated by GPT-4V, and FIRE-1M is freely generated via models trained on FIRE-100K. Then, we build FIRE-Bench, a benchmark to comprehensively evaluate the feedback-refining capability of VLMs, which contains 11K feedback-refinement conversations as the test data, two evaluation settings, and a model to provide feedback for VLMs. We develop the FIRE-LLaVA model by fine-tuning LLaVA on FIRE-100K and FIRE-1M, which shows remarkable feedback-refining capability on FIRE-Bench and outperforms untrained VLMs by 50%, making more efficient user-agent interactions and underscoring the significance of the FIRE dataset. Copyright © 2024, The Authors. All rights reserved.

关键词： Fireclay

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Cryogenic Control and Readout Integrated Circuits for Solid-state Quantum computing

arXiv

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arXiv 2024年

作者： Lei, Lingxiao Huang, Heng Chen, Pingxing Deng, Mingtang Institute for Quantum Information State Key Laboratory of High Performance Computing College of Computer Science and Technology National University of Defense Technology Changsha410073 China Institute for Quantum Science and Technology College of Sciences National University of Defense Technology Changsha410073 China

In the pursuit of quantum computing, solid-state quantum systems, particularly superconducting ones, have made remarkable advancements over the past two decades. However, achieving fault-tolerant quantum computing for next-generation applications necessitates the integration of several million qubits, which presents significant challenges in terms of interconnection complexity and latency that are currently unsolvable with state-of-the-art room-temperature control and readout electronics. Recently, cryogenic integrated circuits (ICs), including CMOS radio-frequency ICs and rapid-single-flux-quantum-logic ICs, have emerged as potential alternatives to room-temperature electronics. Unlike their room-temperature counterparts, these ICs are deployed within cryostats to enhance scalability by reducing the number and length of transmission lines. Additionally, operating at cryogenic temperatures can suppress electronic noise and improve qubit control fidelity. However, for CMOS ICs specifically, circuit design uncertainties arise due to a lack of reliable models for cryogenic field effect transistors as well as issues related to severe fickle noises and power dissipation at cryogenic temperatures. This paper provides a comprehensive review of recent research on both types of cryogenic control and readout ICs but primarily focuses on the more mature CMOS technology. The discussion encompasses principles underlying control and readout techniques employed in cryogenic CMOS ICs along with their architectural designs;characterization and modeling approaches for field effect transistors under cryogenic conditions;as well as fundamental concepts pertaining to rapid single flux quantum circuits. In conclusion, while prototypes of cryogenic ICs have been successfully fabricated recently, further studies are still necessary;we believe that rapid single-flux-quantum-based or hybrid ICs featuring enhanced digital components may represent the future direction in this emerging area. ©

关键词： CMOS integrated circuits

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SUSHI: Ultra-High-Speed and Ultra-Low-Power Neuromorphic Chip Using Superconducting Single-Flux-Quantum Circuits

SUSHI: Ultra-High-Speed and Ultra-Low-Power Neuromorphic Chi...

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IEEE/ACM International Symposium on Microarchitecture (MICRO)

作者： Zeshi Liu Shuo Chen Peiyao Qu Huanli Liu Minghui Niu Liliang Ying Jie Ren Guangming Tang Haihang You State Key Lab of Processors Institute of Computing Technology Chinese Academy of Science School of Computer Science and Technology University of Chinese Academy of Sciences Beijing China Shanghai Institute of Microsystem and Information Technology Chinese Academy of Science Shanghai China State Key Lab of Processors Institute of Computing Technology Chinese Academy of Science Beijing China State Key Lab of Processors Institute of Computing Technology Chinese Academy of Science Zhongguancun Laboratory Beijing China

The rapid single-flux-quantum (RSFQ) superconducting technology is highly promising due to its ultra-high-speed computation with ultra-low-power consumption, making it an ideal solution for the post-Moore era. In superconducting technology, information is encoded and processed based on pulses that resemble the neuronal pulses present in biological neural systems. This has led to a growing research focus on implementing neuromorphic processing using superconducting technology. However, current research on superconducting neuromorphic processing does not fully leverage the advantages of superconducting circuits due to incomplete neu-romorphic design and approach. Although they have demonstrated the benefits of using superconducting technology for neuromor-phic hardware, their designs are mostly incomplete, with only a few components validated, or based solely on simulation. This paper presents SUSHI (Superconducting neUromorphic proceSsing cHIp) to fully leverage the potential of superconducting neuromorphic processing. Based on three guiding principles and our architectural and methodological designs, we address existing challenges and enables the design of verifiable and fabricable superconducting neuromorphic chips. We fabricate and verify a chip of SUSHI using superconducting circuit technology. Successfully obtaining the correct inference results of a complete neural network on the chip, this is the first instance of neural networks being completely executed on a superconducting chip to the best of our knowledge. Our evaluation shows that using approximately 10 5 Josephson junctions, SUSHI achieves a peak neuromorphic processing performance of 1,355 giga-synaptic operations per second (GSOPS) and a power efficiency of 32,366 GSOPS per Watt (GSOPS/W). This power efficiency outperforms the state-of-the-art neuromorphic chips TrueNorth and Tianjic by 81 and 50 times, respectively.

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IVE: Accelerating Enumeration-Based Subgraph Matching via Exploring Isolated Vertices

IVE: Accelerating Enumeration-Based Subgraph Matching via Ex...

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International Conference on Data Engineering

作者： Zite Jiang Shuai Zhang Xingzhong Hou Mengting Yuan Haihang You State Key Lab of Processors Institute of Computing Technology CAS Beijing China School of Computer Science and Technology University of Chinese Academy of Sciences Beijinz China Zhongguancun Laboratory Beijing China School of Computer Science Wuhan University Wuhan China

ISBN: (数字)9798350317152

ISBN: (纸本)9798350317169

The performance of the enumeration-based sub-graph matching, which searches all isomorphic subgraphs in the data graph, is crucial to various applications. The upper bound of the complexity for the enumeration-based method is exponential to the number of query graph vertices, denoted as $n$ . We propose a novel subgraph matching algorithm called the Isolated Vertices Exploration (IVE). The IVE leverages isolated vertices during the reordering and enumeration phases, thereby significantly accelerating the subgraph matching process. During the enumeration, the isolated vertices can be matched by using a quick bipartite graph matching algorithm. Consequently, the complexity of matching the remaining non-isolated vertices is exponential to the number of non-isolated vertices, denoted as $n^{\prime}$ . For the reordering, we designed the Maximum Deleted Edges (MDE) to minimize $n^{\prime}$ . MDE iteratively selects the query vertex with the maximum edges. According to the experimental results, $n^{\prime}$ is less than $0.8n$ for 99.8% of arbitrary graphs. Moreover, IVE outperforms the state-of-the-art algorithms in various scenarios with different sizes, sparsities and fields, achieving a performance speedup of up to 80.3x.

关键词： Backtracking Upper bound Design methodology Data engineering Complexity theory Bipartite graph

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PolarBEVU: Multi-Camera 3D Object Detection in Polar Bird's-Eye View via Unprojection

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IEEE Transactions on Circuits and Systems for Video technology 2025年

作者： Hou, Minghui Lyu, Chuanhao Wang, Gang Ma, Baorui Xu, Rongtao Hu, Jue Fan, Xiaopeng Jilin University College of Computer Science and Technology Changchun China Tsinghua University School of Software Beijing China Chinese Academy of Sciences State Key Laboratory of Multimodal Artificial Intelligence Systems Institute of Automation Beijing China Harbin Institute of Technology National Key Laboratory of Science and Technology on Advanced Composites in Special Environments Harbin150080 China Harbin Institute of Technology Centre for Composite Materials and Structures Harbin150001 China Harbin Institute of Technology Faculty of Computing Harbin150001 China

3D object detection from a Bird's Eye View (BEV) has emerged as a novel perception paradigm for autonomous driving scenarios. While most current 3D object detection methods still rely on the conventional Cartesian coordinates, they fail to align with the non-aligned coordinate system inherent in image geometry. The Polar coordinates, on the other hand, better fit with the geometric shape corresponding to the perception of cameras. However, transforming between coordinate systems introduces distortions in the perception information, resulting in issues such as "Weak Adaptability to Heatmap Distribution"and "Offset in the Center Point of the Bounding Box."To address these challenges, this paper proposes a cutting-edge 3D object detection model named PolarBEVU, which leverages the bird's-eye view under the Polar coordinates along with multi-camera unprojection. The model introduces an innovative "Deformable Uniform Heatmap Distribution"method that adjusts heatmap computations based on box shapes, generating high-quality heatmaps and effectively resolving the issue of "Weak Adaptability to Heatmap Distribution."Moreover, the model incorporates the concept of "Dynamic High-risk Regression Region"to enhance the accuracy and robustness of the center point regression at the bounding box, thus mitigating the issue of "Offset in the Center Point of the Bounding Box."In extensive experiments on the nuScenes dataset, PolarBEVU achieves impressive results with 49.9% mAP and 57.4% NDS on the test set, surpassing other comparative approaches and reaching the state-of-the-art (SOTA) performance among methods utilizing Polar coordinates. This clearly demonstrates the efficacy and superiority of PolarBEVU. In addition, the model is successfully deployed on Nvidia Jetson AGX Orin, showcasing real-time inference speeds of 31.42ms. These findings affirm PolarBEVU's potential for practical applications. Code is available at https: //***/JLUrob/PolarBEVU. © 2025 IEEE.

关键词： Object tracking

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